*.bin
*.hdr
*.hlr
+*.i86
*.ihx
*.lst
*.map
*.rel
*.rst
*.seed
-/disasm/dhgr_pixel_shape_data.inc
+/disasm/dhgr_pixel_shape_data_aux.inc
+/disasm/dhgr_pixel_shape_data_main.inc
/disasm/dhgr_pixel_shape_index.inc
/disasm/pixel_shape_data.inc
/disasm/pixel_shape_index.inc
-Subproject commit 6d5d1219781ad4b90294d84bd2589cccc4d728f3
+Subproject commit 3f9dabaf4788ce734ac80be7bfce11329e2a66c8
star_blazer_pack_rev.a2bin: \
star_blazer.ihx \
-../loader/lzss_unpack_rev.bin \
+../loader/lzss_unpack_rev_aux_mem.bin \
../loader/star_blazer_pack_rev.a2bin
- ../loader/a2_pack.py ${LOAD_ADDR} ../loader/lzss_unpack_rev.bin $< $@
+ ../loader/a2_pack.py ${LOAD_ADDR} ../loader/lzss_unpack_rev_aux_mem.bin $< $@
-diff -q ../loader/star_blazer_pack_rev.a2bin $@
star_blazer.ihx: star_blazer.rel
- # add for DHGR: -b data1=0xd000
+ # add for DHGR: -b data1=0x15c00
${ASLINK} -n -m -u -i \
-b zpage=0 \
-b udata0=0x200 \
-b udata1=0x400 \
-b text=0xa00 \
-b data0=0x4000 \
--b data1=0xd000 \
-$@ $<
- ./entry_point.py \
-0x`sed -ne 's/^ \(....\) start /\1/p' star_blazer.map` \
-$@ \
-$@
+-b udata2=0xa800 \
+-b data1=0x15c00 \
+star_blazer.i86 $<
+ mv star_blazer.i86 star_blazer.ihx
star_blazer.rel: \
star_blazer.asm \
dhgr_pixel_shape_index.inc \
-dhgr_pixel_shape_data.inc \
+dhgr_pixel_shape_data_main.inc \
+dhgr_pixel_shape_data_aux.inc \
pixel_shape_index.inc \
pixel_shape_data.inc \
shape_index.inc \
cat pixel.txt shape.txt \
|./shape_compile.py --dhgr --index shape0c.png >$@
-dhgr_pixel_shape_data.inc: pixel.txt shape.txt shape0c.png
+dhgr_pixel_shape_data_aux.inc: pixel.txt shape.txt shape0c.png
cat pixel.txt shape.txt \
-|./shape_compile.py --dhgr --data shape0c.png >$@
- # hack -- wrap shape data around the I/O page at 0xc000 for now
- sed \
--e 's/^shape_b3_text_empty:/\t.area\tdata1\ndata1_start:\n\n&/' \
--i $@
+|./shape_compile.py --dhgr --aux --data shape0c.png >$@
+
+dhgr_pixel_shape_data_main.inc: pixel.txt shape.txt shape0c.png
+ cat pixel.txt shape.txt \
+|./shape_compile.py --dhgr --main --data shape0c.png >$@
pixel_shape_index.inc: pixel.txt shape.txt shape0a.png
cat pixel.txt shape.txt \
*.a2bin \
*.bin \
*.hlr \
+*.i86 \
*.ihx \
*.lst \
*.map \
PITCH_Y = 64
dhgr = False
+main = False
data = False
index = False
while len(sys.argv) >= 2:
if sys.argv[1] == '--dhgr':
dhgr = True
+ elif sys.argv[1] == '--aux':
+ main = False
+ elif sys.argv[1] == '--main':
+ main = True
elif sys.argv[1] == '--data':
data = True
elif sys.argv[1] == '--index':
break
del sys.argv[1]
if len(sys.argv) < 2:
- print(f'usage: {sys.argv[0]:s} [--dhgr] [--data] [--index] in.png <shape.txt >shape(_data|_index).asm')
+ print(f'usage: {sys.argv[0]:s} [--dhgr [--aux|--main]] [--data] [--index] in.png <shape.txt >shape(_data(_aux|_main)|_index).asm')
sys.exit(EXIT_FAILURE)
in_png = sys.argv[1]
# unused entries receive a dummy 1x1 dimension without data
shape_data_ptr = ['0x5d01'] * 0x100
shape_width_bytes = [1] * 0x100
-shape_width_bytes1 = [2 if dhgr else 1] * 0x100
shape_height = [1] * 0x100
shape_shiftable = [True] * 0x100
shape_width = [1] * 0x100
x = j * PITCH_X
y = k * PITCH_Y
bg = 0xa if (j ^ k) & 1 else 5
-
+
shape = image_in[y:y + PITCH_Y, x:x + PITCH_X]
xs = shape.shape[1]
while xs:
shape = shape[::2, :]
ys >>= 1
+ # work out HGR graphics, to control game dimensions
+ hibit0 = numpy.zeros((ys, xs), bool)
+ hibit0[:, :-1:2] = shape[:, :-1:2]
+ hibit0[:, 1:-1:2] = shape[:, :-1:2]
+
+ hibit1 = numpy.zeros((ys, xs), bool)
+ hibit1[:, 1::2] = shape[:, 1::2]
+ hibit1[:, 2::2] = shape[:, 1::2]
+
hibit = numpy.zeros((ys,), bool)
+ shape1 = numpy.zeros((ys, xs >> 1), bool)
+ for j in range(ys):
+ #if (
+ # numpy.any(hibit0[j, :] != shape[j, :]) and
+ # numpy.any(hibit1[j, :] != shape[j, :])
+ #):
+ # print('shape', shape[j, :])
+ # print('shape1', shape1[j, :])
+ # print('hibit0', hibit0[j, :])
+ # print('hibit1', hibit1[j, :])
+ # assert False
+ if (
+ numpy.sum(hibit1[j, :] ^ shape[j, :]) <
+ numpy.sum(hibit0[j, :] ^ shape[j, :])
+ ):
+ hibit[j] = True
+ shape1[j, :] = hibit1[j, 1::2]
+ else:
+ shape1[j, :] = hibit0[j, :-1:2] # preferred in case of tie
+ #shape = shape1 -- not yet, may be DHGR
+ xs >>= 1
+
+ # compute metrics in original format
+ # mimic their single-pixel optimization, but don't otherwise optimize
+ width = xs >> 1
+ height = ys
+ if (xs % 7) == 1 and not numpy.any(shape1[:, -1]):
+ shape = shape[:, :-2] # for DHGR
+ shape1 = shape1[:, :-1] # for HGR
+ xs -= 1
+ width_bytes = (xs + 6) // 7 + shiftable
+
if dhgr:
- # hack to account for dhgr delay wrt hgr
- shape1 = numpy.zeros((ys, xs + 4), bool)
- shape1[:, 3:-1] = shape
- xs += 4
- shape = shape1
- if repeating:
- shape[:, -2] |= shape[:, 3]
- shape = shape[:, 4:]
- xs -= 4
- elif name[:5] == 'text_': # cannot change the width
- if not numpy.any(shape[:, :4]):
- shape = shape[:, 4:]
- elif not numpy.any(shape[:, -4:]):
- shape = shape[:, :-4]
- else:
- assert False
- xs -= 4
-
- # compute metrics in original format
- # mimic their single-pixel optimization, but don't otherwise optimize
- width = xs >> 2
- height = ys
- trim = xs % 14 # we can trim up to 3 DHGR pixels (1 HGR + overflow)
- if repeating:
- # for repeating ground pieces, wrap the overflow pixel around to left
- assert trim == 1
- shape[:, 0] |= shape[:, -1]
- shape = shape[:, :-1]
- xs -= 1
- elif trim < 5 and not numpy.any(shape[:, -trim:]): #4 and not numpy.any(shape[:, -trim:]):
- shape = shape[:, :-trim]
- xs -= trim
- width_bytes = ((xs + 13) // 14) + shiftable # number of DHGR pairs
- width_bytes1 = width_bytes << 1 # number of bytes to output
+ xs = (xs << 1) | 1 # overflow pixel to left, will go in hibit later
else:
- shape1 = shape[:, 1::2]
- for j in range(ys):
- if numpy.all(shape[j, :-1:2] == shape1[j, :]) and shape[j, -1] == False:
- pass
- elif shape[j, 0] == False and numpy.all(shape[j, 2::2] == shape1[j, :]):
- hibit[j] = True
- else:
- assert False
- shape = shape1
- xs >>= 1
-
- # compute metrics in original format
- # mimic their single-pixel optimization, but don't otherwise optimize
- width = xs >> 1
- height = ys
- if (xs % 7) == 1 and not numpy.any(shape[:, -1]):
- shape = shape[:, :-1]
- xs -= 1
- width_bytes = (xs + 6) // 7 + shiftable # number of DHGR pairs
- width_bytes1 = width_bytes # number of bytes to output
+ shape = shape1 # overflow pixel removed, hibit set up
data_ptr = label + (
- f' + 3 * {width_bytes1:d} * {height:d}'
+ f' + 3 * {width_bytes:d} * {height:d}'
if shiftable else
''
)
for i in indices:
shape_data_ptr[i] = data_ptr
shape_width_bytes[i] = width_bytes
- shape_width_bytes1[i] = width_bytes1
shape_height[i] = height
shape_shiftable[i] = shiftable
shape_width[i] = width
if data:
- shape1 = numpy.zeros((height, 12 + width_bytes1 * 7), bool)
- shape1[:, 12:12 + xs] = shape
-
- sys.stdout.write(f'{label:s}:\n')
- for i in range(7 if shiftable else 1):
- j = (i << 1) if dhgr else i
-
- # get shape shifted right by j
- shape2 = shape1[:, 12 - j:12 - j + width_bytes1 * 7]
-
- # reduce to bytes, apply hibit
- shape2 = numpy.bitwise_or.reduce(
- (
- shape2.reshape((height, width_bytes1, 7)) <<
- numpy.arange(
- 7,
- dtype = numpy.int32
- )[numpy.newaxis, numpy.newaxis, :]
- ).astype(numpy.uint8),
- 2
- ) | (hibit[:, numpy.newaxis] << 7)
-
- sys.stdout.write(
- '{0:s}\n'.format(
- ''.join(
- [
- '\t.db\t{0:s}\n'.format(
- ','.join(
- [f'0x{shape2[j, k]:02x}' for k in range(width_bytes1)]
+ if dhgr:
+ shape1 = numpy.zeros((height, 12 + width_bytes * 14 + 1), bool)
+ shape1[:, 12:12 + xs] = shape
+ suffix = '' if main else '_aux'
+ sys.stdout.write(f'{label:s}{suffix:s}:\n')
+
+ for i in range(0, 14 if shiftable else 2, 2):
+ # get shape shifted right by i
+ shape2 = shape1[:, 12 - i:12 - i + width_bytes * 14 + 1]
+
+ # remove overflow pixel, reduce to bytes, re-apply overflow pixel
+ hibit = shape2[:, 0]
+ shape2 = numpy.bitwise_or.reduce(
+ (
+ shape2[:, 1:].reshape((height, width_bytes * 2, 7)) <<
+ numpy.arange(
+ 7,
+ dtype = numpy.int32
+ )[numpy.newaxis, numpy.newaxis, :]
+ ).astype(numpy.uint8),
+ 2
+ )
+ shape2[:, 1] |= (hibit << 7).astype(numpy.uint8)
+
+ shape2 = shape2[:, main::2]
+ sys.stdout.write(
+ '{0:s}\n'.format(
+ ''.join(
+ [
+ '\t.db\t{0:s}\n'.format(
+ ','.join(
+ [f'0x{shape2[j, k]:02x}' for k in range(width_bytes)]
+ )
+ )
+ for j in range(height)
+ ]
+ )
+ )
+ )
+ else:
+ shape1 = numpy.zeros((height, 6 + width_bytes * 7), bool)
+ shape1[:, 6:6 + xs] = shape
+
+ sys.stdout.write(f'{label:s}:\n')
+ for i in range(7 if shiftable else 1):
+ # get shape shifted right by i
+ shape2 = shape1[:, 6 - i:6 - i + width_bytes * 7]
+
+ # reduce to bytes, apply hibit
+ shape2 = numpy.bitwise_or.reduce(
+ (
+ shape2.reshape((height, width_bytes, 7)) <<
+ numpy.arange(
+ 7,
+ dtype = numpy.int32
+ )[numpy.newaxis, numpy.newaxis, :]
+ ).astype(numpy.uint8),
+ 2
+ ) | (hibit[:, numpy.newaxis] << 7)
+
+ sys.stdout.write(
+ '{0:s}\n'.format(
+ ''.join(
+ [
+ '\t.db\t{0:s}\n'.format(
+ ','.join(
+ [f'0x{shape2[j, k]:02x}' for k in range(width_bytes)]
+ )
)
- )
- for j in range(height)
- ]
+ for j in range(height)
+ ]
+ )
)
)
- )
if index:
sys.stdout.write(
''.join(
[
'\t.db\t{0:s}\n'.format(
- f'{shape_width_bytes1[i]:d} * {shape_height[i]:d}'
+ f'{shape_width_bytes[i]:d} * {shape_height[i]:d}'
if shape_shiftable[i] else
'0'
)
---- star_blazer.asm0 2022-06-22 13:56:47.424054893 +1000
-+++ star_blazer.asm 2022-06-22 13:56:47.428054893 +1000
+--- star_blazer.asm0 2022-06-22 21:31:20.640105963 +1000
++++ star_blazer.asm 2022-06-22 21:31:20.640105963 +1000
@@ -1,3 +1,8 @@
+ALIGN = 0
+DHGR = 1
+hw_lc_bank1_ram_we = 0xc087
+
+; write
-+hw_clr80store = 0xc000
-+hw_set80store = 0xc001
++hw_clr80col = 0xc000
++hw_set80col = 0xc001
+hw_rdmainram = 0xc002
+hw_rdcardram = 0xc003
+hw_wrmainram = 0xc004
rts ; 10cd -> 10d0 -> 123e,143a,1615,1629,1633,1649,165b,1759 r s=f7..fd,02
sub_10d1:
beq rts_10ec ; 1216,123b,1260,1285 -> 10d1 -> 10d3,10ec r z=0..1
-@@ -1985,6 +2028,9 @@
+@@ -1981,10 +2024,35 @@
+ sta *button_state ; 17ce r
+ rts_17d0:
+ rts ; 17ab,17ca -> 17d0 -> 1768,176f r s=fd
+-start: lda hw_pb0 ; -> 17d1 -> 17d4 r
++start:
++.if DHGR
++ ; shadow code that needs to run with "sta hw_rdcardram"
++ ; from draw_object to draw_misc_from_table (this is generous)
++shadow_pages = (draw_misc_from_table - draw_object + 0xff) / 0x100
++shadow_start = draw_misc_from_table - shadow_pages * 0x100
++ lda #<shadow_start
++ sta *video_line_ptr
++ lda #>shadow_start
++ sta video_line_ptr + 1
++ ldx #shadow_pages
++ ldy #<draw_object - shadow_start
++ sta hw_wrcardram
++90$: lda [video_line_ptr],y
++ sta [video_line_ptr],y
++ iny
++ bne 90$
++ inc video_line_ptr + 1
++ dex
++ bne 90$
++ sta hw_wrmainram
++.endif
++ lda hw_pb0 ; -> 17d1 -> 17d4 r
bit *vec_draw_misc_from_table ; 17d1 -> 17d4 -> 17d6 r
ora hw_pb1 ; 17d4 -> 17d6 -> 17d9 r
bpl 1$ ; 17d6 -> 17d9 -> 17f2 r n=0
ldx #0x01 ; 17db r
0$: jsr rom_pread ; 17dd r
cpy #0xff ; 17e0 r
-@@ -1995,18 +2041,15 @@
+@@ -1995,18 +2063,15 @@
sta bvar_179e ; 17e9 r
sta bvar_17a3 ; 17ec r
sta bvar_1e0e ; 17ef r
divide_a_by_y:
sta *accumulator + 1 ; 0a90,0aa0,0ab5,0ad5 -> 1800 -> 1802 r
lda #0x00 ; 1800 -> 1802 -> 1804 r
-@@ -2071,10 +2114,12 @@
+@@ -2071,10 +2136,12 @@
lda *result + 1 ; 186e r
ldy *result + 2 ; 1870 r
rts ; 1872 r
random_init:
lda *random_seed ; 16ae -> 187a -> 187c r
ora #0x01 ; 187a -> 187c -> 187e r
-@@ -2233,16 +2278,31 @@
+@@ -2233,16 +2300,30 @@
ldx #>hires_screen ; 199b -> 199d -> 199f r
stx *video_line_ptr + 1 ; 199d -> 199f -> 19a1 r
tay ; 199f -> 19a1 -> 19a2 r
-0$: sta [*video_line_ptr],y ; 19a1,19a5,19aa -> 19a2 -> 19a4 r y=00..ff
+0$:
+.if DHGR
-+ sta hw_page2
++ sta hw_wrcardram
+ sta [*video_line_ptr],y
-+ sta hw_page1
++ sta hw_wrmainram
+.endif
+ sta [*video_line_ptr],y ; 19a1,19a5,19aa -> 19a2 -> 19a4 r y=00..ff
iny ; 19a2 -> 19a4 -> 19a5 r
bne 0$ ; 19a9 -> 19aa -> 19a2,19ac r z=0..1
+.if DHGR
+ lda hw_clrioudis
-+ ;sta hw_clr80store
++ sta hw_clr80col
+.endif
sta hw_txtclr ; 19aa -> 19ac -> 19af r
sta hw_mixclr ; 19ac -> 19af -> 19b2 r
+.if DHGR
+ lda hw_setdhires
+ sta hw_set80vid
-+ sta hw_set80store
+.endif
rts ; 19b5 -> 19b8 -> 1713 r s=fd
video_clear_rectangle:
ldx *clip_y0 ; 1064 -> 19b9 -> 19bb r
-@@ -2252,7 +2312,13 @@
+@@ -2252,7 +2333,13 @@
sta *video_line_ptr + 1 ; 19c0 -> 19c3 -> 19c5 r
ldy *clip_x0 ; 19c3 -> 19c5 -> 19c7 r
lda #0x00 ; 19c5 -> 19c7 -> 19c9 r
-1$: sta [*video_line_ptr],y ; 19c7,19ce -> 19c9 -> 19cb r y=6c..93
+1$:
+.if DHGR
-+ sta hw_page2
++ sta hw_wrcardram
+ sta [*video_line_ptr],y
-+ sta hw_page1
++ sta hw_wrmainram
+.endif
+ sta [*video_line_ptr],y ; 19c7,19ce -> 19c9 -> 19cb r y=6c..93
iny ; 19c9 -> 19cb -> 19cc r
cpy *clip_x1 ; 19cb -> 19cc -> 19ce r y=6d..94
bcc 1$ ; 19cc -> 19ce -> 19c9,19d0 r c=0..1
-@@ -2300,6 +2366,7 @@
+@@ -2300,6 +2387,7 @@
sta object1080_y0 - 0x10,x ; 1a1b -> 1a1e -> 1a21 r x=10..7f
adc #0x01 ; 1a1e -> 1a21 -> 1a23 r c=0..1 d=0
sta object1080_y1 - 0x10,x ; 1a21 -> 1a23 -> 1a26 r x=10..7f
rts ; 1a23 -> 1a26 -> 1076,1179,1602 r s=f1..f9,02
pixel_data_table_left:
.db 0x83 ; 1a27 r
-@@ -2382,14 +2449,17 @@
+@@ -2382,14 +2470,17 @@
lda object1080_onscreen_shape_ptr_hi - 0x10,x ; 1aa5 -> 1aa7 -> 1aaa r x=20..4f
ora [*video_line_ptr],y ; 1aa7 -> 1aaa -> 1aac r y=6d..93,02
sta [*video_line_ptr],y ; 1aaa -> 1aac -> 1aae r y=6d..93,02
lda object1080_y0 - 0x10,x ; 1ab9 -> 1abb -> 1abe r x=14..77
cmp object1080_y1 - 0x10,x ; 1abb -> 1abe -> 1ac1 r a=11..d4 x=14..77
bcs rts_1aae ; 1abe -> 1ac1 -> 1ac3 r c=0
-@@ -2453,8 +2523,14 @@
+@@ -2453,8 +2544,18 @@
cmp *draw_x1 ; 1b49 -> 1b4b -> 1b4d r a=94
bcc 8$ ; 1b4b -> 1b4d -> 1b4f,1b83 r c=0..1
lda object1080_onscreen_shape_ptr_lo - 0x10,x ; 1b4d -> 1b4f -> 1b52 r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 90$
++ sta hw_wrmainram
+.endif
sta 7$ ; 1b4f -> 1b52 -> 1b55 r
lda object1080_onscreen_shape_ptr_hi - 0x10,x ; 1b52 -> 1b55 -> 1b58 r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 90$ + 1
++ sta hw_wrmainram
+.endif
sta 7$ + 1 ; 1b55 -> 1b58 -> 1b5b r
ldx #0x00 ; 1b58 -> 1b5b -> 1b5d r
ldy *draw_y ; 1b5b -> 1b5d -> 1b5f r
-@@ -2463,7 +2539,17 @@
+@@ -2463,7 +2564,18 @@
lda video_line_table_hi - 0x20,y ; 1b62 -> 1b64 -> 1b67 r y=28..cf
sta *video_line_ptr + 1 ; 1b64 -> 1b67 -> 1b69 r
ldy *draw_x0 ; 1b67 -> 1b69 -> 1b6b r
-6$: .db 0xbd ; 1b69,1b76 -> 1b6b -> 1b6e r "lda shape_12_exhaust0 + 0x12,x" x=00..39
+6$:
+.if DHGR
-+ sta hw_page2
++ sta hw_rdcardram
++ sta hw_wrcardram
+ .db 0xbd ; lda NNNN,x
+90$: .dw 0
+ ora [*video_line_ptr],y
+ sta [*video_line_ptr],y
-+ inx
-+ sta hw_page1
++ sta hw_rdmainram
++ sta hw_wrmainram
+.endif
+ .db 0xbd ; 1b69,1b76 -> 1b6b -> 1b6e r "lda shape_12_exhaust0 + 0x12,x" x=00..39
7$: .dw shape_12_exhaust0 + 0x12 ; 1b6c rw
ora [*video_line_ptr],y ; 1b6b -> 1b6e -> 1b70 r y=6c..93
sta [*video_line_ptr],y ; 1b6e -> 1b70 -> 1b72 r y=6c..93
-@@ -2479,14 +2565,23 @@
+@@ -2479,14 +2591,24 @@
rts ; 1b80 -> 1b82 -> 15cd r s=fb
8$: inc object1080_onscreen_clipped - 0x10,x ; 1b3b,1b41,1b47,1b4d -> 1b83 -> 1b86 r x=14..77
lda object1080_onscreen_shape_ptr_lo - 0x10,x ; 1b83 -> 1b86 -> 1b89 r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 91$
-+ clc
-+ adc #1
++ sta hw_wrmainram
+.endif
sta 11$ ; 1b86 -> 1b89 -> 1b8c r
lda object1080_onscreen_shape_ptr_hi - 0x10,x ; 1b89 -> 1b8c -> 1b8f r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 91$ + 1
-+ adc #0
++ sta hw_wrmainram
+.endif
sta 11$ + 1 ; 1b8c -> 1b8f -> 1b92 r
ldx #0x00 ; 1b8f -> 1b92 -> 1b94 r
sta *video_line_ptr + 1 ; 1b9b -> 1b9e -> 1ba0 r
ldy *draw_x0 ; 1b9e -> 1ba0 -> 1ba2 r
10$: lda *draw_y ; 1ba0,1bbf -> 1ba2 -> 1ba4 r
-@@ -2498,11 +2593,23 @@
+@@ -2498,6 +2620,16 @@
bcc 12$ ; 1bac -> 1bae -> 1bb0,1bbb r c=0..1
cpy *clip_x1 ; 1bae -> 1bb0 -> 1bb2 r y=6c..a4
bcs 12$ ; 1bb0 -> 1bb2 -> 1bb4,1bbb r c=0..1
+.if DHGR
-+ sta hw_page2
++ sta hw_rdcardram
++ sta hw_wrcardram
+ .db 0xbd ; lda NNNN,x
+91$: .dw 0
+ ora [*video_line_ptr],y
+ sta [*video_line_ptr],y
-+ sta hw_page1
++ sta hw_rdmainram
++ sta hw_wrmainram
+.endif
.db 0xbd ; 1bb2 -> 1bb4 -> 1bb7 r "lda shape_12_exhaust0 + 0x1e,x" x=00..39
11$: .dw shape_12_exhaust0 + 0x1e ; 1bb5 rw
ora [*video_line_ptr],y ; 1bb4 -> 1bb7 -> 1bb9 r y=6c..93
- sta [*video_line_ptr],y ; 1bb7 -> 1bb9 -> 1bbb r y=6c..93
--12$: inx ; 1ba6,1baa,1bae,1bb2,1bb9 -> 1bbb -> 1bbc r
-+12$:
-+.if DHGR
-+ inx
-+.endif
-+ inx ; 1ba6,1baa,1bae,1bb2,1bb9 -> 1bbb -> 1bbc r
- iny ; 1bbb -> 1bbc -> 1bbd r
- cpy *draw_x1 ; 1bbc -> 1bbd -> 1bbf r y=5c..a5
- bcc 10$ ; 1bbd -> 1bbf -> 1ba2,1bc1 r c=0..1
-@@ -2511,6 +2618,7 @@
+@@ -2511,6 +2643,7 @@
cpy *draw_y1 ; 1bc3 -> 1bc5 -> 1bc7 r y=12..d9
bcc 9$ ; 1bc5 -> 1bc7 -> 1b96,1bc9 r c=0..1
ldx *x_save ; 1bc7 -> 1bc9 -> 1bcb r
rts ; 1bc9 -> 1bcb -> 15cd r s=fb
erase_pixel_object:
lda #0x00 ; 1c12 -> 1bcc -> 1bce r
-@@ -2542,12 +2650,15 @@
+@@ -2542,12 +2675,15 @@
eor #0xff ; 1c03 -> 1c06 -> 1c08 r
and [*video_line_ptr],y ; 1c06 -> 1c08 -> 1c0a r y=6d..93,02
sta [*video_line_ptr],y ; 1c08 -> 1c0a -> 1c0c r y=6d..93,02
lda #0x00 ; 1c12 -> 1c14 -> 1c16 r
sta object1080_onscreen - 0x10,x ; 1c14 -> 1c16 -> 1c19 r x=14..77
lda object1080_onscreen_x0 - 0x10,x ; 1c16 -> 1c19 -> 1c1c r x=14..77
-@@ -2562,8 +2673,14 @@
+@@ -2562,8 +2698,18 @@
stx *x_save ; 1c2d -> 1c30 -> 1c32 r
bne 3$ ; 1c30 -> 1c32 -> 1c34,1c6a r z=0..1
lda object1080_onscreen_shape_ptr_lo - 0x10,x ; 1c32 -> 1c34 -> 1c37 r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 90$
++ sta hw_wrmainram
+.endif
sta 2$ ; 1c34 -> 1c37 -> 1c3a r
lda object1080_onscreen_shape_ptr_hi - 0x10,x ; 1c37 -> 1c3a -> 1c3d r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 90$ + 1
++ sta hw_wrmainram
+.endif
sta 2$ + 1 ; 1c3a -> 1c3d -> 1c40 r
ldx #0x00 ; 1c3d -> 1c40 -> 1c42 r
ldy *draw_y ; 1c40 -> 1c42 -> 1c44 r
-@@ -2572,7 +2689,18 @@
+@@ -2572,7 +2718,19 @@
lda video_line_table_hi - 0x20,y ; 1c47 -> 1c49 -> 1c4c r y=28..cf
sta *video_line_ptr + 1 ; 1c49 -> 1c4c -> 1c4e r
ldy *draw_x0 ; 1c4c -> 1c4e -> 1c50 r
-1$: .db 0xbd ; 1c4e,1c5d -> 1c50 -> 1c53 r "lda shape_12_exhaust0 + 6,x" x=00..39
+1$:
+.if DHGR
-+ sta hw_page2
++ sta hw_rdcardram
++ sta hw_wrcardram
+ .db 0xbd ; lda NNNN,x
+90$: .dw 0
+ eor #0xff
+ and [*video_line_ptr],y
+ sta [*video_line_ptr],y
-+ inx
-+ sta hw_page1
++ sta hw_rdmainram
++ sta hw_wrmainram
+.endif
+ .db 0xbd ; 1c4e,1c5d -> 1c50 -> 1c53 r "lda shape_12_exhaust0 + 6,x" x=00..39
2$: .dw shape_12_exhaust0 + 6 ; 1c51 rw
eor #0xff ; 1c50 -> 1c53 -> 1c55 r
and [*video_line_ptr],y ; 1c53 -> 1c55 -> 1c57 r y=6c..93
-@@ -2588,14 +2716,23 @@
+@@ -2588,14 +2746,24 @@
ldx *x_save ; 1c65 -> 1c67 -> 1c69 r
rts ; 1c67 -> 1c69 -> 1076,16a8 r s=f3..f9,02
3$: lda object1080_onscreen_shape_ptr_lo - 0x10,x ; 1c32 -> 1c6a -> 1c6d r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 91$
-+ clc
-+ adc #1
++ sta hw_wrmainram
+.endif
sta 6$ ; 1c6a -> 1c6d -> 1c70 r
lda object1080_onscreen_shape_ptr_hi - 0x10,x ; 1c6d -> 1c70 -> 1c73 r x=14..77
+.if DHGR
++ sta hw_wrcardram
+ sta 91$ + 1
-+ adc #0
++ sta hw_wrmainram
+.endif
sta 6$ + 1 ; 1c70 -> 1c73 -> 1c76 r
ldx #0x00 ; 1c73 -> 1c76 -> 1c78 r
sta *video_line_ptr + 1 ; 1c7f -> 1c82 -> 1c84 r
ldy *draw_x0 ; 1c82 -> 1c84 -> 1c86 r
5$: lda *draw_y ; 1c84,1ca5 -> 1c86 -> 1c88 r
-@@ -2607,12 +2744,25 @@
+@@ -2607,6 +2775,17 @@
bcc 7$ ; 1c90 -> 1c92 -> 1c94,1ca1 r c=0..1
cpy *clip_x1 ; 1c92 -> 1c94 -> 1c96 r y=6c..a4
bcs 7$ ; 1c94 -> 1c96 -> 1c98,1ca1 r c=0..1
+.if DHGR
-+ sta hw_page2
++ sta hw_rdcardram
++ sta hw_wrcardram
+ .db 0xbd ; lda NNNN,x
+91$: .dw 0
+ eor #0xff
+ and [*video_line_ptr],y
+ sta [*video_line_ptr],y
-+ sta hw_page1
++ sta hw_rdmainram
++ sta hw_wrmainram
+.endif
.db 0xbd ; 1c96 -> 1c98 -> 1c9b r "lda shape_12_exhaust0 + 0x1e,x" x=00..39
6$: .dw shape_12_exhaust0 + 0x1e ; 1c99 rw
eor #0xff ; 1c98 -> 1c9b -> 1c9d r
- and [*video_line_ptr],y ; 1c9b -> 1c9d -> 1c9f r y=6c..93
- sta [*video_line_ptr],y ; 1c9d -> 1c9f -> 1ca1 r y=6c..93
--7$: inx ; 1c8a,1c8e,1c92,1c96,1c9f -> 1ca1 -> 1ca2 r
-+7$:
-+.if DHGR
-+ inx
-+.endif
-+ inx ; 1c8a,1c8e,1c92,1c96,1c9f -> 1ca1 -> 1ca2 r
- iny ; 1ca1 -> 1ca2 -> 1ca3 r
- cpy *draw_x1 ; 1ca2 -> 1ca3 -> 1ca5 r y=5c..a5
- bcc 5$ ; 1ca3 -> 1ca5 -> 1c86,1ca7 r c=0..1
-@@ -2626,8 +2776,17 @@
+@@ -2626,8 +2805,18 @@
stx *x_save ; 1db0 -> 1cb2 -> 1cb4 r
tay ; 1cb2 -> 1cb4 -> 1cb5 r
lda shape_data_ptr_lo,y ; 1cb4 -> 1cb5 -> 1cb8 r y=16..ff
+.if DHGR
++ sta hw_wrcardram
+ sta 90$
-+ clc
-+ adc #1
++ sta hw_wrmainram
+.endif
sta 3$ ; 1cb5 -> 1cb8 -> 1cbb r
lda shape_data_ptr_hi,y ; 1cb8 -> 1cbb -> 1cbe r y=16..ff
+.if DHGR
++ sta hw_wrcardram
+ sta 90$ + 1
-+ adc #0
++ sta hw_wrmainram
+.endif
sta 3$ + 1 ; 1cbb -> 1cbe -> 1cc1 r
lda shape_width_bytes,y ; 1cbe -> 1cc1 -> 1cc4 r y=16..ff
clc ; 1cc1 -> 1cc4 -> 1cc5 r
-@@ -2636,6 +2795,11 @@
+@@ -2636,6 +2825,11 @@
lda *draw_x0 ; 1cc7 -> 1cc9 -> 1ccb r
lsr a ; 1cc9 -> 1ccb -> 1ccc r
bcc 0$ ; 1ccb -> 1ccc -> 1cce,1cd4 r c=0..1
lda *draw_misc_mask ; 1ccc -> 1cce -> 1cd0 r
eor *draw_misc_mask_xor ; 1cce -> 1cd0 -> 1cd2 r
sta *draw_misc_mask ; 1cd0 -> 1cd2 -> 1cd4 r
-@@ -2651,6 +2815,10 @@
+@@ -2651,6 +2845,10 @@
lda video_line_table_hi,y ; 1ce5 -> 1ce7 -> 1cea r y=00..bc
adc #0x00 ; 1ce7 -> 1cea -> 1cec r c=0..1 d=0
sta *video_line_ptr + 1 ; 1cea -> 1cec -> 1cee r
lda *draw_misc_mask ; 1cec -> 1cee -> 1cf0 r
sta *draw_misc_mask_temp ; 1cee -> 1cf0 -> 1cf2 r
ldy *draw_x0 ; 1cf0 -> 1cf2 -> 1cf4 r
-@@ -2659,13 +2827,30 @@
+@@ -2659,11 +2857,27 @@
bcs 4$ ; 1cf6 -> 1cf8 -> 1cfa r c=0
cpy #0x28 ; 1cf8 -> 1cfa -> 1cfc r y=00..2d
bcs 4$ ; 1cfa -> 1cfc -> 1cfe,1d05 r c=0..1
+.if DHGR
-+ sta hw_page2
++ sta hw_rdcardram
++ sta hw_wrcardram
+ .db 0xbd ; lda NNNN,x
+90$: .dw 0
+ and *draw_misc_aux_mask_temp
+ sta [*video_line_ptr],y
-+ sta hw_page1
++ sta hw_rdmainram
++ sta hw_wrmainram
+.endif
.db 0xbd ; 1cfc -> 1cfe -> 1d01 r "lda shape_d4_text_suzuki,x" x=00..7d
3$: .dw shape_d4_text_suzuki ; 1cff rw
+ lda *draw_misc_mask_temp ; 1cfc,1d03 -> 1d05 -> 1d07 r
eor *draw_misc_mask_xor ; 1d05 -> 1d07 -> 1d09 r
sta *draw_misc_mask_temp ; 1d07 -> 1d09 -> 1d0b r
-+.if DHGR
-+ inx
-+.endif
inx ; 1d09 -> 1d0b -> 1d0c r
- iny ; 1d0b -> 1d0c -> 1d0d r
- cpy *draw_x1 ; 1d0c -> 1d0d -> 1d0f r y=01..2e
-@@ -2686,7 +2871,7 @@
+@@ -2686,7 +2900,7 @@
asl a ; 1d23 -> 1d24 -> 1d25 r
sta *draw_misc_ptr ; 1d24 -> 1d25 -> 1d27 r
lda #0x00 ; 1d25 -> 1d27 -> 1d29 r
sta *draw_misc_ptr + 1 ; 1d29 -> 1d2b -> 1d2d r
lda *half_dimension ; 1d2b -> 1d2d -> 1d2f r
lsr a ; 1d2d -> 1d2f -> 1d30 r
-@@ -2695,6 +2880,12 @@
+@@ -2695,6 +2909,12 @@
lsr a ; 1d31 -> 1d32 -> 1d33 r
lsr a ; 1d32 -> 1d33 -> 1d34 r
tay ; 1d33 -> 1d34 -> 1d35 r
lda draw_misc_mask_table,y ; 1d34 -> 1d35 -> 1d38 r y=00..06
sta *draw_misc_mask ; 1d35 -> 1d38 -> 1d3a r
lda draw_misc_mask_xor_table,y ; 1d38 -> 1d3a -> 1d3d r y=00..06
-@@ -2771,6 +2962,62 @@
+@@ -2771,6 +2991,62 @@
ldy *draw_misc_y_save ; 1d1b -> 1db3 -> 1db5 r
rts_1db5:
rts ; 1da1,1db3 -> 1db5 -> 1076,1d61,1d7d,1d82,1d87 r s=ee..f7
draw_misc_mask_table:
.db 0xff ; 1db6 r
.db 0x00 ; 1db7 r
-@@ -2781,72 +3028,18 @@
+@@ -2781,72 +3057,17 @@
.db 0xd5 ; 1dbc r
.db 0xff ; 1dbd r
draw_misc_mask_xor_table:
+ .db 0xaa ^ 0xd5 ;0x7f ; 1dc4 r
+ .db 0xff ^ 0xff ;0x00 ; 1dc5 r
+.endif
-+.if ALIGN
++.ifeq DHGR ; move to end
+ .ds 0x1e00 - 0xa00 - (. - text_start)
-+.endif
sub_1e00:
jmp loc_1e2a ; 15dc -> 1e00 -> 1e2a r
test_player_fire:
-@@ -3005,77 +3198,8 @@
+@@ -3005,77 +3226,7 @@
adc #0x01 ; 1f32 -> 1f33 -> 1f35 r c=0 d=0
sta object1080_velocity_x_hi + 0x50 ; 1f33 -> 1f35 -> 1f38 r
rts ; 1f35 -> 1f38 -> 15df r s=f9
- .db 0x00 ; 1f7d
- .db 0x00 ; 1f7e
- .db 0x00 ; 1f7f
-+.ifeq DHGR
+ .ds 0x1f80 - 0xa00 - (. - text_start)
barr_1f80:
.db 0x43 ; 1f80 r
.db 0x02 ; 1f81 r
-@@ -3212,9 +3336,20 @@
+@@ -3212,9 +3363,20 @@
.db 0x00 ; 1ffd r
.db 0x00 ; 1ffe r
.db 0x00 ; 1fff r
shape_data_ptr_lo:
.db <shape_23_bomb3 + 0x28 ; 4000 r
.db <shape_23_bomb3 + 0x28 ; 4001 r
-@@ -4757,6 +4892,9 @@
+@@ -4757,6 +4919,9 @@
.db 0x01 ; 45fd r
.db 0x01 ; 45fe r
.db 0x04 ; 45ff r
draw_misc_table:
.db 0x01 ; 4600 r
.db 0x07 ; 4601 r
-@@ -9432,6 +9570,15 @@
+@@ -9432,6 +9597,15 @@
.dw 0x0000 ; 5bfa r
.dw 0x0000 ; 5bfc r
.dw 0x0000 ; 5bfe r
+.if DHGR
-+.include /dhgr_pixel_shape_data.inc/
++.include /dhgr_pixel_shape_data_main.inc/
+.else
+.if PIXEL_SHAPE
+.include /pixel_shape_data.inc/
shape_20_bomb0:
.db 0x5c ; 5c00 r
.db 0x02 ; 5c01 r
-@@ -21852,510 +21999,12 @@
+@@ -21852,510 +22026,12 @@
.db 0xe0 ; 8c05 r
.db 0x83 ; 8c06 r
.db 0x9e ; 8c07 r
microcode_table_5560_data_8e00:
.db 0x30 ; 8e00 r
.db 0x0f ; 8e01
-@@ -26926,33 +26575,156 @@
+@@ -26926,31 +26602,308 @@
.db 0x7c ; 9dea
.db 0x98 ; 9deb
.db 0x00 ; 9dec
- lda #>restart ; 9e16 r
- sta vec_restart + 1 ; 9e18 r
- jmp start ; 9e1b r
-
-- .area udata2
-+.if DHGR
-+ .ds 0xf000 - 0xd000 - (. - data1_start)
++
++.if DHGR ; move to here
++sub_1e00:
++ jmp loc_1e2a ; 15dc -> 1e00 -> 1e2a r
++test_player_fire:
++ clc ; 1542 -> 1e03 -> 1e04 r
++ bit *demo_mode ; 1e03 -> 1e04 -> 1e06 r
++ bmi loc_1e1e ; 1e04 -> 1e06 -> 1e08,1e1e r n=0..1
++ lda hw_pb0 ; 1e06 -> 1e08 -> 1e0b r
++ ora hw_pb1 ; 1e08 -> 1e0b -> 1e0e r
++bvar_1e0e:
++ bmi loc_1e21 ; 1e0b -> 1e0e -> 1e10 rw n=0
++ lda #0x02 ; 1e0e -> 1e10 -> 1e12 r
++ and *button_state ; 1e10 -> 1e12 -> 1e14 r
++ beq 0$ ; 1e12 -> 1e14 -> 1e16,1e1d r z=0..1
++ lda #0xfd ; 1e14 -> 1e16 -> 1e18 r
++ and *button_state ; 1e16 -> 1e18 -> 1e1a r
++ sta *button_state ; 1e18 -> 1e1a -> 1e1c r
++ sec ; 1e1a -> 1e1c -> 1e1d r
++0$: rts ; 1e14,1e1c -> 1e1d -> 1545 r s=f7
++loc_1e1e:
++ jsr random_byte ; 1e06 -> 1e1e -> 1881 r s=f7
++loc_1e21:
++ asl a ; 18a1 -> 1e21 -> 1e22 r
++ rts ; 1e21 -> 1e22 -> 1545 r s=f7
++loc_1e23:
++ lda #0x02 ; 1e4a -> 1e23 -> 1e25 r
++ ora *button_state ; 1e23 -> 1e25 -> 1e27 r
++ sta *button_state ; 1e25 -> 1e27 -> 1e29 r
++ rts ; 1e27 -> 1e29 -> 15df r s=f9
++loc_1e2a:
++ bit *demo_mode ; 1e00 -> 1e2a -> 1e2c r
++ bpl 0$ ; 1e2a -> 1e2c -> 1e2e,1e42 r n=0..1
++ jsr random_byte ; 1e2c -> 1e2e -> 1881 r s=f9
++ and #0x1f ; 18a1 -> 1e31 -> 1e33 r
++ tay ; 1e31 -> 1e33 -> 1e34 r
++ dey ; 1e33 -> 1e34 -> 1e35 r
++ beq 6$ ; 1e34 -> 1e35 -> 1e37,1e87 r z=0..1
++ dey ; 1e35 -> 1e37 -> 1e38 r
++ beq 7$ ; 1e37 -> 1e38 -> 1e3a,1e94 r z=0..1
++ dey ; 1e38 -> 1e3a -> 1e3b r
++ beq 2$ ; 1e3a -> 1e3b -> 1e3d,1e69 r z=0..1
++ dey ; 1e3b -> 1e3d -> 1e3e r
++ beq 1$ ; 1e3d -> 1e3e -> 1e40,1e5c r z=0..1
++ bne 4$ ; 1e3e -> 1e40 -> 1e82 r z=0
++0$: bit *button_state ; 1e2c -> 1e42 -> 1e44 r
++ bmi 5$ ; 1e42 -> 1e44 -> 1e46 r n=0
++ lda *key_state ; 1e44 -> 1e46 -> 1e48 r
++ cmp #0xa0 ; 1e46 -> 1e48 -> 1e4a r a=00..da
++ beq loc_1e23 ; 1e48 -> 1e4a -> 1e23,1e4c r z=0..1
++ cmp #0xc1 ; 1e4a -> 1e4c -> 1e4e r a=00..da
++ beq 6$ ; 1e4c -> 1e4e -> 1e50,1e87 r z=0..1
++ cmp #0xda ; 1e4e -> 1e50 -> 1e52 r a=00..da
++ beq 7$ ; 1e50 -> 1e52 -> 1e54,1e94 r z=0..1
++ cmp #0x95 ; 1e52 -> 1e54 -> 1e56 r a=00..95
++ beq 2$ ; 1e54 -> 1e56 -> 1e58,1e69 r z=0..1
++ cmp #0x88 ; 1e56 -> 1e58 -> 1e5a r a=00..88
++ bne 4$ ; 1e58 -> 1e5a -> 1e5c,1e82 r z=0..1
++1$: ldy object1080_velocity_x_hi + 0x51 ; 1e3e,1e5a -> 1e5c -> 1e5f r
++ cpy #0x01 ; 1e5c -> 1e5f -> 1e61 r y=00..04
++ bmi 4$ ; 1e5f -> 1e61 -> 1e63,1e82 r n=0..1
++ lda #0x20 ; 1e61 -> 1e63 -> 1e65 r
++ ldy #0xff ; 1e63 -> 1e65 -> 1e67 r
++ bne 3$ ; 1e65 -> 1e67 -> 1e74 r z=0
++2$: ldy object1080_velocity_x_hi + 0x51 ; 1e3b,1e56 -> 1e69 -> 1e6c r
++ cpy #0x04 ; 1e69 -> 1e6c -> 1e6e r y=00..04
++ bpl 4$ ; 1e6c -> 1e6e -> 1e70,1e82 r n=0..1
++ lda #0xe0 ; 1e6e -> 1e70 -> 1e72 r
++ ldy #0x00 ; 1e70 -> 1e72 -> 1e74 r
++3$: clc ; 1e67,1e72 -> 1e74 -> 1e75 r
++ adc object1080_velocity_x_lo + 0x51 ; 1e74 -> 1e75 -> 1e78 r c=0 d=0
++ sta object1080_velocity_x_lo + 0x51 ; 1e75 -> 1e78 -> 1e7b r
++ tya ; 1e78 -> 1e7b -> 1e7c r
++ adc object1080_velocity_x_hi + 0x51 ; 1e7b -> 1e7c -> 1e7f r c=0..1 d=0
++ sta object1080_velocity_x_hi + 0x51 ; 1e7c -> 1e7f -> 1e82 r
++4$: jmp 17$ ; 1e40,1e5a,1e61,1e6e,1e7f -> 1e82 -> 1f1f r
++5$: bmi 10$ ; 1e85 r
++6$: ldy object1080_velocity_y_hi + 0x51 ; 1e35,1e4e -> 1e87 -> 1e8a r
++ cpy #0xfe ; 1e87 -> 1e8a -> 1e8c r y=00..ff
++ bmi 9$ ; 1e8a -> 1e8c -> 1e8e,1ead r n=0..1
++ lda #0x00 ; 1e8c -> 1e8e -> 1e90 r
++ ldy #0xff ; 1e8e -> 1e90 -> 1e92 r
++ bne 8$ ; 1e90 -> 1e92 -> 1e9f r z=0
++7$: ldy object1080_velocity_y_hi + 0x51 ; 1e38,1e52 -> 1e94 -> 1e97 r
++ cpy #0x03 ; 1e94 -> 1e97 -> 1e99 r y=00..ff
++ bpl 9$ ; 1e97 -> 1e99 -> 1e9b,1ead r n=0..1
++ lda #0x00 ; 1e99 -> 1e9b -> 1e9d r
++ ldy #0x01 ; 1e9b -> 1e9d -> 1e9f r
++8$: clc ; 1e92,1e9d -> 1e9f -> 1ea0 r
++ adc object1080_velocity_y_lo + 0x51 ; 1e9f -> 1ea0 -> 1ea3 r c=0 d=0
++ sta object1080_velocity_y_lo + 0x51 ; 1ea0 -> 1ea3 -> 1ea6 r
++ tya ; 1ea3 -> 1ea6 -> 1ea7 r
++ adc object1080_velocity_y_hi + 0x51 ; 1ea6 -> 1ea7 -> 1eaa r c=0 d=0
++ sta object1080_velocity_y_hi + 0x51 ; 1ea7 -> 1eaa -> 1ead r
++9$: jmp 17$ ; 1e8c,1e99,1eaa -> 1ead -> 1f1f r
++10$: lda #0x01 ; 1eb0 r
++ eor *button_state ; 1eb2 r
++ sta *button_state ; 1eb4 r
++ and #0x01 ; 1eb6 r
++ php ; 1eb8 r
++ ora #0x64 ; 1eb9 r
++ sta 12$ ; 1ebb r
++ bit hw_ptrig ; 1ebe r
++ ldy #0xfe ; 1ec1 r
++ lda #0x40 ; 1ec3 r
++11$: .db 0x2c ; 1ec5 r "bit hw_paddl1"
++12$: .dw hw_paddl1 ; 1ec6 rw
++ bpl 13$ ; 1ec8 r
++ clc ; 1eca r
++ adc #0x05 ; 1ecb r
++ bcc 11$ ; 1ecd r
++ iny ; 1ecf r
++ cpy #0x03 ; 1ed0 r
++ bne 11$ ; 1ed2 r
++ dey ; 1ed4 r
++ sbc #0x05 ; 1ed5 r
++13$: plp ; 1ed7 r
++ bne 15$ ; 1ed8 r
++ sta object1080_velocity_x_lo + 0x51 ; 1eda r
++ clc ; 1edd r
++ adc object1080_x_lo + 0x51 ; 1ede r
++ iny ; 1ee1 r
++ iny ; 1ee2 r
++ tya ; 1ee3 r
++ sta object1080_velocity_x_hi + 0x51 ; 1ee4 r
++ adc object1080_x_hi + 0x51 ; 1ee7 r
++ cmp #0x4f ; 1eea r
++ bcc 14$ ; 1eec r
++ cmp #0xab ; 1eee r
++ bcc 17$ ; 1ef0 r
++14$: lda object1080_velocity_x_lo + 0x50 ; 1ef2 r
++ sta object1080_velocity_x_lo + 0x51 ; 1ef5 r
++ lda object1080_velocity_x_hi + 0x50 ; 1ef8 r
++ sta object1080_velocity_x_hi + 0x51 ; 1efb r
++ jmp 17$ ; 1efe r
++15$: sta object1080_velocity_y_lo + 0x51 ; 1f01 r
++ clc ; 1f04 r
++ adc object1080_y_lo + 0x51 ; 1f05 r
++ tya ; 1f08 r
++ sta object1080_velocity_y_hi + 0x51 ; 1f09 r
++ adc object1080_y_hi + 0x51 ; 1f0c r
++ cmp #0x35 ; 1f0f r
++ bcc 16$ ; 1f11 r
++ cmp #0xb8 ; 1f13 r
++ bcc 17$ ; 1f15 r
++16$: lda #0x00 ; 1f17 r
++ sta object1080_velocity_y_lo + 0x51 ; 1f19 r
++ sta object1080_velocity_y_hi + 0x51 ; 1f1c r
++17$: lda object1080_x_hi + 0x51 ; 1e82,1ead -> 1f1f -> 1f22 r
++ asl a ; 1f1f -> 1f22 -> 1f23 r
++ rol object1080_velocity_x_hi + 0x50 ; 1f22 -> 1f23 -> 1f26 r
++ asl a ; 1f23 -> 1f26 -> 1f27 r
++ rol object1080_velocity_x_hi + 0x50 ; 1f26 -> 1f27 -> 1f2a r
++ sta object1080_velocity_x_lo + 0x50 ; 1f27 -> 1f2a -> 1f2d r
++ lda object1080_velocity_x_hi + 0x50 ; 1f2a -> 1f2d -> 1f30 r
++ and #0x03 ; 1f2d -> 1f30 -> 1f32 r
++ clc ; 1f30 -> 1f32 -> 1f33 r
++ adc #0x01 ; 1f32 -> 1f33 -> 1f35 r c=0 d=0
++ sta object1080_velocity_x_hi + 0x50 ; 1f33 -> 1f35 -> 1f38 r
++ rts ; 1f35 -> 1f38 -> 15df r s=f9
++ .ds 0x9f80 - 0x4000 - (. - data0_start)
+barr_1f80:
+ .db 0x43 ; 1f80 r
+ .db 0x02 ; 1f81 r
+ .db 0x00 ; 1ffd r
+ .db 0x00 ; 1ffe r
+ .db 0x00 ; 1fff r
-+.endif
+
-+; .area udata2
-+; normally this is .area udata2, but don't bother with a separate area,
-+; put the address here so the DHGR build can use the ordinary Makefile
-+; .area udata2
-+.if DHGR
-+ .ds 0xf100 - 0xd000 - (. - data1_start)
-+.else
-+ .ds 0xa800 - 0x4000 - (. - data0_start)
++ .area data1
++
++.include /dhgr_pixel_shape_data_aux.inc/
+.endif
- x_table_times2_div7_plus_5b:
- .ds 0x100 ; a800 rw
+ .area udata2
+
+@@ -27033,3 +26986,4 @@
+ object6080_b560:
+ .ds 0x20 ; b560 rw
+
++ .end start
.PHONY: cg_default
cg_default:
- ${MAKE} ${MAKEFLAGS} -C $@
+ # seems to try to build "make w -C cg_default", could be make bug?
+ #${MAKE} ${MAKEFLAGS} -C $@
+ ${MAKE} -C $@
emu_65c02: emu_65c02.o stty_sane.o vrEmu6502/src/vrEmu6502.o
${CC} ${LDFLAGS} -o $@ $^ -lSDL2
all: \
star_blazer_pack_rev.a2bin \
star_blazer_pack_fwd.a2bin \
+lzss_unpack_rev.bin \
+lzss_unpack_rev_aux_mem.bin \
+lzss_unpack_fwd.bin \
+lzss_unpack_fwd_aux_mem.bin \
star_blazer.ihx \
star_blazer.a2bin \
star_blazer_dejunked0.a2bin \
star_blazer_pack_rev.a2bin: lzss_unpack_rev.bin star_blazer.ihx
./a2_pack.py --rev ${LOAD_ADDR} $^ $@
+star_blazer_pack_fwd.a2bin: lzss_unpack_fwd.bin star_blazer.ihx
+ ./a2_pack.py --fwd ${END_ADDR} $^ $@
+
lzss_unpack_rev.bin: lzss_unpack_rev.ihx
${HEX2BIN} $< $@
lzss_unpack_rev.ihx: lzss_unpack_rev.rel
- ${ASLINK} -n -m -u -i -b text=0 $@ $^
+ ${ASLINK} -n -m -u -i -b text=0 lzss_unpack_rev.i86 $^
+ mv lzss_unpack_rev.i86 $@
lzss_unpack_rev.rel: lzss_unpack_rev.asm
${AS6500} -l -o $<
-star_blazer_pack_fwd.a2bin: lzss_unpack_fwd.bin star_blazer.ihx
- ./a2_pack.py --fwd ${END_ADDR} $^ $@
+lzss_unpack_rev_aux_mem.bin: lzss_unpack_rev_aux_mem.ihx
+ ${HEX2BIN} $< $@
+
+lzss_unpack_rev_aux_mem.ihx: lzss_unpack_rev_aux_mem.rel
+ # note: runs from stack so its base is 0x100 and it can use jmp
+ ${ASLINK} -n -m -u -i -b text=0x100 lzss_unpack_rev_aux_mem.i86 $^
+ mv lzss_unpack_rev_aux_mem.i86 $@
+
+lzss_unpack_rev_aux_mem.rel: lzss_unpack_rev.asm
+ sed -e 's/^AUX_MEM = 0/AUX_MEM = 1/' <$< >lzss_unpack_rev_aux_mem.asm
+ ${AS6500} -l -o lzss_unpack_rev_aux_mem.asm
+ rm lzss_unpack_rev_aux_mem.asm
lzss_unpack_fwd.bin: lzss_unpack_fwd.ihx
${HEX2BIN} $< $@
lzss_unpack_fwd.ihx: lzss_unpack_fwd.rel
- ${ASLINK} -n -m -u -i -b text=0 $@ $^
+ ${ASLINK} -n -m -u -i -b text=0 lzss_unpack_fwd.i86 $^
+ mv lzss_unpack_fwd.i86 $@
lzss_unpack_fwd.rel: lzss_unpack_fwd.asm
${AS6500} -l -o $<
+lzss_unpack_fwd_aux_mem.bin: lzss_unpack_fwd_aux_mem.ihx
+ ${HEX2BIN} $< $@
+
+lzss_unpack_fwd_aux_mem.ihx: lzss_unpack_fwd_aux_mem.rel
+ # note: runs from stack so its base is 0x100 and it can use jmp
+ ${ASLINK} -n -m -u -i -b text=0x100 lzss_fwd_aux_mem.i86 $^
+ mv lzss_fwd_aux_mem.i86 $@
+
+lzss_unpack_fwd_aux_mem.rel: lzss_unpack_fwd.asm
+ sed -e 's/^AUX_MEM = 0/AUX_MEM = 1/' <$< >lzss_unpack_fwd_aux_mem.asm
+ ${AS6500} -l -o lzss_unpack_fwd_aux_mem.asm
+ rm lzss_unpack_fwd_aux_mem.asm
+
star_blazer.ihx: star_blazer.a2bin star_blazer_segments.txt
./a2_load.py 0x17d1 $< $@ <star_blazer_segments.txt
${HEX2BIN} $< $@
lzss_loader.ihx: lzss_loader.rel
- ${ASLINK} -n -m -u -i -b text=${LZSS_LOADER} $@ $^
+ ${ASLINK} -n -m -u -i -b text=${LZSS_LOADER} lzss_loader.i86 $^
+ mv lzss_loader.i86 $@
lzss_loader.rel: lzss_loader.asm
${AS6500} -l -o $<
${HEX2BIN} $< $@
recrack_loader.ihx: recrack_loader.rel
- ${ASLINK} -n -m -u -i -b text=${RECRACK_LOADER} $@ $^
+ ${ASLINK} -n -m -u -i -b text=${RECRACK_LOADER} recrack_loader.i86 $^
+ mv recrack_loader.i86 $@
recrack_loader.rel: recrack_loader.asm
${AS6500} -l -o $<
clean:
- rm -f *.a2bin *.bin *.hlr *.ihx *.lst *.map *.o *.rel *.rst
+ rm -f \
+*.a2bin \
+*.bin \
+*.hlr \
+*.i86 \
+*.ihx \
+*.lst \
+*.map \
+*.o \
+*.rel \
+*.rst \
+lzss_unpack_rev_aux_mem.asm \
+lzss_unpack_fwd_aux_mem.asm
del sys.argv[1]
if len(sys.argv) < 5:
print(
- f'usage: {sys.argv[0]:s} [--rev|--fwd] (load|end)_addr lzss_unpack_(rev|fwd).bin in.ihx out.a2bin'
+ f'usage: {sys.argv[0]:s} [--rev|--fwd] (load|end)_addr lzss_unpack_(rev|fwd)(_aux_mem).bin in.ihx out.a2bin'
)
sys.exit(EXIT_FAILURE)
load_or_end_addr = int(sys.argv[1], 0)
-lzss_unpack_rev_or_fwd_bin = sys.argv[2]
+lzss_unpack_bin = sys.argv[2]
in_ihx = sys.argv[3]
out_a2bin = sys.argv[4]
-with open(lzss_unpack_rev_or_fwd_bin, 'rb') as fin:
- lzss_unpack_rev_or_fwd = list(fin.read())
+with open(lzss_unpack_bin, 'rb') as fin:
+ lzss_unpack = list(fin.read())
+if rev:
+ if len(lzss_unpack) == 0x9c:
+ aux_mem = False
+ elif len(lzss_unpack) == 0xa3:
+ aux_mem = True
+ else:
+ assert False
+elif len(lzss_unpack) == 0x96:
+ aux_mem = False
+elif len(lzss_unpack) == 0x9d:
+ aux_mem = True
+else:
+ assert False
def lzss_pack(dest, bin, rev):
if rev:
intersect(segments, [0x100, 0x200]) +
intersect(segments, [0x200, 0xc000]) +
intersect(segments, [0xc000, 0xd000]) +
- intersect(segments, [0xd000, 0x10000])
+ intersect(segments, [0xd000, 0x10000]) +
+ intersect(segments, [0x10000, 0x10100]) +
+ intersect(segments, [0x10100, 0x10200]) +
+ intersect(segments, [0x10200, 0x1c000]) +
+ intersect(segments, [0x1c000, 0x1d000]) +
+ intersect(segments, [0x1d000, 0x20000])
if rev else
intersect(segments, [0x200, 0xc000]) +
intersect(segments, [0xc000, 0xd000]) +
intersect(segments, [0xd000, 0x10000]) +
+ intersect(segments, [0x10000, 0x10100]) +
+ intersect(segments, [0x10100, 0x10200]) +
+ intersect(segments, [0x10200, 0x1c000]) +
+ intersect(segments, [0x1c000, 0x1d000]) +
+ intersect(segments, [0x1d000, 0x20000]) +
intersect(segments, [0, 0x100]) +
intersect(segments, [0x100, 0x200])
)
REPORT_TYPE_COMPRESSED = 2
report = []
-# language card can be in unknown state or known state 0xc080 + n
+# zero page or ordinary memory can be set to bank 0 (main) or bank 1 (card)
+# to select zero page, sta 0xc008 | bank
+# to select ordinary memory (for writing), sta 0xc004 | bank
+zpage_bank = 0
+ordinary_bank = 0
+
+# to select ordinary memory (for reading), sta 0xc002 | bank
+# the lzss_unpack_(rev|fwd)_aux_mem routine needs to be patched accordingly
+# the rev routine defaults to bank 1 since this is normally unpacked first
+# the fwd routine defaults to bank 0 since this is normally unpacked first
+lzss_unpack_bank = int(rev and aux_mem)
+
+# language card can be in unknown state or known state
+# to place in known state, sta 0xc080 | one of below values:
LC_STATE_UNKNOWN = -1
LC_STATE_BANK2_RAM_WP = 0
LC_STATE_BANK2_ROM_WE = 1
]
)
+# lzss_unpack
+for i in range(0, len(segments), 2):
+ [addr0, addr1] = segments[i:i + 2]
+ if addr1 - addr0 > 0x100:
+ # there is a compressed segment
+ # the aux mem decompressor must be run from the stack
+ # this allows it to use hw_rdcardram without clobbering itself
+ if aux_mem:
+ addr0 = 0x100
+ addr1 = 0x100 + len(lzss_unpack)
+ data = lzss_unpack
+
+ if rev:
+ addr3 = -len(section_payload.data)
+ section_payload.data.extend(
+ data[::-1]
+ )
+ addr2 = -len(section_payload.data)
+
+ addr0 -= 1
+ addr2 -= 1
+ section_loader.fixups.extend(
+ [
+ (
+ FIXUP_FLAG_TARGET_END_RELATIVE |
+ FIXUP_FLAG_LO_BYTE |
+ FIXUP_FLAG_HI_BYTE,
+ len(section_loader.data) + 3,
+ section_payload,
+ addr2
+ ),
+ ]
+ )
+ section_loader.data.extend(
+ [
+ 0xa2, len(data), # ldx #count
+ 0xbd, 0x00, 0x00, # lda addr2,x
+ 0x9d, addr0 & 0xff, (addr0 >> 8) & 0xff, # sta addr0,x
+ 0xca, # dex
+ 0xd0, 0xf7 # bne .-7
+ ]
+ )
+ else:
+ addr2 = len(section_payload.data)
+ section_payload.data.extend(
+ data
+ )
+ addr3 = len(section_payload.data)
+
+ addr1 -= 0x100
+ addr3 -= 0x100
+ section_loader.fixups.extend(
+ [
+ (
+ FIXUP_FLAG_LO_BYTE | FIXUP_FLAG_HI_BYTE,
+ len(section_loader.data) + 3,
+ section_payload,
+ addr3
+ ),
+ ]
+ )
+ section_loader.data.extend(
+ [
+ 0xa2, -len(data) & 0xff, # ldx #-count
+ 0xbd, 0x00, 0x00, # lda addr3,x
+ 0x9d, addr1 & 0xff, (addr1 >> 8) & 0xff, # sta addr1,x
+ 0xe8, # inx
+ 0xd0, 0xf7 # bne .-7
+ ]
+ )
+ else:
+ section_lzss_unpack.data.extend(
+ lzss_unpack
+ )
+ break
+
# segments
for i in range(0, len(segments), 2):
- addr0 = segments[i]
- addr1 = segments[i + 1]
+ [addr0, addr1] = segments[i:i + 2]
data = list(intelhex.tobinstr(addr0, addr1 - 1))
addr0_save = addr0
addr1_save = addr1
- if addr0 < 0xc000:
- pass
- elif addr0 < 0xd000:
- assert addr1 <= 0xd000
- if lc_state != LC_STATE_BANK1_RAM_WE:
- lc_state = LC_STATE_BANK1_RAM_WE
+
+ bank = addr0 >> 16
+ addr0 -= bank << 16
+ addr1 -= bank << 16
+
+ if addr1 <= 0x200:
+ if bank != zpage_bank:
+ zpage_bank = bank
section_loader.data.extend(
[
- 0x8d, 0x80 | lc_state, 0xc0 # sta hw_lc_bank1_ram_we *2
- ] * 2
+ 0x8d, 0x08 | bank, 0xc0 # sta hw_set(std|alt)zp
+ ]
+ )
+ else:
+ if len(data) > 0x100 and bank != lzss_unpack_bank:
+ lzss_unpack_bank = bank
+ assert aux_mem and lzss_unpack[-0x11:-0xe] == [
+ 0x8d, 0x02 | rev, 0xc0 # sta hw_rd(main|card)ram
+ ]
+ section_loader.fixups.extend(
+ [
+ (
+ FIXUP_FLAG_LO_BYTE | FIXUP_FLAG_HI_BYTE,
+ len(section_loader.data) + 3,
+ section_lzss_unpack,
+ len(lzss_unpack) - 0x10
+ ),
+ ]
+ )
+ section_loader.data.extend(
+ [
+ 0xa9, 0x02 | bank, # lda #<hw_rd(main|card)ram
+ 0x8d, 0x00, 0x00, # sta lzss_unpack + len(lzss_unpack) - 0x10
+ ]
+ )
+
+ if bank != ordinary_bank:
+ ordinary_bank = bank
+ section_loader.data.extend(
+ [
+ 0x8d, 0x04 | bank, 0xc0 # sta hw_wr(main|card)ram
+ ]
)
- addr0 += 0x1000
- addr1 += 0x1000
- elif addr0 < 0x10000:
- if lc_state != LC_STATE_BANK2_RAM_WE:
- lc_state = LC_STATE_BANK2_RAM_WE
+
+ if addr0 >= 0xc000:
+ new_lc_state = LC_STATE_BANK2_RAM_WE
+ if addr0 < 0xd000:
+ new_lc_state = LC_STATE_BANK1_RAM_WE
+ addr0 += 0x1000
+ addr1 += 0x1000
+ if new_lc_state != lc_state:
+ lc_state = new_lc_state
section_loader.data.extend(
[
- 0x8d, 0x80 | lc_state, 0xc0 # sta hw_lc_bank2_ram_we *2
+ 0x8d, 0x80 | lc_state, 0xc0 # sta hw_lc_bankN_ram_we *2
] * 2
)
- else:
- assert False
if len(data) <= 4:
report.append(
(REPORT_TYPE_COMPRESSED, addr0_save, addr1_save, addr2, addr3)
)
- if len(section_lzss_unpack.data) == 0:
- section_lzss_unpack.data.extend(
- lzss_unpack_rev_or_fwd
- )
-
if rev:
addr3 -= 5 + 1
section_loader.fixups.extend(
)
# epilogue
+if zpage_bank:
+ section_loader.data.extend(
+ [
+ 0x8d, 0x08, 0xc0 # sta hw_setstdzp
+ ]
+ )
+if ordinary_bank:
+ section_loader.data.extend(
+ [
+ 0x8d, 0x04, 0xc0 # sta hw_wrmainram
+ ]
+ )
section_loader.data.extend(
[
0x4c, entry_point & 0xff, entry_point >> 8, # jmp entry_point
load_size = end_addr - load_addr
for report_type, addr0, addr1, addr2, addr3 in report:
- if report_type == REPORT_TYPE_DIRECT_POKE:
- print(f'[0x{addr0:04x}, 0x{addr1:04x})')
- else:
- offset = section_payload.load_addr + len(section_payload.data)
+ text = (
+ f'[0x{addr0:05x}, 0x{addr1:05x})'
+ if aux_mem else
+ f'[0x{addr0:04x}, 0x{addr1:04x})'
+ )
+ if report_type >= REPORT_TYPE_UNCOMPRESSED:
+ offset = section_payload.load_addr
+ if rev:
+ offset += len(section_payload.data)
addr2 += offset
addr3 += offset
- print(
- f'[0x{addr0:04x}, 0x{addr1:04x}) -> [0x{addr2:04x}, 0x{addr3:04x})' + (
- f'{100. * (addr3 - addr2) / (addr1 - addr0):6.1f}%'
- if report_type == REPORT_TYPE_COMPRESSED else
- ''
- )
- )
+ text += f' -> [0x{addr2:04x}, 0x{addr3:04x})'
+ if report_type >= REPORT_TYPE_COMPRESSED:
+ text += f'{100. * (addr3 - addr2) / (addr1 - addr0):6.1f}%'
+ print(text)
+
+# aux mem decompressor runs from stack, redirect its fixups to stack
+if len(section_lzss_unpack.data) == 0:
+ section_lzss_unpack.load_addr = 0x100
bin = []
for section in sections:
+; with AUX_MEM set we can decompress into aux memory, but we need
+; some help from caller: caller must "sta hw_wrcardram" before the
+; call, and also patch the first "sta hw_rdmainram" in the below
+; code to "sta hw_rdcardram" (needed for copying previous output)
+AUX_MEM = 0
+
+; write
+hw_rdmainram = 0xc002
+hw_rdcardram = 0xc003
+hw_wrmainram = 0xc004
+hw_wrcardram = 0xc005
+
.r65c02
.area zpage
sbc len ; always overflows leaving cf = 0
tay
+.if AUX_MEM
+ sta hw_rdmainram ; patch this to wrcardram as required
+.endif
+
; copy previous data
1$: lda [dist],y
sta [dest],y
bne 1$
; dest += 0x100, src += 1, process LZSS item
+.if AUX_MEM
+ sta hw_rdmainram
+ jmp loop0 ; beq will not reach in this case
+.else
beq loop0
+.endif
done: rts
+; with AUX_MEM set we can decompress into aux memory, but we need
+; some help from caller: caller must "sta hw_wrcardram" before the
+; call, and also patch the first "sta hw_rdmainram" in the below
+; code to "sta hw_rdcardram" (needed for copying previous output)
+AUX_MEM = 0
+
+; write
+hw_rdmainram = 0xc002
+hw_rdcardram = 0xc003
+hw_wrmainram = 0xc004
+hw_wrcardram = 0xc005
+
.r65c02
.area zpage
adc dist + 1
sta dist + 1
+.if AUX_MEM
+ sta hw_rdcardram ; patch this to wrmainram as required
+.endif
+
; copy previous data
1$: lda [dist],y
sta [dest],y
bne 1$
; src += 1, process LZSS item
+.if AUX_MEM
+ sta hw_rdmainram
+ jmp loop0 ; beq will not reach in this case
+.else
beq loop0
+.endif
done: rts
rm __temp__.bin
dhgr.ihx: dhgr.rel
- ${ASLINK} -n -m -u -i -b text=${LOAD_ADDR} $@ $^
+ ${ASLINK} -n -m -u -i -b text=${LOAD_ADDR} dhgr.i86 $^
+ mv dhgr.i86 $@
dhgr.rel: dhgr.asm
${AS6500} -l -o $<
${HEX2BIN} $< $@
dhgr_viewer.ihx: dhgr_viewer.rel
- ${ASLINK} -n -m -u -i -b text=${LOAD_ADDR} $@ $^
+ ${ASLINK} -n -m -u -i -b text=${LOAD_ADDR} dhgr_viewer.i86 $^
+ mv dhgr_viewer.i86 $@
dhgr_viewer.rel: dhgr_viewer.asm
${AS6500} -l -o $<
.PHONY: clean
clean:
- rm -f *.a2bin *.bin *.hlr *.ihx *.lst *.map *.rel *.rst test.dsk
+ rm -f \
+*.a2bin \
+*.bin \
+*.hlr \
+*.i86 \
+*.ihx \
+*.lst \
+*.map \
+*.rel \
+*.rst \
+test.dsk
; display DHGR image by copying hires screen 0 to aux of hires screen 1
-; read/write
+hires_screen0 = 0x2000
+hires_screen1 = 0x4000
+hires_screen_size = 0x2000
+
+rom_a1 = 0x3c ; source addr
+rom_a2 = 0x3e ; source end (inclusive)
+rom_a4 = 0x42 ; dest addr
+rom_auxmove = 0xc311 ; cf=0 aux->main, cf=1 main->aux
+
+; read these
+hw_kbd = 0xc000
hw_clrtext = 0xc050
hw_settext = 0xc051
hw_clrmixed = 0xc052
hw_setioudis = 0xc07e
hw_clrioudis = 0xc07f
-; read
-hw_kbd = 0xc000
-
-; write
-hw_clr80col = 0xc000
-hw_set80col = 0xc001
+; write these
+hw_clr80store = 0xc000
+hw_set80store = 0xc001
hw_clr80vid = 0xc00c
hw_set80vid = 0xc00d
hw_kbdstrb = 0xc010
.area text
- sta hw_clr80col
+ lda #<hires_screen0
+ sta rom_a1
+ sta rom_a4
+ lda #>hires_screen0
+ sta rom_a1 + 1
+ lda #>hires_screen1
+ sta rom_a4 + 1
+ lda #<(hires_screen0 + hires_screen_size - 1)
+ sta rom_a2
+ lda #>(hires_screen0 + hires_screen_size - 1)
+ sta rom_a2 + 1
+ sec
+ jsr rom_auxmove
+
+ sta hw_clr80store
lda hw_clrioudis
lda hw_sethires
public / star_disasm.git / commitdiff