Change long division to use bc register and to do 64 by 32 bit division

diff --git a/sm3.asm b/sm3.asm
index 594b2e4..204cf2c 100644 (file)
--- a/sm3.asm
+++ b/sm3.asm
@@ -730,7 +730,9 @@ mul_l_entry:
 page2_imm_divrev_sl:
        rst     0x38
        ;.db    0x3e ; ld a,
-       call    math_div_sl0
+       ex      de,hl
+       push    bc
+       call    math_div_sl1
        jr      div_l_done
 page2_div_sl:
        ;rst    0x30
@@ -738,14 +740,16 @@ page2_div_sl:
        exx
        pop     de
        exx
-       call    math_div_sl0
+       ex      de,hl
+       push    bc
+       call    math_div_sl1
        jr      div_l_done
 
 page2_imm_div_sl:
        rst     0x38
        ;.db    0x3e ; ld a,
-       ex      de,hl
-       call    math_div_sl
+       push    bc
+       call    math_div_sl0
        jr      div_l_done
 page2_divrev_sl:
        ;rst    0x30
@@ -753,14 +757,16 @@ page2_divrev_sl:
        exx
        pop     de
        exx
-       ex      de,hl
-       call    math_div_sl
+       push    bc
+       call    math_div_sl0
        jr      div_l_done
 
 page2_imm_divrev_ul:
        rst     0x38
        ;.db    0x3e ; ld a,
-       call    math_div_ul0
+       ex      de,hl
+       push    bc
+       call    math_div_ul1
        jr      div_l_done
 page2_div_ul:
        ;rst    0x30
@@ -768,14 +774,16 @@ page2_div_ul:
        exx
        pop     de
        exx
-       call    math_div_ul0
+       ex      de,hl
+       push    bc
+       call    math_div_ul1
        jr      div_l_done
 
 page2_imm_div_ul:
        rst     0x38
        ;.db    0x3e ; ld a,
-       ex      de,hl
-       call    math_div_ul
+       push    bc
+       call    math_div_ul0
        jr      div_l_done
 page2_divrev_ul:
        ;rst    0x30
@@ -783,9 +791,10 @@ page2_divrev_ul:
        exx
        pop     de
        exx
-       ex      de,hl
-       call    math_div_ul
+       push    bc
+       call    math_div_ul0
 div_l_done:
+       pop     bc
        exx
        push    de
        exx
@@ -2143,164 +2152,176 @@ div_w_n18: ; done, below
        scf
        ret
 
-math_div_sl0: ; hl':hl, de':de = de':hl % hl':de, de':hl / hl':de, signed
+math_div_sl0: ; hl':hl, de':de = hl':de % de':hl, hl':de / de':hl, signed
        exx
        ex      de,hl
        exx
-math_div_sl: ; ; hl':hl, de':de = hl':hl % de':de, hl':hl / de':de, signed
-       push    bc
+math_div_sl1: ; ; hl':hl, de':de = de':de % hl':hl, de':de / hl':hl, signed
        exx
-       ld      a,h
-       or      a
+       ld      c,l
+       ld      b,h
        ld      a,d
        rla
+       sub     a,a
+       ld      l,a
+       ld      h,a
        exx
-       jp      m,div_l_n               ; positive dividend
-
-       ; positive dividend
        ld      c,l
        ld      b,h
-       ld      hl,0
+       ld      l,a
+       ld      h,a
+math_div_sl:
+       ; hl':hl, de':de =
+       ;   hl':hl:de':de % bc':bc, hl':hl:de':de / bc':bc, signed
        exx
        ld      a,h
-       ld      c,l
-       ld      hl,0
+       or      a
+       ld      a,b
+       rla
+       ;exx
+       jp      m,div_l_n               ; positive dividend
+
+       ; positive dividend
+       ;exx
+       ld      a,d
        exx
        jr      nc,div_l_pp             ; positive dividend, positive divisor
 
        ; positive dividend, negative divisor
        call    div_l_n1
        exx
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        exx
        call    div_l_ncf
        exx
-       ld      c,a
+       ld      e,a
        exx
-       ld      a,b
+       ld      a,d
        call    div_l_ncf
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        call    div_l_ncf
        inc     a
-       jr      c,div_l_p_done
-       sbc     hl,de
+       ld      e,a
+       ret     c
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       jr      div_l_p_done
+       ret
 
 div_l_n:
+ exx
        ; negative dividend
-       call    dec_l                   ; reduces remainder by 1 (we inc later)
-       ld      c,l
-       ld      b,h
-       ld      hl,-1
+       ld      a,e
+       or      d
+       dec     de                      ; reduces remainder by 1 (we inc later)
        exx
-       ld      a,h
-       ld      c,l
-       ld      hl,-1
+       jr      nz,1$
+       dec     de
+1$:    ld      a,d
        exx
        jr      c,div_l_nn              ; negative dividend, negative divisor 
 
        ; negative dividend, positive divisor
        call    div_l1
        exx
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        exx
        call    div_lcf
        exx
-       ld      c,a
+       ld      e,a
        exx
-       ld      a,b
+       ld      a,d
        call    div_lcf
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        call    div_lcf
        inc     a
-       jr      c,div_l_n_done
-       sbc     hl,de
+       ld      e,a
+       jr      c,2$
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
+       exx
+2$:    inc     hl                      ; get into range divisor+1..0
+       ld      a,l
+       or      h
+       ret     nz
+       exx
+       inc     hl
        exx
-       jr      div_l_n_done
+       ret
 
-math_div_ul0: ; hl:hl', de:de' = hl:de' % de:hl', hl:de' / de:hl', unsigned
+math_div_ul0: ; hl':hl, de':de = hl':de % de':hl, hl':de / de':hl, unsigned
        exx
        ex      de,hl
        exx
-math_div_ul: ; ; hl:hl', de:de' = hl:hl' % de:de', hl:hl' / de:de', unsigned
-       push    bc
+math_div_ul1: ; ; hl':hl, de':de = de':de % hl':hl, de':de / hl':hl, unsigned
        ld      c,l
        ld      b,h
-       ld      hl,0
+       sub     a
+       ld      l,a
+       ld      h,a
        exx
-       ld      a,h
        ld      c,l
-       ld      hl,0
+       ld      b,h
+       ld      l,a
+       ld      h,a
+       ;exx
+;math_div_ul:
+       ; hl':hl, de':de =
+       ;   hl':hl:de':de % bc':bc, hl':hl:de':de / bc':bc, unsigned
+       ;exx
+       ld      a,d
        exx
 div_l_pp: ; positive dividend, positive divisor
        call    div_l0
        exx
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        exx
        call    div_lcf
        exx
-       ld      c,a
+       ld      e,a
        exx
-       ld      a,b
+       ld      a,d
        call    div_lcf
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        call    div_lcf
-       jr      nc,div_l_p_done
-       add     hl,de
-       exx
-       adc     hl,de
-       exx
-div_l_p_done:
        ld      e,a
-       ld      d,b
+       ret     nc
+       add     hl,bc
        exx
-       ld      e,c
-       ld      d,b
+       adc     hl,bc
        exx
-       pop     bc
        ret
 
 div_l_nn: ; negative dividend, negative divisor
        call    div_l_n0
        exx
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        exx
        call    div_l_ncf
        exx
-       ld      c,a
+       ld      e,a
        exx
-       ld      a,b
+       ld      a,d
        call    div_l_ncf
-       ld      b,a
-       ld      a,c
+       ld      d,a
+       ld      a,e
        call    div_l_ncf
-       jr      nc,div_l_n_done
-       add     hl,de
-       exx
-       adc     hl,de
-       exx
-div_l_n_done:
        ld      e,a
-       ld      d,b
+       jr      nc,1$
+       add     hl,bc
        exx
-       ld      e,c
-       ld      d,b
+       adc     hl,bc
        exx
-       pop     bc
-inc_l:                                 ; get into range divisor+1..0
-       inc     hl
+1$:    inc     hl                      ; get into range divisor+1..0
        ld      a,l
        or      h
        ret     nz
@@ -2309,16 +2330,6 @@ inc_l:                                   ; get into range divisor+1..0
        exx
        ret
 
-dec_l:
-       ld      a,l
-       or      h
-       dec     hl
-       ret     nz
-       exx
-       dec     hl
-       exx
-       ret
-
 ; non-restoring division routine
 ; see earlier comments for the word version, this extends the concept to long
 
@@ -2333,9 +2344,9 @@ div_l0: ; bit 0, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l01
        dec     a
@@ -2345,9 +2356,9 @@ div_l11: ; bit 1, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l12
        inc     a
@@ -2357,9 +2368,9 @@ div_l02: ; bit 2, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l03
        dec     a
@@ -2369,9 +2380,9 @@ div_l13: ; bit 3, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l14
        inc     a
@@ -2381,9 +2392,9 @@ div_l04: ; bit 4, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l05
        dec     a
@@ -2393,9 +2404,9 @@ div_l15: ; bit 5, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l16
        inc     a
@@ -2405,9 +2416,9 @@ div_l06: ; bit 6, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l07
        dec     a
@@ -2417,9 +2428,9 @@ div_l17: ; bit 7, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l18
        inc     a
@@ -2435,9 +2446,9 @@ div_l1: ; bit 0, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l11
        inc     a
@@ -2447,9 +2458,9 @@ div_l01: ; bit 1, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l02
        dec     a
@@ -2459,9 +2470,9 @@ div_l12: ; bit 2, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l13
        inc     a
@@ -2471,9 +2482,9 @@ div_l03: ; bit 3, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l04
        dec     a
@@ -2483,9 +2494,9 @@ div_l14: ; bit 4, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l15
        inc     a
@@ -2495,9 +2506,9 @@ div_l05: ; bit 5, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l06
        dec     a
@@ -2507,9 +2518,9 @@ div_l16: ; bit 6, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      nc,div_l17
        inc     a
@@ -2519,9 +2530,9 @@ div_l07: ; bit 7, above
        exx
        adc     hl,hl
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      nc,div_l08
        dec     a
@@ -2545,9 +2556,9 @@ div_l_n0: ; bit 0, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n01
        dec     a
@@ -2557,9 +2568,9 @@ div_l_n11: ; bit 1, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n12
        inc     a
@@ -2570,9 +2581,9 @@ div_l_n02: ; bit 2, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n03
        dec     a
@@ -2582,9 +2593,9 @@ div_l_n13: ; bit 3, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n14
        inc     a
@@ -2595,9 +2606,9 @@ div_l_n04: ; bit 4, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n05
        dec     a
@@ -2607,9 +2618,9 @@ div_l_n15: ; bit 5, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n16
        inc     a
@@ -2620,9 +2631,9 @@ div_l_n06: ; bit 6, above
        adc     hl,hl
        or      a
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n07
        dec     a
@@ -2632,9 +2643,9 @@ div_l_n17: ; bit 7, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n18
        inc     a
@@ -2650,9 +2661,9 @@ div_l_n1: ; bit 0, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n11
        inc     a
@@ -2663,9 +2674,9 @@ div_l_n01: ; bit 1, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n02
        dec     a
@@ -2675,9 +2686,9 @@ div_l_n12: ; bit 2, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n13
        inc     a
@@ -2688,9 +2699,9 @@ div_l_n03: ; bit 3, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n04
        dec     a
@@ -2700,9 +2711,9 @@ div_l_n14: ; bit 4, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n15
        inc     a
@@ -2713,9 +2724,9 @@ div_l_n05: ; bit 5, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n06
        dec     a
@@ -2725,9 +2736,9 @@ div_l_n16: ; bit 6, below
        exx
        adc     hl,hl
        exx
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        jp      c,div_l_n17
        inc     a
@@ -2738,9 +2749,9 @@ div_l_n07: ; bit 7, above
        adc     hl,hl
        exx
        or      a
-       sbc     hl,de
+       sbc     hl,bc
        exx
-       sbc     hl,de
+       sbc     hl,bc
        exx
        jp      c,div_l_n08
        dec     a