rst 0x28
.db 0x3e ; ld a,
page1_div_sw:
- pop hl
- call math_div_sw
+ pop hl
+ push bc
+ call math_div_sw0
jr div_w_done
page1_imm_div_sw:
.db 0x3e ; ld a,
page1_divrev_sw:
pop hl
- call math_div_sw0
+ push bc
+ call math_div_sw1
jr div_w_done
page1_imm_divrev_uw:
.db 0x3e ; ld a,
page1_div_uw:
pop hl
- call math_div_uw
+ push bc
+ call math_div_uw0
jr div_w_done
page1_imm_div_uw:
.db 0x3e ; ld a,
page1_divrev_uw:
pop hl
- call math_div_uw0
+ push bc
+ call math_div_uw1
jr div_w_done
; page 1 to 2
jp (hl)
div_w_done:
+ pop bc
push de
mul_w_done:
ex de,hl
exx
ret
-math_div_sw0: ; hl, de = de % hl, de / hl, signed
+math_div_sw0: ; hl, de = hl % de, hl / de, signed
ex de,hl
-math_div_sw: ; hl, de = hl % de, hl / de, signed
- push bc
+math_div_sw1: ; hl, de = de % hl, de / hl, signed
+ ld c,l
+ ld b,h
+ ld a,d
+ rla
+ sbc a,a
+ ld l,a
+ ld h,a
+math_div_sw: ; hl, de = hl:de % bc, hl:de / bc, signed
ld a,h
or a
- ld a,d
+ ld a,b
rla
jp m,div_w_n ; positive dividend
; positive dividend
- ld a,h
- ld c,l
- ld hl,0
+ ld a,d
jr nc,div_w_pp ; positive dividend, positive divisor
; positive dividend, negative divisor
call div_w_n1
- ld b,a
- ld a,c
+ ld d,a
+ ld a,e
call div_w_ncf
inc a
- jr c,1$
- sbc hl,de
-1$: ld d,b
ld e,a
- pop bc
+ ret c
+ sbc hl,bc
ret
div_w_n:
; negative dividend
- dec hl ; reduces remainder by 1 (we inc later)
- ld a,h
- ld c,l
- ld hl,-1
+ dec de ; reduces remainder by 1 (we inc later)
+ ld a,d
jr c,div_w_nn ; negative dividend, negative divisor
; negative dividend, positive divisor
call div_w1
- ld b,a
- ld a,c
+ ld d,a
+ ld a,e
call div_wcf
inc a
- jr c,1$
- sbc hl,de
-1$: inc hl ; get into range -divisor+1..0
- ld d,b
ld e,a
- pop bc
+ inc hl ; get into range -divisor+1..0
+ ret c
+ sbc hl,bc
ret
div_w_nn: ; negative dividend, negative divisor
call div_w_n0
- ld b,a
- ld a,c
+ ld d,a
+ ld a,e
call div_w_ncf
- jr nc,1$
- add hl,de
-1$: inc hl ; get into range divisor+1..0
- ld d,b
ld e,a
- pop bc
+ inc hl ; get into range divisor+1..0
+ ret nc
+ add hl,bc
ret
-math_div_uw0: ; hl, de = de % hl, de / hl, unsigned
+math_div_uw0: ; hl, de = hl % de, hl / de, unsigned
ex de,hl
-math_div_uw: ; hl, de = hl % de, hl / de, unsigned
- push bc
- ld a,h
+math_div_uw1: ; hl, de = de % hl, de / hl, unsigned
ld c,l
+ ld b,h
ld hl,0
+math_div_uw: ; hl, de = hl:de % bc, hl:de / bc, unsigned
+ ld a,d
div_w_pp: ; positive dividend, positive divisor
call div_w0
- ld b,a
- ld a,c
+ ld d,a
+ ld a,e
call div_wcf
- jr nc,1$
- add hl,de
-1$: ld d,b
ld e,a
- pop bc
+ ret nc
+ add hl,bc
ret
; non-restoring division routine
scf
rla
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w01
dec a
div_w11: ; bit 1, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w12
inc a
div_w02: ; bit 2, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w03
dec a
div_w13: ; bit 3, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w14
inc a
div_w04: ; bit 4, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w05
dec a
div_w15: ; bit 5, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w16
inc a
div_w06: ; bit 6, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w07
dec a
div_w17: ; bit 7, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w18
inc a
div_w08: ; done, above
div_w1: ; bit 0, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w11
inc a
div_w01: ; bit 1, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w02
dec a
div_w12: ; bit 2, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w13
inc a
div_w03: ; bit 3, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w04
dec a
div_w14: ; bit 4, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w15
inc a
div_w05: ; bit 5, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w06
dec a
div_w16: ; bit 6, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr nc,div_w17
inc a
div_w07: ; bit 7, above
add a,a
adc hl,hl
- sbc hl,de
+ sbc hl,bc
jr nc,div_w08
dec a
div_w18: ; done, below
add a,a
;inc a
- ;dec a ; compensation
+ ;bcc a ; compensation
scf
ret
; divn0/1 are the same as div0/1 but carry reversed after add/subtract divisor
; this is for negative divisors where we expect carry (means no zero crossing)
-; when divisor negated, remainder also negated, so we expect to do subtraction
-; when remainder negative and vice versa, need to clear carry after add hl,hl
+; when divisor negated, remainbcr also negated, so we expect to do subtraction
+; when remainbcr negative and vice versa, need to clear carry after add hl,hl
div_w_ncf:
jr c,div_w_n1
rla
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n01
dec a
div_w_n11: ; bit 1, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n12
inc a
div_w_n02: ; bit 2, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n03
dec a
div_w_n13: ; bit 3, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n14
inc a
div_w_n04: ; bit 4, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n05
dec a
div_w_n15: ; bit 5, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n16
inc a
div_w_n06: ; bit 6, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n07
dec a
div_w_n17: ; bit 7, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n18
inc a
div_w_n08: ; done, above
div_w_n1: ; bit 0, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n11
inc a
div_w_n01: ; bit 1, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n02
dec a
div_w_n12: ; bit 2, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n13
inc a
div_w_n03: ; bit 3, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n04
dec a
div_w_n14: ; bit 4, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n15
inc a
div_w_n05: ; bit 5, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n06
dec a
div_w_n16: ; bit 6, below
add a,a
adc hl,hl
- add hl,de
+ add hl,bc
jr c,div_w_n17
inc a
div_w_n07: ; bit 7, above
add a,a
adc hl,hl
or a
- sbc hl,de
+ sbc hl,bc
jr c,div_w_n08
dec a
div_w_n18: ; done, below
add a,a
;inc a
- ;dec a ; compensation
+ ;bcc a ; compensation
scf
ret