Make word and long multiplication use bc register

diff --git a/sm3.asm b/sm3.asm
index e213385..ed742c4 100644 (file)
--- a/sm3.asm
+++ b/sm3.asm
@@ -397,12 +397,13 @@ page1_srrev_uw:
        jr      mul_w_done
 
 page1_imm_mul_uw:
-       call    math_mul_imm_w
-       jr      mul_w_done
-
+       rst     0x28
+       .db     0x3e ; ld a,
 page1_mul_w:
        pop     hl
-       call    math_mul_w
+       push    bc
+       call    math_mul_w0
+       pop     bc
        jr      mul_w_done
 
 page1_imm_divrev_sw:
@@ -704,8 +705,9 @@ page2_srrev_ul:
        jr      mul_l_done
 
 page2_imm_mul_ul:
-       call    math_mul_imm_l
-       jr      mul_l_done
+       rst     0x38
+       ;.db    0x3e
+       jr      mul_l_entry
 
 page2_mul_l:
        ;rst    0x30
@@ -713,8 +715,11 @@ page2_mul_l:
        exx
        pop     de
        exx
+mul_l_entry:
        ex      de,hl
-       call    math_mul_l
+       push    bc
+       call    math_mul_l0
+       pop     bc
        jr      mul_l_done
 
 page2_imm_divrev_sl:
@@ -1621,109 +1626,77 @@ sr_l_entry:
        exx
        ret
 
-; this routine is just an optimization, therefore use interpreter registers
-math_mul_imm_w: ; de *= imm_w, big-endian imm_w
-       ld      hl,0
-       ld      a,(bc)
-       inc     bc
-       call    mul_w0
-       ld      a,(bc)
-       inc     bc
-       call    mul_w
-       ex      de,hl
-       ret
-
-math_mul_w: ; hl *= de
-       ld      a,l
-       push    af
-       ld      a,h
+math_mul_w0: ; hl *= de
+       ld      c,l
+       ld      b,h
        ld      hl,0
+math_mul_w: ; hl += bc * de
+       ld      a,d
        call    mul_w0
-       pop     af
+       ld      a,e
 mul_w: ; bit 0
        add     hl,hl
 mul_w0:        rla
        jr      nc,1$
-       add     hl,de
+       add     hl,bc
 1$:    ; bit 1
        add     hl,hl
        rla
        jr      nc,2$
-       add     hl,de
+       add     hl,bc
 2$:    ; bit 2
        add     hl,hl
        rla
        jr      nc,3$
-       add     hl,de
+       add     hl,bc
 3$:    ; bit 3
        add     hl,hl
        rla
        jr      nc,4$
-       add     hl,de
+       add     hl,bc
 4$:    ; bit 4
        add     hl,hl
        rla
        jr      nc,5$
-       add     hl,de
+       add     hl,bc
 5$:    ; bit 5
        add     hl,hl
        rla
        jr      nc,6$
-       add     hl,de
+       add     hl,bc
 6$:    ; bit 6
        add     hl,hl
        rla
        jr      nc,7$
-       add     hl,de
+       add     hl,bc
 7$:    ; bit 7
        add     hl,hl
        rla
        ret     nc
-       add     hl,de
-       ret
-
-; this routine is just an optimization, therefore use interpreter registers
-math_mul_imm_l: ; hl':de *= imm_l, big-endian imm_l
-       sub     a
-       ld      l,a
-       ld      h,a
-       exx     
-       ex      de,hl
-       ld      l,a
-       ld      h,a
-       exx
-       ld      a,(bc)
-       inc     bc
-       call    mul_l0
-       ld      a,(bc)
-       inc     bc
-       call    mul_l
-       ld      a,(bc)
-       inc     bc
-       call    mul_l
-       ld      a,(bc)
-       inc     bc
-       call    mul_l
-       ex      de,hl
+       add     hl,bc
        ret
 
-math_mul_l: ; hl':hl *= de':de
-       ld      a,l
-       push    af
-       push    hl
+math_mul_l0: ; hl':hl *= de':de
+       ld      c,l
+       ld      b,h
        ld      hl,0
        exx
-       ld      a,l
-       push    af
-       ld      a,h
+       ld      c,l
+       ld      b,h
        ld      hl,0
        exx
+math_mul_l: ; hl':hl += de':de * bc':bc
+       exx
+       ld      a,d
+       exx
        call    mul_l0
-       pop     af
+       exx
+       ld      a,e
+       exx
        call    mul_l
-       pop     af
+       ld      a,d
        call    mul_l
-       pop     af
+       ld      a,e
 mul_l: ; bit 0
        add     hl,hl
        exx
@@ -1731,9 +1704,9 @@ mul_l:    ; bit 0
        exx
 mul_l0:        rla
        jr      nc,1$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 1$:    ; bit 1
        add     hl,hl
@@ -1742,9 +1715,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,2$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 2$:    ; bit 2
        add     hl,hl
@@ -1753,9 +1726,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,3$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 3$:    ; bit 3
        add     hl,hl
@@ -1764,9 +1737,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,4$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 4$:    ; bit 4
        add     hl,hl
@@ -1775,9 +1748,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,5$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 5$:    ; bit 5
        add     hl,hl
@@ -1786,9 +1759,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,6$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 6$:    ; bit 6
        add     hl,hl
@@ -1797,9 +1770,9 @@ mul_l0:   rla
        exx
        rla
        jr      nc,7$
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
 7$:    ; bit 7
        add     hl,hl
@@ -1808,9 +1781,9 @@ mul_l0:   rla
        exx
        rla
        ret     nc
-       add     hl,de
+       add     hl,bc
        exx
-       adc     hl,de
+       adc     hl,bc
        exx
        ret