ret
.db 0
; rst 0x30, pop hl:de'
- pop hl
- exx
- pop de
- exx
- ex (sp),hl
- ret
+ ;pop hl
+ ;exx
+ ;pop de
+ ;exx
+ ;ex (sp),hl
+ ;ret
+ .db 0,0,0,0,0,0
.db 0,0
- ; rst 0x38, immediate to hl:de'
+ ; rst 0x38, immediate to de':hl
+ ld a,(bc)
+ inc bc
+ ld l,a
+ ld a,(bc)
+ inc bc
+ ld h,a
ld a,(bc)
inc bc
exx
exx
ld d,a
exx
- ld a,(bc)
- inc bc
- ld l,a
- ld a,(bc)
- inc bc
- ld h,a
ret
restarts_end:
; page 0 to 2
page0_page2:
+ pop de
exx
pop hl
exx
- pop de
jr page0_dispatch2
page0_stkld_l:
jr page1_dispatch2
page1_sl_l:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
call math_sl_l0
jr page1_dispatch2
jr page1_dispatch2
page1_sr_sl:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
call math_sr_sl0
jr page1_dispatch2
jr page1_dispatch2
page1_sr_ul:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
call math_sr_ul0
page1_dispatch2:
ld a,(bc)
; page 2 to 0
page2_page0:
- push de
exx
push hl
exx
+ push de
jr page2_dispatch0
page2_stkst_l:
jr add_l_entry
page2_add_l:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
-add_l_entry:
- exx
+add_l_entry: ; optimize this
add hl,de
exx
adc hl,de
+ exx
jr add_l_done
page2_imm_subrev_l:
jr sub_l_entry
page2_sub_l:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
-sub_l_entry:
- exx
- ex de,hl
+sub_l_entry: ; optimize this
or a
sbc hl,de
exx
+ ex de,hl
sbc hl,de
+ exx
jr add_l_done
; use addition for page2_imm_sub_l
page2_subrev_l:
;rst 0x30
- exx
- pop de
- exx
pop hl
- exx
+ ;exx
+ ;pop de
+ ;exx
+ ex de,hl
or a
sbc hl,de
- exx
- ex de,hl
+ exx
+ pop de
sbc hl,de
jr add_l_done
page2_mul_l:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
ex de,hl
call math_mul_l
jr mul_l_done
jr div_l_done
page2_div_sl:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
call math_div_sl0
jr div_l_done
jr div_l_done
page2_divrev_sl:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
ex de,hl
call math_div_sl
jr div_l_done
jr div_l_done
page2_div_ul:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
call math_div_ul0
jr div_l_done
jr div_l_done
page2_divrev_ul:
;rst 0x30
+ pop hl
exx
pop de
exx
- pop hl
ex de,hl
call math_div_ul
div_l_done:
- push de
exx
push de
exx
+ push de
mul_l_done:
ex de,hl
;page2_dispatch2h:
ld h,page1
jp (hl)
-math_imm_l: ; immediate to de:hl'
+math_imm_l: ; immediate to hl':de
+ ld a,(bc)
+ inc bc
+ ld e,a
+ ld a,(bc)
+ inc bc
+ ld d,a
ld a,(bc)
inc bc
exx
exx
ld h,a
exx
-;math_imm_w: ; immediate to de
- ld a,(bc)
- inc bc
- ld e,a
- ld a,(bc)
- inc bc
- ld d,a
;ret
ld a,(bc)
inc bc
inc bc
ld h,a
add hl,sp
-math_ld_l: ; (hl) to de:hl'
+math_ld_l: ; (hl) to hl':de
+ ld e,(hl)
+ inc hl
+ ld d,(hl)
+ inc hl
ld a,(hl)
inc hl
exx
ld l,a
exx
ld a,(hl)
- inc hl
exx
ld h,a
exx
- ld e,(hl)
- inc hl
- ld d,(hl)
;ret
ld a,(bc)
inc bc
inc bc
ld h,a
add hl,sp
-math_st_l: ; de:hl' to (hl)
+math_st_l: ; hl':de to (hl)
.if 0
call print_word
ld a,':
ld a,'
call print_char
.endif
+ ld (hl),e
+ inc hl
+ ld (hl),d
+ inc hl
exx
ld a,l
exx
ld a,h
exx
ld (hl),a
- inc hl
- ld (hl),e
- inc hl
- ld (hl),d
;ret
ld a,(bc)
inc bc
ld h,page0
jp (hl)
-math_and_imm_l: ; de:hl' &= imm_l
+math_and_imm_w: ; de &= imm_w
ld a,(bc)
inc bc
- exx
- and l
- ld l,a
- exx
+ and e
+ ld e,a
ld a,(bc)
inc bc
- exx
- and h
- ld h,a
- exx
-math_and_imm_w: ; de &= imm_w
+ and d
+ ld d,a
+ ;ret
+ ld a,(bc)
+ inc bc
+ ld l,a
+ ;ld h,page1
+ jp (hl)
+
+math_and_imm_l: ; hl':de &= imm_l
ld a,(bc)
inc bc
and e
inc bc
and d
ld d,a
+ ld a,(bc)
+ inc bc
+ exx
+ and l
+ ld l,a
+ exx
+ ld a,(bc)
+ inc bc
+ exx
+ and h
+ ld h,a
+ exx
;ret
ld a,(bc)
inc bc
ld l,a
- ;ld h,page1
+ ;ld h,page2
jp (hl)
math_and_w: ; de &= hl
jp (hl)
math_and_l0:
+ pop hl
exx
pop de
exx
- pop hl
-math_and_l: ; de:hl' &= hl:de'
+math_and_l: ; hl':de &= de':hl
+ ld a,e
+ and l
+ ld e,a
+ ld a,d
+ and h
+ ld d,a
exx
ld a,l
and e
and d
ld h,a
exx
-;math_and_imm_w: ; de &= imm_w
- ld a,e
- and l
- ld e,a
- ld a,d
- and h
- ld d,a
;ret
ld a,(bc)
inc bc
ld a,(bc)
inc bc
ld l,a
- ld h,page1
+ ;ld h,page1
jp (hl)
-math_or_imm_l: ; de:hl' |= imm_l
+math_or_imm_l: ; hl':de |= imm_l
+ ld a,(bc)
+ inc bc
+ or e
+ ld e,a
+ ld a,(bc)
+ inc bc
+ or d
+ ld d,a
ld a,(bc)
inc bc
exx
or h
ld h,a
exx
-;math_or_imm_w: ; de |= imm_w
- ld a,(bc)
- inc bc
- or e
- ld e,a
- ld a,(bc)
- inc bc
- or d
- ld d,a
;ret
ld a,(bc)
inc bc
jp (hl)
math_or_l0:
+ pop hl
exx
pop de
exx
- pop hl
-math_or_l: ; de:hl' |= hl:de'
+math_or_l: ; hl':de |= de':hl
+ ld a,e
+ or l
+ ld e,a
+ ld a,d
+ or h
+ ld d,a
exx
ld a,l
or e
or d
ld h,a
exx
-;math_or_w: ; de |= hl
- ld a,e
- or l
- ld e,a
- ld a,d
- or h
- ld d,a
;ret
ld a,(bc)
inc bc
;ld h,page1
jp (hl)
-math_xor_imm_l: ; de:hl' ^= imm_l
+math_xor_imm_l: ; hl':de ^= imm_l
+ ld a,(bc)
+ inc bc
+ xor e
+ ld e,a
+ ld a,(bc)
+ inc bc
+ xor d
+ ld d,a
ld a,(bc)
inc bc
exx
xor h
ld h,a
exx
-;math_xor_imm_w: ; de ^= imm_w
- ld a,(bc)
- inc bc
- xor e
- ld e,a
- ld a,(bc)
- inc bc
- xor d
- ld d,a
;ret
ld a,(bc)
inc bc
jp (hl)
math_xor_l0:
+ pop hl
exx
pop de
exx
- pop hl
-math_xor_l: ; de:hl' ^= hl:de'
+math_xor_l: ; hl':de ^= de':hl
+ ld a,e
+ xor l
+ ld e,a
+ ld a,d
+ xor h
+ ld d,a
exx
ld a,l
xor e
xor d
ld h,a
exx
-;math_xor_w: ; de ^= hl
- ld a,e
- xor l
- ld e,a
- ld a,d
- xor h
- ld d,a
;ret
ld a,(bc)
inc bc
; use inline code for math_cmp_uw, math_cmprev_uw
math_cmp_sl0:
+ pop hl
exx
pop de
exx
- pop hl
-math_cmp_sl: ; cf=1 de:hl' < hl:de', zf=1 de:hl' == hl:de', signed
- ex de,hl
+math_cmp_sl: ; cf=1 hl':de < de':hl, zf=1 hl':de == de':hl, signed
+ exx
or a
sbc hl,de
- jr z,cmp_l_entry
ld a,h
+ exx ; optimize this
+ jr z,cmp_l_entry
rla
;ret po
jp po,1$
jp (hl)
math_cmp_ul0:
+ pop hl
exx
pop de
+ exx ; optimize this
+math_cmp_ul: ; cf=1 hl':de < de':hl, zf=1 hl':de == de':hl, unsigned
exx
- pop hl
-math_cmp_ul: ; cf=1 de:hl' < hl:de', zf=1 de:hl' == hl:de', unsigned
- ex de,hl
or a
sbc hl,de
;ret nz
+ exx
jr nz,cmp_l_dispatch
cmp_l_entry:
- exx
+ ex de,hl
sbc hl,de
- exx
;ret
cmp_l_dispatch:
ld a,(bc)
jp (hl)
math_cmprev_sl0:
+ pop hl
exx
pop de
exx
- pop hl
-math_cmprev_sl: ; cf=1 hl:de' < de:hl', zf=1 hl:de' == de:hl', signed
+math_cmprev_sl: ; cf=1 de':hl < hl':de, zf=1 de':hl == hl':de, signed
+ exx
+ ex de,hl
or a
sbc hl,de
- jr z,cmprev_l_entry
ld a,h
+ exx ; optimize this
+ jr z,cmprev_l_entry
rla
;ret po
jp po,1$
jp (hl)
math_cmprev_ul0:
+ pop hl
exx
pop de
exx
- pop hl
-math_cmprev_ul: ; cf=1 de:hl' < hl:de', zf=1 de:hl' == hl:de', unsigned
+math_cmprev_ul: ; cf=1 de':hl < hl':de, zf=1 de':hl == hl':de, signed
+ exx
+ ex de,hl
or a
sbc hl,de
+ exx
;ret nz
jr nz,cmprev_l_dispatch
cmprev_l_entry:
- exx
- ex de,hl
sbc hl,de
- exx
;ret
cmprev_l_dispatch:
ld a,(bc)
ld l,0
ret
-math_sl_l0: ; hl:de' <<= e & 0x1f
+math_sl_l0: ; de':hl <<= e & 0x1f
exx
ex de,hl
exx
-math_sl_l: ; hl:hl' <<= e & 0x1f
+math_sl_l: ; hl':hl <<= e & 0x1f
; by 1
bit 0,e
jr z,1$
- exx
add hl,hl
exx
adc hl,hl
+ exx
1$: ; by 2
bit 1,e
jr z,2$
- exx
add hl,hl
exx
adc hl,hl
add hl,hl
exx
adc hl,hl
+ exx
2$: ; by 4
bit 2,e
jr z,3$
- exx
add hl,hl
exx
adc hl,hl
add hl,hl
exx
adc hl,hl
+ exx
3$: ; by 8
bit 3,e
jr z,4$
- exx
ld a,h
ld h,l
ld l,0
exx
ld h,l
ld l,a
+ exx
4$: ; by 16
bit 4,e
ret z
- exx
push hl
ld hl,0
exx
pop hl
+ exx
ret
math_sr_uw0: ; hl = de >> (l & 0xf), logical
sub a
jr sr_l_entry
-math_sr_sl0: ; hl:de' >>= e & 0x1f, arithmetic
+math_sr_sl0: ; de':hl >>= e & 0x1f, arithmetic
exx
ex de,hl
exx
-math_sr_sl: ; hl:hl' >>= e & 0x1f, arithmetic
+math_sr_sl: ; hl':hl >>= e & 0x1f, arithmetic
ld a,e
and 0xf
add 7
-math_sr_sl1: ; hl:hl' >>= a - 7, immediate a in [7, 0x27), arithmetic
+math_sr_sl1: ; hl':hl >>= a - 7, immediate a in [7, 0x27), arithmetic
ld e,a
+ exx
ld a,h
+ exx
rla
sbc a,a
sr_l_entry:
; by -1
bit 0,e
jr nz,1$
- exx
add hl,hl
exx
adc hl,hl
+ exx
rla
1$: ; by -2
bit 1,e
jr nz,2$
- exx
add hl,hl
exx
adc hl,hl
- rla
exx
+ rla
add hl,hl
exx
adc hl,hl
+ exx
rla
2$: ; by -4
bit 2,e
jr nz,3$
- exx
add hl,hl
exx
adc hl,hl
- rla
exx
+ rla
add hl,hl
exx
adc hl,hl
- rla
exx
+ rla
add hl,hl
exx
adc hl,hl
- rla
exx
+ rla
add hl,hl
exx
adc hl,hl
+ exx
rla
3$: ; by 8
bit 3,e
jr z,4$
+ exx
ld d,l
ld l,h
ld h,a
exx
ld l,h
ld h,a
- exx
sbc a,a
4$: ; by 16
bit 4,e
jr z,5$
+ exx
push hl
ld l,a
rla
ld h,a
exx
pop hl
- exx
ret
5$: ; by 32 (can't occur simultaneously with by 16)
bit 5,e
ret z
- exx
ld l,a
rla
sbc a,a
exx
ld l,a
ld h,a
+ exx
ret
; this routine is just an optimization, therefore use interpreter registers
ret
; this routine is just an optimization, therefore use interpreter registers
-math_mul_imm_l: ; de:hl' *= imm_l, big-endian imm_l
- exx
- ex de,hl
+math_mul_imm_l: ; hl':de *= imm_l, big-endian imm_l
sub a
ld l,a
ld h,a
- exx
+ exx
+ ex de,hl
ld l,a
ld h,a
+ exx
ld a,(bc)
inc bc
call mul_l0
ex de,hl
ret
-math_mul_l: ; hl:hl' *= de:de'
- exx
+math_mul_l: ; hl':hl *= de':de
ld a,l
push af
push hl
push af
ld a,h
ld hl,0
+ exx
call mul_l0
pop af
call mul_l
call mul_l
pop af
mul_l: ; bit 0
- exx
add hl,hl
exx
adc hl,hl
+ exx
mul_l0: rla
jr nc,1$
- exx
add hl,de
exx
adc hl,de
-1$: ; bit 1
exx
+1$: ; bit 1
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,2$
- exx
add hl,de
exx
adc hl,de
-2$: ; bit 2
exx
+2$: ; bit 2
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,3$
- exx
add hl,de
exx
adc hl,de
-3$: ; bit 3
exx
+3$: ; bit 3
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,4$
- exx
add hl,de
exx
adc hl,de
-4$: ; bit 4
exx
+4$: ; bit 4
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,5$
- exx
add hl,de
exx
adc hl,de
-5$: ; bit 5
exx
+5$: ; bit 5
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,6$
- exx
add hl,de
exx
adc hl,de
-6$: ; bit 6
exx
+6$: ; bit 6
add hl,hl
exx
adc hl,hl
+ exx
rla
jr nc,7$
- exx
add hl,de
exx
adc hl,de
-7$: ; bit 7
exx
+7$: ; bit 7
add hl,hl
exx
adc hl,hl
+ exx
rla
ret nc
- exx
add hl,de
exx
adc hl,de
+ exx
ret
math_div_sw0: ; hl, de = de % hl, de / hl, signed
scf
ret
-math_div_sl0: ; hl:hl', de:de' = hl:de' % de:hl', hl:de' / de:hl', signed
+math_div_sl0: ; hl':hl, de':de = de':hl % hl':de, de':hl / hl':de, signed
exx
ex de,hl
exx
-math_div_sl: ; ; hl:hl', de:de' = hl:hl' % de:de', hl:hl' / de:de', signed
+math_div_sl: ; ; hl':hl, de':de = hl':hl % de':de, hl':hl / de':de, signed
push bc
+ exx
ld a,h
or a
ld a,d
rla
+ exx
jp m,div_l_n ; positive dividend
; positive dividend
- exx
ld c,l
ld b,h
ld hl,0
ld a,h
ld c,l
ld hl,0
+ exx
jr nc,div_l_pp ; positive dividend, positive divisor
; positive dividend, negative divisor
call div_l_n1
+ exx
ld b,a
ld a,c
+ exx
call div_l_ncf
+ exx
ld c,a
exx
ld a,b
- exx
call div_l_ncf
- exx
ld b,a
ld a,c
- exx
call div_l_ncf
inc a
jr c,div_l_p_done
- exx
sbc hl,de
exx
sbc hl,de
+ exx
jr div_l_p_done
div_l_n:
; negative dividend
call dec_l ; reduces remainder by 1 (we inc later)
- exx
ld c,l
ld b,h
ld hl,-1
ld a,h
ld c,l
ld hl,-1
+ exx
jr c,div_l_nn ; negative dividend, negative divisor
; negative dividend, positive divisor
call div_l1
+ exx
ld b,a
ld a,c
+ exx
call div_lcf
+ exx
ld c,a
exx
ld a,b
- exx
call div_lcf
- exx
ld b,a
ld a,c
- exx
call div_lcf
inc a
jr c,div_l_n_done
- exx
sbc hl,de
exx
sbc hl,de
+ exx
jr div_l_n_done
math_div_ul0: ; hl:hl', de:de' = hl:de' % de:hl', hl:de' / de:hl', unsigned
exx
math_div_ul: ; ; hl:hl', de:de' = hl:hl' % de:de', hl:hl' / de:de', unsigned
push bc
- exx
ld c,l
ld b,h
ld hl,0
ld a,h
ld c,l
ld hl,0
+ exx
div_l_pp: ; positive dividend, positive divisor
call div_l0
+ exx
ld b,a
ld a,c
+ exx
call div_lcf
+ exx
ld c,a
exx
ld a,b
- exx
call div_lcf
- exx
ld b,a
ld a,c
- exx
call div_lcf
jr nc,div_l_p_done
- exx
add hl,de
exx
adc hl,de
-div_l_p_done:
exx
+div_l_p_done:
ld e,a
ld d,b
exx
ld e,c
ld d,b
+ exx
pop bc
ret
div_l_nn: ; negative dividend, negative divisor
call div_l_n0
+ exx
ld b,a
ld a,c
+ exx
call div_l_ncf
+ exx
ld c,a
exx
ld a,b
- exx
call div_l_ncf
- exx
ld b,a
ld a,c
- exx
call div_l_ncf
jr nc,div_l_n_done
- exx
add hl,de
exx
adc hl,de
-div_l_n_done:
exx
+div_l_n_done:
ld e,a
ld d,b
exx
ld e,c
ld d,b
+ exx
pop bc
inc_l: ; get into range divisor+1..0
- exx
inc hl
ld a,l
or h
- exx
ret nz
+ exx
inc hl
+ exx
ret
dec_l:
- exx
ld a,l
or h
dec hl
- exx
ret nz
+ exx
dec hl
+ exx
ret
; non-restoring division routine
div_l0: ; bit 0, above
scf
rla
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l01
dec a
div_l11: ; bit 1, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l12
inc a
div_l02: ; bit 2, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l03
dec a
div_l13: ; bit 3, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l14
inc a
div_l04: ; bit 4, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l05
dec a
div_l15: ; bit 5, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l16
inc a
div_l06: ; bit 6, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l07
dec a
div_l17: ; bit 7, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l18
inc a
div_l08: ; done, above
div_l1: ; bit 0, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l11
inc a
div_l01: ; bit 1, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l02
dec a
div_l12: ; bit 2, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l13
inc a
div_l03: ; bit 3, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l04
dec a
div_l14: ; bit 4, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l15
inc a
div_l05: ; bit 5, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l06
dec a
div_l16: ; bit 6, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp nc,div_l17
inc a
div_l07: ; bit 7, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp nc,div_l08
dec a
div_l18: ; done, below
div_l_n0: ; bit 0, above
scf
rla
- exx
adc hl,hl
exx
adc hl,hl
- or a
exx
+ or a
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n01
dec a
div_l_n11: ; bit 1, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n12
inc a
div_l_n02: ; bit 2, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
- or a
exx
+ or a
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n03
dec a
div_l_n13: ; bit 3, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n14
inc a
div_l_n04: ; bit 4, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
- or a
exx
+ or a
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n05
dec a
div_l_n15: ; bit 5, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n16
inc a
div_l_n06: ; bit 6, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n07
dec a
div_l_n17: ; bit 7, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n18
inc a
div_l_n08: ; done, above
div_l_n1: ; bit 0, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n11
inc a
div_l_n01: ; bit 1, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n02
dec a
div_l_n12: ; bit 2, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n13
inc a
div_l_n03: ; bit 3, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n04
dec a
div_l_n14: ; bit 4, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n15
inc a
div_l_n05: ; bit 5, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n06
dec a
div_l_n16: ; bit 6, below
add a,a
- exx
adc hl,hl
exx
adc hl,hl
add hl,de
exx
adc hl,de
+ exx
jp c,div_l_n17
inc a
div_l_n07: ; bit 7, above
add a,a
- exx
adc hl,hl
exx
adc hl,hl
sbc hl,de
exx
sbc hl,de
+ exx
jp c,div_l_n08
dec a
div_l_n18: ; done, below
; debugging
-print_trace: ; print af, bc, de:hl', hl:de', sp, (sp+2):(sp)
+print_trace: ; print af, bc, hl':de, de':hl, (sp+2):(sp), sp
call print_trace2
ld a,(bc)
inc bc
call print_word
ld a,'
call print_char
- ld l,e
- ld h,d
- call print_word
- ld a,':
- call print_char
exx
push hl
exx
pop hl
call print_word
- ld a,'
+ ld a,':
call print_char
- pop af
- pop hl
- push hl
- push af
+ ld l,e
+ ld h,d
call print_word
- ld a,':
+ ld a,'
call print_char
exx
push de
exx
pop hl
call print_word
- ld a,'
+ ld a,':
call print_char
- ld hl,6
- add hl,sp
+ pop af
+ pop hl
+ push hl
+ push af
call print_word
ld a,'
call print_char
ld h,(hl)
ld l,a
call print_word
+ ld a,'
+ call print_char
+ ld hl,6
+ add hl,sp
+ call print_word
ld a,0xd
call print_char
ld a,0xa