sbc hl,bc
jr nc,div_w02
dec a
- jr div_w12
+ ;jr div_w12
+ add a,a
+ dec d
+ jr nz,div_w10
+ ;inc a
+ ;dec a ; compensation
+ scf
+ pop de
+ ret
div_w01:
or a
sbc hl,bc
add hl,bc
jr nc,div_w12
inc a
- jr div_w02
+ ;jr div_w02
+ add a,a
+ dec d
+ jr nz,div_w00
+ dec a
+ or a
+ pop de
+ ret
div_w11:
add hl,bc
div_w12:
sbc hl,bc
jr c,div_w_n02
dec a
- jr div_w_n12
+ ;jr div_w_n12
+ add a,a
+ dec d
+ jr nz,div_w_n10
+ ;inc a
+ ;dec a ; compensation
+ scf
+ pop de
+ ret
div_w_n01:
sbc hl,bc
div_w_n02:
add hl,bc
jr c,div_w_n12
inc a
- jr div_w_n02
+ ;jr div_w_n02
+ add a,a
+ dec d
+ jr nz,div_w_n00
+ dec a
+ or a
+ pop de
+ ret
div_w_n11:
add hl,bc
div_w_n12:
exx
jr nc,div_l02
dec a
- jr div_l12
+ ;jr div_l12
+ add a,a
+ dec d
+ jr nz,div_l10
+ ;inc a
+ ;dec a ; compensation
+ scf
+ pop de
+ ret
div_l01:
or a
sbc hl,bc
exx
jr nc,div_l12
inc a
- jr div_l02
+ ;jr div_l02
+ add a,a
+ dec d
+ jr nz,div_l00
+ dec a
+ or a
+ pop de
+ ret
div_l11:
add hl,bc
exx
exx
jr c,div_l_n02
dec a
- jr div_l_n12
+ ;jr div_l_n12
+ add a,a
+ dec d
+ jr nz,div_l_n10
+ ;inc a
+ ;dec a ; compensation
+ scf
+ pop de
+ ret
div_l_n01:
sbc hl,bc
exx
exx
jr c,div_l_n12
inc a
- jr div_l_n02
+ ;jr div_l_n02
+ add a,a
+ dec d
+ jr nz,div_l_n00
+ dec a
+ or a
+ pop de
+ ret
div_l_n11:
add hl,bc
exx