rla
div_w00:
adc hl,hl
+ jr c,div_w01
sbc hl,bc
- jr nc,div_w01
+ jr nc,div_w02
dec a
- jr div_w11
+ jr div_w12
div_w01:
+ or a
+ sbc hl,bc
+div_w02:
add a,a
dec d
jr nz,div_w00
add a,a
div_w10:
adc hl,hl
- add hl,bc
jr nc,div_w11
+ add hl,bc
+ jr nc,div_w12
inc a
- jr div_w01
+ jr div_w02
div_w11:
+ add hl,bc
+div_w12:
add a,a
dec d
jr nz,div_w10
rla
div_w_n00:
adc hl,hl
+ jr nc,div_w_n01
or a
sbc hl,bc
- jr c,div_w_n01
+ jr c,div_w_n02
dec a
- jr div_w_n11
+ jr div_w_n12
div_w_n01:
+ sbc hl,bc
+div_w_n02:
add a,a
dec d
jr nz,div_w_n00
add a,a
div_w_n10:
adc hl,hl
- add hl,bc
jr c,div_w_n11
+ add hl,bc
+ jr c,div_w_n12
inc a
- jr div_w_n01
+ jr div_w_n02
div_w_n11:
+ add hl,bc
+div_w_n12:
add a,a
dec d
jr nz,div_w_n10