Modifications, commenting and addition of stubs to get everything to compile

diff --git a/.gitignore b/.gitignore
new file mode 100644 (file)
index 0000000..1e9d7b6
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+*.dsk
+*.o
+/fuzix_sim

diff --git a/Makefile b/Makefile
new file mode 100644 (file)
index 0000000..2935dc4
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,29 @@
+CPPFLAGS=-DCONFDIR=\".\" -DDISKSDIR=\".\" -I.
+#CXXFLAGS=-Wfatal-errors
+
+fuzix_sim: \
+iodevices/unix_terminal.o \
+sim/config.o \
+sim/iosim.o \
+sim/memory.o \
+sim/sim0.o \
+sim/simctl.o \
+sim/simfun.o \
+sim/simglb.o \
+sim/simint.o \
+z180/z180.o
+       ${CXX} ${CXXFLAGS} -o $@ $^
+
+iodevices/unix_terminal.o: iodevices/unix_terminal.cpp
+sim/config.o: sim/config.cpp
+sim/iosim.o: sim/iosim.cpp
+sim/memory.o: sim/memory.cpp
+sim/sim0.o: sim/sim0.cpp
+sim/simctl.o: sim/simctl.cpp
+sim/simfun.o: sim/simfun.cpp
+sim/simglb.o: sim/simglb.cpp
+sim/simint.o: sim/simint.cpp
+z180/z180.o: z180/z180.cpp
+
+clean:
+       rm -f fuzix_sim iodevices/*.o sim/*.o z180/*.o

diff --git a/debugger.h b/debugger.h
new file mode 100644 (file)
index 0000000..04ba4b8
--- /dev/null
+++ b/debugger.h
@@ -0,0 +1,6 @@
+#ifndef _DEBUGGER_H
+#define _DEBUGGER_H 1
+
+#define debugger_instruction_hook(addr)
+
+#endif

diff --git a/emu.h b/emu.h
new file mode 100644 (file)
index 0000000..8ebcbbd
--- /dev/null
+++ b/emu.h
@@ -0,0 +1,71 @@
+#ifndef _EMU_H
+#define _EMU_H 1
+
+#include <stdint.h>
+#include <string.h>
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s32;
+
+// this must be large enough to hold a physical address:
+typedef uint32_t offs_t;
+
+#include <memory>
+
+class device_state_entry {
+};
+
+class device_t {
+public:
+  virtual void device_start() = 0;
+  virtual void device_reset() = 0;
+  virtual uint32_t execute_min_cycles() const = 0;
+  virtual uint32_t execute_max_cycles() const = 0;
+  virtual uint32_t execute_input_lines() const = 0;
+  virtual uint32_t execute_default_irq_vector(int inputnum) const = 0;
+  virtual bool execute_input_edge_triggered(int inputnum) const = 0;
+  virtual void execute_run() = 0;
+  virtual void execute_burn(int32_t cycles) = 0;
+  virtual void execute_set_input(int inputnum, int state) = 0;
+  virtual bool memory_translate(int spacenum, int intention, offs_t &address) = 0;
+};
+
+class cpu_device : public device_t {
+};
+
+class machine_config {
+};
+
+class address_space {
+public:
+  virtual u8 read_byte(offs_t address) = 0;
+  virtual void write_byte(offs_t address, u8 data) = 0;
+};
+
+// PAIR is an endian-safe union useful for representing 32-bit CPU registers
+union PAIR
+{
+//nick#ifdef LSB_FIRST
+       struct { u8 l,h,h2,h3; } b;
+       struct { u16 l,h; } w;
+       struct { s8 l,h,h2,h3; } sb;
+       struct { s16 l,h; } sw;
+//nick#else
+//nick struct { u8 h3,h2,h,l; } b;
+//nick struct { s8 h3,h2,h,l; } sb;
+//nick struct { u16 h,l; } w;
+//nick struct { s16 h,l; } sw;
+//nick#endif
+       u32 d;
+       s32 sd;
+};
+
+#define INPUT_LINE_NMI 0
+
+#define CLEAR_LINE 0
+#define ASSERT_LINE 1
+
+#endif

diff --git a/logmacro.h b/logmacro.h
new file mode 100644 (file)
index 0000000..09d6d9d
--- /dev/null
+++ b/logmacro.h
@@ -0,0 +1,8 @@
+#ifndef _LOGMACRO_H
+#define _LOGMACRO_H 1
+
+#include <stdio.h>
+#define LOG printf
+#define logerror printf
+
+#endif

diff --git a/machine/z80daisy.h b/machine/z80daisy.h
new file mode 100644 (file)
index 0000000..a054e50
--- /dev/null
+++ b/machine/z80daisy.h
@@ -0,0 +1,29 @@
+#ifndef _Z80DAISY_H
+#define _Z80DAISY_H 1
+
+class device_z80daisy_interface {
+public:
+  int z80daisy_irq_ack() {
+    return 0;
+  }
+};
+
+class z80_daisy_chain_interface {
+public:
+  bool daisy_chain_present() {
+    return false;
+  }
+  uint8_t daisy_update_irq_state() {
+    return 0;
+  }
+  void daisy_call_reti_device() {
+  }
+  device_z80daisy_interface *daisy_get_irq_device() {
+    return NULL;
+  }
+  int standard_irq_callback_member(device_t &device, int irqline) {
+    return 0;
+  }
+};
+
+#endif

diff --git a/sim/iosim.cpp b/sim/iosim.cpp
index ba4bdd4..a57c4e0 100644 (file)
--- a/sim/iosim.cpp
+++ b/sim/iosim.cpp
@@ -200,17 +200,17 @@ struct dskdef disks[16] = {
        { "driveb.dsk", &driveb, 77, 26 },
        { "drivec.dsk", &drivec, 77, 26 },
        { "drived.dsk", &drived, 77, 26 },
-       { "drivee.dsk", &drivee, -1, -1 },
-       { "drivef.dsk", &drivef, -1, -1 },
-       { "driveg.dsk", &driveg, -1, -1 },
-       { "driveh.dsk", &driveh, -1, -1 },
+       { "drivee.dsk", &drivee, (unsigned int)-1, (unsigned int)-1 },
+       { "drivef.dsk", &drivef, (unsigned int)-1, (unsigned int)-1 },
+       { "driveg.dsk", &driveg, (unsigned int)-1, (unsigned int)-1 },
+       { "driveh.dsk", &driveh, (unsigned int)-1, (unsigned int)-1 },
        { "drivei.dsk", &drivei, 255, 128 },
        { "drivej.dsk", &drivej, 255, 128 },
-       { "drivek.dsk", &drivek, -1, -1 },
-       { "drivel.dsk", &drivel, -1, -1 },
-       { "drivem.dsk", &drivem, -1, -1 },
-       { "driven.dsk", &driven, -1, -1 },
-       { "driveo.dsk", &driveo, -1, -1 },
+       { "drivek.dsk", &drivek, (unsigned int)-1, (unsigned int)-1 },
+       { "drivel.dsk", &drivel, (unsigned int)-1, (unsigned int)-1 },
+       { "drivem.dsk", &drivem, (unsigned int)-1, (unsigned int)-1 },
+       { "driven.dsk", &driven, (unsigned int)-1, (unsigned int)-1 },
+       { "driveo.dsk", &driveo, (unsigned int)-1, (unsigned int)-1 },
        { "drivep.dsk", &drivep, 256, 16384 }
 };
 
@@ -2304,7 +2304,7 @@ static void mmui_out(BYTE data)
        }
 
        for (i = 1; i < data; i++) {
-               if ((memory[i] = malloc(segsize)) == NULL) {
+               if ((memory[i] = (BYTE *)malloc(segsize)) == NULL) {
                        printf("can't allocate memory for bank %d\r\n", i);
                        cpu_error = IOERROR;
                        cpu_state = STOPPED;
@@ -2718,8 +2718,8 @@ static void int_io(int sig)
  */
 void telnet_negotiation(int fd)
 {
-       static char will_echo[3] = {255, 251, 1};
-       static char char_mode[3] = {255, 251, 3};
+       static char will_echo[3] = {(char)255, (char)251, 1};
+       static char char_mode[3] = {(char)255, (char)251, 3};
        struct pollfd p[1];
        BYTE c[3];
 

diff --git a/sim/memory.cpp b/sim/memory.cpp
index f9e6717..4283981 100644 (file)
--- a/sim/memory.cpp
+++ b/sim/memory.cpp
@@ -42,7 +42,7 @@ int wp_common;                        /* write protect/unprotect common segment */
 void init_memory(void)
 {
        /* allocate the first 64KB bank, so that we have some memory */
-       if ((memory[0] = malloc(65536)) == NULL) {
+       if ((memory[0] = (BYTE *)malloc(65536)) == NULL) {
                printf("can't allocate memory for bank 0\r\n");
                cpu_error = IOERROR;
                cpu_state = STOPPED;

diff --git a/sim/sim.h b/sim/sim.h
index 76fe7f4..ec3f6da 100644 (file)
--- a/sim/sim.h
+++ b/sim/sim.h
@@ -160,7 +160,7 @@ struct softbreak {                  /* structure of a breakpoint */
  *     Structure for the disk images
  */
 struct dskdef {
-       char *fn;                       /* filename */
+       const char *fn;                 /* filename */
        int *fd;                        /* file descriptor */
        unsigned int tracks;            /* number of tracks */
        unsigned int sectors;           /* number of sectors */

diff --git a/sim/sim0.cpp b/sim/sim0.cpp
index 6fd4710..dd18359 100644 (file)
--- a/sim/sim0.cpp
+++ b/sim/sim0.cpp
@@ -65,7 +65,7 @@
 #include "sim.h"
 #include "simglb.h"
 #include "config.h"
-#include "../../frontpanel/frontpanel.h"
+//#include "../../frontpanel/frontpanel.h"
 #include "memory.h"
 
 #define BUFSIZE        256             /* buffer size for file I/O */
@@ -90,9 +90,9 @@ int main(int argc, char *argv[])
        struct stat sbuf;
 #endif
 #ifdef BOOTROM
-       char *rom = "-r ";
+       const char *rom = "-r ";
 #else
-       char *rom = "";
+       const char *rom = "";
 #endif
 #ifdef CPU_SPEED
        f_flag = CPU_SPEED;

diff --git a/sim/simctl.cpp b/sim/simctl.cpp
index fccd8b1..b125daa 100644 (file)
--- a/sim/simctl.cpp
+++ b/sim/simctl.cpp
@@ -42,6 +42,7 @@
  * 16-MAR-17 Release 1.34 improvements, added ProcTec VDM-1
  */
 
+#include <assert.h> // temporary
 #include <unistd.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -52,16 +53,16 @@
 #include "sim.h"
 #include "simglb.h"
 #include "memory.h"
-#include "../../iodevices/unix_terminal.h"
+#include "iodevices/unix_terminal.h"
 
 int boot(void);
 
 extern int load_file(char *);
 extern int load_core(void);
-extern void cpu_z80(void), cpu_8080(void);
+//nickextern void cpu_z80(void), cpu_8080(void);
 extern struct dskdef disks[];
 
-struct termios old_term, new_term;
+extern struct termios old_term, new_term;
 
 /*
  *     This function initialises the terminal, loads boot code
@@ -84,10 +85,18 @@ void mon(void)
        cpu_error = NONE;
        switch(cpu) {
        case Z80:
+#if 1
+ assert(false);
+#else
                cpu_z80();
+#endif
                break;
        case I8080:
+#if 1
+ assert(false);
+#else
                cpu_8080();
+#endif
                break;
        }
 

diff --git a/z180/z180.cpp b/z180/z180.cpp
index b9b3c0f..48e8e78 100644 (file)
--- a/z180/z180.cpp
+++ b/z180/z180.cpp
@@ -52,7 +52,7 @@ Hitachi HD647180 series:
 
 #include "emu.h"
 #include "z180.h"
-#include "z180dasm.h"
+//#include "z180dasm.h"
 #include "debugger.h"
 
 //#define VERBOSE 1
@@ -78,22 +78,22 @@ Hitachi HD647180 series:
 /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128)    */
 /****************************************************************************/
 
-DEFINE_DEVICE_TYPE(Z180, z180_device, "z180", "Zilog Z180")
+//nickDEFINE_DEVICE_TYPE(Z180, z180_device, "z180", "Zilog Z180")
 
 
-z180_device::z180_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
-       : cpu_device(mconfig, Z180, tag, owner, clock)
-       , z80_daisy_chain_interface(mconfig, *this)
-       , m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
-       , m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
-       , m_decrypted_opcodes_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
-{
-}
+//nickz180_device::z180_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+//nick : cpu_device(mconfig, Z180, tag, owner, clock)
+//nick , z80_daisy_chain_interface(mconfig, *this)
+//nick , m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
+//nick , m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
+//nick , m_decrypted_opcodes_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
+//nick{
+//nick}
 
-std::unique_ptr<util::disasm_interface> z180_device::create_disassembler()
-{
-       return std::make_unique<z180_disassembler>();
-}
+//nickstd::unique_ptr<util::disasm_interface> z180_device::create_disassembler()
+//nick{
+//nick return std::make_unique<z180_disassembler>();
+//nick}
 
 #define CF  0x01
 #define NF  0x02
@@ -777,20 +777,20 @@ static std::unique_ptr<uint8_t[]> SZHVC_sub;
 #include "z180op.hxx"
 
 
-device_memory_interface::space_config_vector z180_device::memory_space_config() const
-{
-       if(has_configured_map(AS_OPCODES))
-               return space_config_vector {
-                       std::make_pair(AS_PROGRAM, &m_program_config),
-                       std::make_pair(AS_OPCODES, &m_decrypted_opcodes_config),
-                       std::make_pair(AS_IO,      &m_io_config)
-               };
-       else
-               return space_config_vector {
-                       std::make_pair(AS_PROGRAM, &m_program_config),
-                       std::make_pair(AS_IO,      &m_io_config)
-               };
-}
+//nickdevice_memory_interface::space_config_vector z180_device::memory_space_config() const
+//nick{
+//nick if(has_configured_map(AS_OPCODES))
+//nick         return space_config_vector {
+//nick                 std::make_pair(AS_PROGRAM, &m_program_config),
+//nick                 std::make_pair(AS_OPCODES, &m_decrypted_opcodes_config),
+//nick                 std::make_pair(AS_IO,      &m_io_config)
+//nick         };
+//nick else
+//nick         return space_config_vector {
+//nick                 std::make_pair(AS_PROGRAM, &m_program_config),
+//nick                 std::make_pair(AS_IO,      &m_io_config)
+//nick         };
+//nick}
 
 uint8_t z180_device::z180_readcontrol(offs_t port)
 {
@@ -2014,154 +2014,154 @@ void z180_device::device_start()
                if( (i & 0x0f) == 0x0f ) SZHV_dec[i] |= HF;
        }
 
-       m_program = &space(AS_PROGRAM);
-       m_cache = m_program->cache<0, 0, ENDIANNESS_LITTLE>();
-       m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
-       m_ocache = m_oprogram->cache<0, 0, ENDIANNESS_LITTLE>();
-       m_iospace = &space(AS_IO);
+//nick m_program = &space(AS_PROGRAM);
+//nick m_cache = m_program->cache<0, 0, ENDIANNESS_LITTLE>();
+//nick m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
+//nick m_ocache = m_oprogram->cache<0, 0, ENDIANNESS_LITTLE>();
+//nick m_iospace = &space(AS_IO);
 
        /* set up the state table */
        {
-               state_add(Z180_PC,         "PC",        m_PC.w.l);
-               state_add(STATE_GENPC,     "GENPC",     _PCD).noshow();
-               state_add(STATE_GENPCBASE, "CURPC",     m_PREPC.w.l).noshow();
-               state_add(Z180_SP,         "SP",        _SPD);
-               state_add(STATE_GENSP,     "GENSP",     m_SP.w.l).noshow();
-               state_add(STATE_GENFLAGS,  "GENFLAGS",  m_AF.b.l).noshow().formatstr("%8s");
-               state_add(Z180_A,          "A",         _A).noshow();
-               state_add(Z180_B,          "B",         _B).noshow();
-               state_add(Z180_C,          "C",         _C).noshow();
-               state_add(Z180_D,          "D",         _D).noshow();
-               state_add(Z180_E,          "E",         _E).noshow();
-               state_add(Z180_H,          "H",         _H).noshow();
-               state_add(Z180_L,          "L",         _L).noshow();
-               state_add(Z180_AF,         "AF",        m_AF.w.l);
-               state_add(Z180_BC,         "BC",        m_BC.w.l);
-               state_add(Z180_DE,         "DE",        m_DE.w.l);
-               state_add(Z180_HL,         "HL",        m_HL.w.l);
-               state_add(Z180_IX,         "IX",        m_IX.w.l);
-               state_add(Z180_IY,         "IY",        m_IY.w.l);
-               state_add(Z180_AF2,        "AF2",       m_AF2.w.l);
-               state_add(Z180_BC2,        "BC2",       m_BC2.w.l);
-               state_add(Z180_DE2,        "DE2",       m_DE2.w.l);
-               state_add(Z180_HL2,        "HL2",       m_HL2.w.l);
-               state_add(Z180_R,          "R",         m_rtemp).callimport().callexport();
-               state_add(Z180_I,          "I",         m_I);
-               state_add(Z180_IM,         "IM",        m_IM).mask(0x3);
-               state_add(Z180_IFF1,       "IFF1",      m_IFF1).mask(0x1);
-               state_add(Z180_IFF2,       "IFF2",      m_IFF2).mask(0x1);
-               state_add(Z180_HALT,       "HALT",      m_HALT).mask(0x1);
-
-               state_add(Z180_IOLINES,    "IOLINES",   m_ioltemp).mask(0xffffff).callimport();
-
-               state_add(Z180_CNTLA0,     "CNTLA0",    IO_CNTLA0);
-               state_add(Z180_CNTLA1,     "CNTLA1",    IO_CNTLA1);
-               state_add(Z180_CNTLB0,     "CNTLB0",    IO_CNTLB0);
-               state_add(Z180_CNTLB1,     "CNTLB1",    IO_CNTLB1);
-               state_add(Z180_STAT0,      "STAT0",     IO_STAT0);
-               state_add(Z180_STAT1,      "STAT1",     IO_STAT1);
-               state_add(Z180_TDR0,       "TDR0",      IO_TDR0);
-               state_add(Z180_TDR1,       "TDR1",      IO_TDR1);
-               state_add(Z180_RDR0,       "RDR0",      IO_RDR0);
-               state_add(Z180_RDR1,       "RDR1",      IO_RDR1);
-               state_add(Z180_CNTR,       "CNTR",      IO_CNTR);
-               state_add(Z180_TRDR,       "TRDR",      IO_TRDR);
-               state_add(Z180_TMDR0L,     "TMDR0L",    IO_TMDR0L);
-               state_add(Z180_TMDR0H,     "TMDR0H",    IO_TMDR0H);
-               state_add(Z180_RLDR0L,     "RLDR0L",    IO_RLDR0L);
-               state_add(Z180_RLDR0H,     "RLDR0H",    IO_RLDR0H);
-               state_add(Z180_TCR,        "TCR",       IO_TCR);
-               state_add(Z180_IO11,       "IO11",      IO_IO11);
-               state_add(Z180_ASEXT0,     "ASEXT0",    IO_ASEXT0);
-               state_add(Z180_ASEXT1,     "ASEXT1",    IO_ASEXT1);
-               state_add(Z180_TMDR1L,     "TMDR1L",    IO_TMDR1L);
-               state_add(Z180_TMDR1H,     "TMDR1H",    IO_TMDR1H);
-               state_add(Z180_RLDR1L,     "RLDR1L",    IO_RLDR1L);
-               state_add(Z180_RLDR1H,     "RLDR1H",    IO_RLDR1H);
-               state_add(Z180_FRC,        "FRC",       IO_FRC);
-               state_add(Z180_IO19,       "IO19",      IO_IO19);
-               state_add(Z180_ASTC0L,     "ASTC0L",    IO_ASTC0L);
-               state_add(Z180_ASTC0H,     "ASTC0H",    IO_ASTC0H);
-               state_add(Z180_ASTC1L,     "ASTC1L",    IO_ASTC1L);
-               state_add(Z180_ASTC1H,     "ASTC1H",    IO_ASTC1H);
-               state_add(Z180_CMR,        "CMR",       IO_CMR);
-               state_add(Z180_CCR,        "CCR",       IO_CCR);
-               state_add(Z180_SAR0L,      "SAR0L",     IO_SAR0L);
-               state_add(Z180_SAR0H,      "SAR0H",     IO_SAR0H);
-               state_add(Z180_SAR0B,      "SAR0B",     IO_SAR0B);
-               state_add(Z180_DAR0L,      "DAR0L",     IO_DAR0L);
-               state_add(Z180_DAR0H,      "DAR0H",     IO_DAR0H);
-               state_add(Z180_DAR0B,      "DAR0B",     IO_DAR0B);
-               state_add(Z180_BCR0L,      "BCR0L",     IO_BCR0L);
-               state_add(Z180_BCR0H,      "BCR0H",     IO_BCR0H);
-               state_add(Z180_MAR1L,      "MAR1L",     IO_MAR1L);
-               state_add(Z180_MAR1H,      "MAR1H",     IO_MAR1H);
-               state_add(Z180_MAR1B,      "MAR1B",     IO_MAR1B);
-               state_add(Z180_IAR1L,      "IAR1L",     IO_IAR1L);
-               state_add(Z180_IAR1H,      "IAR1H",     IO_IAR1H);
-               state_add(Z180_IAR1B,      "IAR1B",     IO_IAR1B);
-               state_add(Z180_BCR1L,      "BCR1L",     IO_BCR1L);
-               state_add(Z180_BCR1H,      "BCR1H",     IO_BCR1H);
-               state_add(Z180_DSTAT,      "DSTAT",     IO_DSTAT);
-               state_add(Z180_DMODE,      "DMODE",     IO_DMODE);
-               state_add(Z180_DCNTL,      "DCNTL",     IO_DCNTL);
-               state_add(Z180_IL,         "IL",        IO_IL);
-               state_add(Z180_ITC,        "ITC",       IO_ITC);
-               state_add(Z180_IO35,       "IO35",      IO_IO35);
-               state_add(Z180_RCR,        "RCR",       IO_RCR);
-               state_add(Z180_IO37,       "IO37",      IO_IO37);
-               state_add(Z180_CBR,        "CBR",       IO_CBR).callimport();
-               state_add(Z180_BBR,        "BBR",       IO_BBR).callimport();
-               state_add(Z180_CBAR,       "CBAR",      IO_CBAR).callimport();
-               state_add(Z180_IO3B,       "IO3B",      IO_IO3B);
-               state_add(Z180_IO3C,       "IO3C",      IO_IO3C);
-               state_add(Z180_IO3D,       "IO3D",      IO_IO3D);
-               state_add(Z180_OMCR,       "OMCR",      IO_OMCR);
-               state_add(Z180_IOCR,       "IOCR",      IO_IOCR);
+//nick         state_add(Z180_PC,         "PC",        m_PC.w.l);
+//nick         state_add(STATE_GENPC,     "GENPC",     _PCD).noshow();
+//nick         state_add(STATE_GENPCBASE, "CURPC",     m_PREPC.w.l).noshow();
+//nick         state_add(Z180_SP,         "SP",        _SPD);
+//nick         state_add(STATE_GENSP,     "GENSP",     m_SP.w.l).noshow();
+//nick         state_add(STATE_GENFLAGS,  "GENFLAGS",  m_AF.b.l).noshow().formatstr("%8s");
+//nick         state_add(Z180_A,          "A",         _A).noshow();
+//nick         state_add(Z180_B,          "B",         _B).noshow();
+//nick         state_add(Z180_C,          "C",         _C).noshow();
+//nick         state_add(Z180_D,          "D",         _D).noshow();
+//nick         state_add(Z180_E,          "E",         _E).noshow();
+//nick         state_add(Z180_H,          "H",         _H).noshow();
+//nick         state_add(Z180_L,          "L",         _L).noshow();
+//nick         state_add(Z180_AF,         "AF",        m_AF.w.l);
+//nick         state_add(Z180_BC,         "BC",        m_BC.w.l);
+//nick         state_add(Z180_DE,         "DE",        m_DE.w.l);
+//nick         state_add(Z180_HL,         "HL",        m_HL.w.l);
+//nick         state_add(Z180_IX,         "IX",        m_IX.w.l);
+//nick         state_add(Z180_IY,         "IY",        m_IY.w.l);
+//nick         state_add(Z180_AF2,        "AF2",       m_AF2.w.l);
+//nick         state_add(Z180_BC2,        "BC2",       m_BC2.w.l);
+//nick         state_add(Z180_DE2,        "DE2",       m_DE2.w.l);
+//nick         state_add(Z180_HL2,        "HL2",       m_HL2.w.l);
+//nick         state_add(Z180_R,          "R",         m_rtemp).callimport().callexport();
+//nick         state_add(Z180_I,          "I",         m_I);
+//nick         state_add(Z180_IM,         "IM",        m_IM).mask(0x3);
+//nick         state_add(Z180_IFF1,       "IFF1",      m_IFF1).mask(0x1);
+//nick         state_add(Z180_IFF2,       "IFF2",      m_IFF2).mask(0x1);
+//nick         state_add(Z180_HALT,       "HALT",      m_HALT).mask(0x1);
+//nick
+//nick         state_add(Z180_IOLINES,    "IOLINES",   m_ioltemp).mask(0xffffff).callimport();
+//nick
+//nick         state_add(Z180_CNTLA0,     "CNTLA0",    IO_CNTLA0);
+//nick         state_add(Z180_CNTLA1,     "CNTLA1",    IO_CNTLA1);
+//nick         state_add(Z180_CNTLB0,     "CNTLB0",    IO_CNTLB0);
+//nick         state_add(Z180_CNTLB1,     "CNTLB1",    IO_CNTLB1);
+//nick         state_add(Z180_STAT0,      "STAT0",     IO_STAT0);
+//nick         state_add(Z180_STAT1,      "STAT1",     IO_STAT1);
+//nick         state_add(Z180_TDR0,       "TDR0",      IO_TDR0);
+//nick         state_add(Z180_TDR1,       "TDR1",      IO_TDR1);
+//nick         state_add(Z180_RDR0,       "RDR0",      IO_RDR0);
+//nick         state_add(Z180_RDR1,       "RDR1",      IO_RDR1);
+//nick         state_add(Z180_CNTR,       "CNTR",      IO_CNTR);
+//nick         state_add(Z180_TRDR,       "TRDR",      IO_TRDR);
+//nick         state_add(Z180_TMDR0L,     "TMDR0L",    IO_TMDR0L);
+//nick         state_add(Z180_TMDR0H,     "TMDR0H",    IO_TMDR0H);
+//nick         state_add(Z180_RLDR0L,     "RLDR0L",    IO_RLDR0L);
+//nick         state_add(Z180_RLDR0H,     "RLDR0H",    IO_RLDR0H);
+//nick         state_add(Z180_TCR,        "TCR",       IO_TCR);
+//nick         state_add(Z180_IO11,       "IO11",      IO_IO11);
+//nick         state_add(Z180_ASEXT0,     "ASEXT0",    IO_ASEXT0);
+//nick         state_add(Z180_ASEXT1,     "ASEXT1",    IO_ASEXT1);
+//nick         state_add(Z180_TMDR1L,     "TMDR1L",    IO_TMDR1L);
+//nick         state_add(Z180_TMDR1H,     "TMDR1H",    IO_TMDR1H);
+//nick         state_add(Z180_RLDR1L,     "RLDR1L",    IO_RLDR1L);
+//nick         state_add(Z180_RLDR1H,     "RLDR1H",    IO_RLDR1H);
+//nick         state_add(Z180_FRC,        "FRC",       IO_FRC);
+//nick         state_add(Z180_IO19,       "IO19",      IO_IO19);
+//nick         state_add(Z180_ASTC0L,     "ASTC0L",    IO_ASTC0L);
+//nick         state_add(Z180_ASTC0H,     "ASTC0H",    IO_ASTC0H);
+//nick         state_add(Z180_ASTC1L,     "ASTC1L",    IO_ASTC1L);
+//nick         state_add(Z180_ASTC1H,     "ASTC1H",    IO_ASTC1H);
+//nick         state_add(Z180_CMR,        "CMR",       IO_CMR);
+//nick         state_add(Z180_CCR,        "CCR",       IO_CCR);
+//nick         state_add(Z180_SAR0L,      "SAR0L",     IO_SAR0L);
+//nick         state_add(Z180_SAR0H,      "SAR0H",     IO_SAR0H);
+//nick         state_add(Z180_SAR0B,      "SAR0B",     IO_SAR0B);
+//nick         state_add(Z180_DAR0L,      "DAR0L",     IO_DAR0L);
+//nick         state_add(Z180_DAR0H,      "DAR0H",     IO_DAR0H);
+//nick         state_add(Z180_DAR0B,      "DAR0B",     IO_DAR0B);
+//nick         state_add(Z180_BCR0L,      "BCR0L",     IO_BCR0L);
+//nick         state_add(Z180_BCR0H,      "BCR0H",     IO_BCR0H);
+//nick         state_add(Z180_MAR1L,      "MAR1L",     IO_MAR1L);
+//nick         state_add(Z180_MAR1H,      "MAR1H",     IO_MAR1H);
+//nick         state_add(Z180_MAR1B,      "MAR1B",     IO_MAR1B);
+//nick         state_add(Z180_IAR1L,      "IAR1L",     IO_IAR1L);
+//nick         state_add(Z180_IAR1H,      "IAR1H",     IO_IAR1H);
+//nick         state_add(Z180_IAR1B,      "IAR1B",     IO_IAR1B);
+//nick         state_add(Z180_BCR1L,      "BCR1L",     IO_BCR1L);
+//nick         state_add(Z180_BCR1H,      "BCR1H",     IO_BCR1H);
+//nick         state_add(Z180_DSTAT,      "DSTAT",     IO_DSTAT);
+//nick         state_add(Z180_DMODE,      "DMODE",     IO_DMODE);
+//nick         state_add(Z180_DCNTL,      "DCNTL",     IO_DCNTL);
+//nick         state_add(Z180_IL,         "IL",        IO_IL);
+//nick         state_add(Z180_ITC,        "ITC",       IO_ITC);
+//nick         state_add(Z180_IO35,       "IO35",      IO_IO35);
+//nick         state_add(Z180_RCR,        "RCR",       IO_RCR);
+//nick         state_add(Z180_IO37,       "IO37",      IO_IO37);
+//nick         state_add(Z180_CBR,        "CBR",       IO_CBR).callimport();
+//nick         state_add(Z180_BBR,        "BBR",       IO_BBR).callimport();
+//nick         state_add(Z180_CBAR,       "CBAR",      IO_CBAR).callimport();
+//nick         state_add(Z180_IO3B,       "IO3B",      IO_IO3B);
+//nick         state_add(Z180_IO3C,       "IO3C",      IO_IO3C);
+//nick         state_add(Z180_IO3D,       "IO3D",      IO_IO3D);
+//nick         state_add(Z180_OMCR,       "OMCR",      IO_OMCR);
+//nick         state_add(Z180_IOCR,       "IOCR",      IO_IOCR);
        }
 
-       save_item(NAME(m_AF.w.l));
-       save_item(NAME(m_BC.w.l));
-       save_item(NAME(m_DE.w.l));
-       save_item(NAME(m_HL.w.l));
-       save_item(NAME(m_IX.w.l));
-       save_item(NAME(m_IY.w.l));
-       save_item(NAME(m_PC.w.l));
-       save_item(NAME(m_SP.w.l));
-       save_item(NAME(m_AF2.w.l));
-       save_item(NAME(m_BC2.w.l));
-       save_item(NAME(m_DE2.w.l));
-       save_item(NAME(m_HL2.w.l));
-       save_item(NAME(m_R));
-       save_item(NAME(m_R2));
-       save_item(NAME(m_IFF1));
-       save_item(NAME(m_IFF2));
-       save_item(NAME(m_HALT));
-       save_item(NAME(m_IM));
-       save_item(NAME(m_I));
-       save_item(NAME(m_nmi_state));
-       save_item(NAME(m_nmi_pending));
-       save_item(NAME(m_irq_state));
-       save_item(NAME(m_int_pending));
-       save_item(NAME(m_timer_cnt));
-       save_item(NAME(m_dma0_cnt));
-       save_item(NAME(m_dma1_cnt));
-       save_item(NAME(m_after_EI));
-
-       save_item(NAME(m_tif));
-
-       save_item(NAME(m_read_tcr_tmdr));
-       save_item(NAME(m_tmdr_value));
-       save_item(NAME(m_tmdrh));
-       save_item(NAME(m_tmdr_latch));
-
-       save_item(NAME(m_io));
-       save_item(NAME(m_iol));
-       save_item(NAME(m_ioltemp));
-
-       save_item(NAME(m_mmu));
-
-       set_icountptr(m_icount);
+//nick save_item(NAME(m_AF.w.l));
+//nick save_item(NAME(m_BC.w.l));
+//nick save_item(NAME(m_DE.w.l));
+//nick save_item(NAME(m_HL.w.l));
+//nick save_item(NAME(m_IX.w.l));
+//nick save_item(NAME(m_IY.w.l));
+//nick save_item(NAME(m_PC.w.l));
+//nick save_item(NAME(m_SP.w.l));
+//nick save_item(NAME(m_AF2.w.l));
+//nick save_item(NAME(m_BC2.w.l));
+//nick save_item(NAME(m_DE2.w.l));
+//nick save_item(NAME(m_HL2.w.l));
+//nick save_item(NAME(m_R));
+//nick save_item(NAME(m_R2));
+//nick save_item(NAME(m_IFF1));
+//nick save_item(NAME(m_IFF2));
+//nick save_item(NAME(m_HALT));
+//nick save_item(NAME(m_IM));
+//nick save_item(NAME(m_I));
+//nick save_item(NAME(m_nmi_state));
+//nick save_item(NAME(m_nmi_pending));
+//nick save_item(NAME(m_irq_state));
+//nick save_item(NAME(m_int_pending));
+//nick save_item(NAME(m_timer_cnt));
+//nick save_item(NAME(m_dma0_cnt));
+//nick save_item(NAME(m_dma1_cnt));
+//nick save_item(NAME(m_after_EI));
+//nick
+//nick save_item(NAME(m_tif));
+//nick
+//nick save_item(NAME(m_read_tcr_tmdr));
+//nick save_item(NAME(m_tmdr_value));
+//nick save_item(NAME(m_tmdrh));
+//nick save_item(NAME(m_tmdr_latch));
+//nick
+//nick save_item(NAME(m_io));
+//nick save_item(NAME(m_iol));
+//nick save_item(NAME(m_ioltemp));
+//nick
+//nick save_item(NAME(m_mmu));
+//nick
+//nick set_icountptr(m_icount);
 }
 
 /****************************************************************************
@@ -2570,76 +2570,76 @@ void z180_device::execute_set_input(int irqline, int state)
 }
 
 /* logical to physical address translation */
-bool z180_device::memory_translate(int spacenum, int intention, offs_t &address)
-{
-       if (spacenum == AS_PROGRAM)
-       {
-               address = MMU_REMAP_ADDR(address);
-       }
-       return true;
-}
+//nickbool z180_device::memory_translate(int spacenum, int intention, offs_t &address)
+//nick{
+//nick if (spacenum == AS_PROGRAM)
+//nick {
+//nick         address = MMU_REMAP_ADDR(address);
+//nick }
+//nick return true;
+//nick}
 
 
 /**************************************************************************
  * STATE IMPORT/EXPORT
  **************************************************************************/
 
-void z180_device::state_import(const device_state_entry &entry)
-{
-       switch (entry.index())
-       {
-               case Z180_R:
-                       m_R = m_rtemp & 0x7f;
-                       m_R2 = m_rtemp & 0x80;
-                       break;
-
-               case Z180_CBR:
-               case Z180_BBR:
-               case Z180_CBAR:
-                       z180_mmu();
-                       break;
-
-               case Z180_IOLINES:
-                       z180_write_iolines(m_ioltemp);
-                       break;
-
-               default:
-                       fatalerror("CPU_IMPORT_STATE(z80) called for unexpected value\n");
-       }
-}
-
-
-void z180_device::state_export(const device_state_entry &entry)
-{
-       switch (entry.index())
-       {
-               case Z180_R:
-                       m_rtemp = (m_R & 0x7f) | (m_R2 & 0x80);
-                       break;
-
-               case Z180_IOLINES:
-                       m_ioltemp = m_iol;
-                       break;
-
-               default:
-                       fatalerror("CPU_EXPORT_STATE(z80) called for unexpected value\n");
-       }
-}
-
-void z180_device::state_string_export(const device_state_entry &entry, std::string &str) const
-{
-       switch (entry.index())
-       {
-               case STATE_GENFLAGS:
-                       str = string_format("%c%c%c%c%c%c%c%c",
-                               m_AF.b.l & 0x80 ? 'S':'.',
-                               m_AF.b.l & 0x40 ? 'Z':'.',
-                               m_AF.b.l & 0x20 ? '5':'.',
-                               m_AF.b.l & 0x10 ? 'H':'.',
-                               m_AF.b.l & 0x08 ? '3':'.',
-                               m_AF.b.l & 0x04 ? 'P':'.',
-                               m_AF.b.l & 0x02 ? 'N':'.',
-                               m_AF.b.l & 0x01 ? 'C':'.');
-                       break;
-       }
-}
+//nickvoid z180_device::state_import(const device_state_entry &entry)
+//nick{
+//nick switch (entry.index())
+//nick {
+//nick         case Z180_R:
+//nick                 m_R = m_rtemp & 0x7f;
+//nick                 m_R2 = m_rtemp & 0x80;
+//nick                 break;
+//nick
+//nick         case Z180_CBR:
+//nick         case Z180_BBR:
+//nick         case Z180_CBAR:
+//nick                 z180_mmu();
+//nick                 break;
+//nick
+//nick         case Z180_IOLINES:
+//nick                 z180_write_iolines(m_ioltemp);
+//nick                 break;
+//nick
+//nick         default:
+//nick                 fatalerror("CPU_IMPORT_STATE(z80) called for unexpected value\n");
+//nick }
+//nick}
+//nick
+//nick
+//nickvoid z180_device::state_export(const device_state_entry &entry)
+//nick{
+//nick switch (entry.index())
+//nick {
+//nick         case Z180_R:
+//nick                 m_rtemp = (m_R & 0x7f) | (m_R2 & 0x80);
+//nick                 break;
+//nick
+//nick         case Z180_IOLINES:
+//nick                 m_ioltemp = m_iol;
+//nick                 break;
+//nick
+//nick         default:
+//nick                 fatalerror("CPU_EXPORT_STATE(z80) called for unexpected value\n");
+//nick }
+//nick}
+//nick
+//nickvoid z180_device::state_string_export(const device_state_entry &entry, std::string &str) const
+//nick{
+//nick switch (entry.index())
+//nick {
+//nick         case STATE_GENFLAGS:
+//nick                 str = string_format("%c%c%c%c%c%c%c%c",
+//nick                         m_AF.b.l & 0x80 ? 'S':'.',
+//nick                         m_AF.b.l & 0x40 ? 'Z':'.',
+//nick                         m_AF.b.l & 0x20 ? '5':'.',
+//nick                         m_AF.b.l & 0x10 ? 'H':'.',
+//nick                         m_AF.b.l & 0x08 ? '3':'.',
+//nick                         m_AF.b.l & 0x04 ? 'P':'.',
+//nick                         m_AF.b.l & 0x02 ? 'N':'.',
+//nick                         m_AF.b.l & 0x01 ? 'C':'.');
+//nick                 break;
+//nick }
+//nick}

diff --git a/z180/z180.h b/z180/z180.h
index ad5d158..7e31c68 100644 (file)
--- a/z180/z180.h
+++ b/z180/z180.h
@@ -150,21 +150,21 @@ protected:
        virtual void execute_set_input(int inputnum, int state) override;
 
        // device_memory_interface overrides
-       virtual space_config_vector memory_space_config() const override;
-       virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
+//nick virtual space_config_vector memory_space_config() const override;
+//nick virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
 
        // device_state_interface overrides
-       virtual void state_import(const device_state_entry &entry) override;
-       virtual void state_export(const device_state_entry &entry) override;
-       virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+//nick virtual void state_import(const device_state_entry &entry) override;
+//nick virtual void state_export(const device_state_entry &entry) override;
+//nick virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
 
        // device_disasm_interface overrides
-       virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+//nick virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
 
 private:
-       address_space_config m_program_config;
-       address_space_config m_io_config;
-       address_space_config m_decrypted_opcodes_config;
+//nick address_space_config m_program_config;
+//nick address_space_config m_io_config;
+//nick address_space_config m_decrypted_opcodes_config;
 
        PAIR    m_PREPC,m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_IX,m_IY;
        PAIR    m_AF2,m_BC2,m_DE2,m_HL2;
@@ -187,9 +187,9 @@ private:
        uint8_t   m_dma0_cnt;                       /* dma0 counter / divide by 20 */
        uint8_t   m_dma1_cnt;                       /* dma1 counter / divide by 20 */
        address_space *m_program;
-       memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_cache;
+//nick memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_cache;
        address_space *m_oprogram;
-       memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_ocache;
+//nick memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_ocache;
        address_space *m_iospace;
        uint8_t   m_rtemp;
        uint32_t  m_ioltemp;
@@ -1778,6 +1778,6 @@ private:
 };
 
 
-DECLARE_DEVICE_TYPE(Z180, z180_device)
+//nickDECLARE_DEVICE_TYPE(Z180, z180_device)
 
 #endif // MAME_CPU_Z180_Z180_H

diff --git a/z180/z180dd.hxx b/z180/z180dd.hxx
index 0676af9..40a8882 100644 (file)
--- a/z180/z180dd.hxx
+++ b/z180/z180dd.hxx
@@ -1,8 +1,13 @@
 // license:BSD-3-Clause
 // copyright-holders:Juergen Buchmueller
+#include <assert.h> /* Nick */
 OP(illegal,1) {
+#if 1
+ assert(false);
+#else
        logerror("Z180 '%s' ill. opcode $%02x $%02x\n",
                        tag(), m_ocache->read_byte((_PCD-1)&0xffff), m_ocache->read_byte(_PCD));
+#endif
 }
 
 /**********************************************************

diff --git a/z180/z180ed.hxx b/z180/z180ed.hxx
index 6892510..9a74494 100644 (file)
--- a/z180/z180ed.hxx
+++ b/z180/z180ed.hxx
@@ -1,9 +1,14 @@
 // license:BSD-3-Clause
 // copyright-holders:Juergen Buchmueller
+#include <assert.h> /* Nick */
 OP(illegal,2)
 {
+#if 1
+ assert(false);
+#else
        logerror("Z180 '%s' ill. opcode $ed $%02x\n",
                        tag(), m_ocache->read_byte((_PCD-1)&0xffff));
+#endif
 }
 
 /**********************************************************

diff --git a/z180/z180ops.h b/z180/z180ops.h
index 320a66a..7abef5e 100644 (file)
--- a/z180/z180ops.h
+++ b/z180/z180ops.h
@@ -116,8 +116,12 @@ uint8_t z180_device::ROP()
 {
        offs_t addr = _PCD;
        _PC++;
+#if 1
+ return RM(addr);
+#else
        m_extra_cycles += IO_DCNTL >> 6; // memory wait states
        return m_ocache->read_byte(MMU_REMAP_ADDR(addr));
+#endif
 }
 
 /****************************************************************
@@ -130,16 +134,24 @@ uint8_t z180_device::ARG()
 {
        offs_t addr = _PCD;
        _PC++;
+#if 1
+ return RM(addr);
+#else
        m_extra_cycles += IO_DCNTL >> 6; // memory wait states
        return m_cache->read_byte(MMU_REMAP_ADDR(addr));
+#endif
 }
 
 uint32_t z180_device::ARG16()
 {
        offs_t addr = _PCD;
        _PC += 2;
+#if 1
+ return RM(addr) | (RM(addr + 1) << 8);
+#else
        m_extra_cycles += (IO_DCNTL >> 6) * 2; // memory wait states
        return m_cache->read_byte(MMU_REMAP_ADDR(addr)) | (m_cache->read_byte(MMU_REMAP_ADDR(addr+1)) << 8);
+#endif
 }
 
 /***************************************************************