#include "emu.h"
#include "z180dasm.h"
+// horrible hacks to get inline routines to compile
+#define DISASSEMBLER 1 // horrible hack
+#define _PCD m_PC.d
+#define _PC m_PC.w.l
+#define IO(n) m_io[(n)-Z180_CNTLA0]
+#define IO_DCNTL IO(Z180_DCNTL)
+#include "z180ops.h"
+
const char *const z180_disassembler::s_mnemonic[] = {
"adc" ,"add" ,"and" ,"bit" ,"call" ,"ccf" ,"cp" ,"cpd" ,
"cpdr" ,"cpi" ,"cpir" ,"cpl" ,"daa" ,"db" ,"dec" ,"di" ,
/****************************************************************************
* Disassemble opcode at PC and return number of bytes it takes
****************************************************************************/
-offs_t z180_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
+//offs_t z180_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
+offs_t z180_disassembler::disassemble(offs_t pc, z180_device &dev)
{
const z80dasm *d;
const char *src, *ixy;
int8_t offset = 0;
uint8_t op, op1 = 0;
uint16_t ea;
- offs_t pos = pc;
- uint32_t flags = 0;
+ //offs_t pos = pc;
+ //uint32_t flags = 0;
ixy = "oops!!";
- op = opcodes.r8(pos++);
+ offs_t pc_save = dev._PCD;
+ int m_extra_cycles_save = dev.m_extra_cycles;
+ dev._PCD = pc;
+ dev.m_extra_cycles = 0;
+
+ op = dev.ROP(); //opcodes.r8(pos++);
switch (op)
{
case 0xcb:
- op = opcodes.r8(pos++);
+ op = dev.ROP(); //opcodes.r8(pos++);
d = &mnemonic_cb[op];
break;
case 0xed:
- op1 = opcodes.r8(pos++);
+ op1 = dev.ROP(); //opcodes.r8(pos++);
d = &mnemonic_ed[op1];
break;
case 0xdd:
ixy = "ix";
- op1 = opcodes.r8(pos++);
+ op1 = dev.ROP(); //opcodes.r8(pos++);
if( op1 == 0xcb )
{
- offset = (int8_t) params.r8(pos++);
- op1 = params.r8(pos++); /* fourth byte from opbase.ram! */
+ offset = (int8_t) dev.ARG(); //params.r8(pos++);
+ op1 = dev.ARG(); //params.r8(pos++); /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
else d = &mnemonic_xx[op1];
break;
case 0xfd:
ixy = "iy";
- op1 = opcodes.r8(pos++);
+ op1 = dev.ROP(); //opcodes.r8(pos++);
if( op1 == 0xcb )
{
- offset = (int8_t) params.r8(pos++);
- op1 = params.r8(pos++); /* fourth byte from opbase.ram! */
+ offset = (int8_t) dev.ARG(); //params.r8(pos++);
+ op1 = dev.ARG(); //params.r8(pos++); /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
else d = &mnemonic_xx[op1];
if( d->arguments )
{
- util::stream_format(stream, "%-5s ", s_mnemonic[d->mnemonic]);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "%-5s ", s_mnemonic[d->mnemonic]);
src = d->arguments;
while( *src )
{
switch( *src )
{
case '?': /* illegal opcode */
- util::stream_format(stream, "$%02x,$%02x", op, op1);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%02x,$%02x", op, op1);
break;
case 'A':
- ea = params.r16(pos);
- pos += 2;
- util::stream_format(stream, "$%04X", ea);
+ ea = dev.ARG16(); //params.r16(pos);
+ //pos += 2;
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%04X", ea);
break;
case 'B': /* Byte op arg */
- ea = params.r8(pos++);
- util::stream_format(stream, "$%02X", ea);
+ ea = dev.ARG(); //params.r8(pos++);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%02X", ea);
break;
case 'N': /* Immediate 16 bit */
- ea = params.r16(pos);
- pos += 2;
- util::stream_format(stream, "$%04X", ea);
+ ea = dev.ARG16(); //params.r16(pos);
+ //pos += 2;
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%04X", ea);
break;
case 'O': /* Offset relative to PC */
- offset = (int8_t) params.r8(pos++);
- util::stream_format(stream, "$%05X", pc + offset + 2);
+ offset = (int8_t) dev.ARG(); //params.r8(pos++);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%05X", pc + offset + 2);
break;
case 'P': /* Port number */
- ea = params.r8(pos++);
- util::stream_format(stream, "$%02X", ea);
+ ea = dev.ARG(); //params.r8(pos++);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%02X", ea);
break;
case 'V': /* Restart vector */
ea = op & 0x38;
- util::stream_format(stream, "$%02X", ea);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%02X", ea);
break;
case 'W': /* Memory address word */
- ea = params.r16(pos);
- pos += 2;
- util::stream_format(stream, "$%05X", ea);
+ ea = dev.ARG16(); //params.r16(pos);
+ //pos += 2;
+ fprintf/*util::stream_format*/(stderr/*stream*/, "$%05X", ea);
break;
case 'X':
- offset = (int8_t) params.r8(pos++);
+ offset = (int8_t) dev.ARG(); //params.r8(pos++);
case 'Y':
- util::stream_format(stream,"(%s%c$%02x)", ixy, sign(offset), offs(offset));
+ fprintf/*util::stream_format*/(stderr/*stream*/, "(%s%c$%02x)", ixy, sign(offset), offs(offset));
break;
case 'I':
- util::stream_format(stream, "%s", ixy);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "%s", ixy);
break;
default:
- stream << *src;
+ fputc(*src, stderr); //stream << *src;
}
src++;
}
}
else
{
- util::stream_format(stream, "%s", s_mnemonic[d->mnemonic]);
+ fprintf/*util::stream_format*/(stderr/*stream*/, "%s", s_mnemonic[d->mnemonic]);
}
- if (d->mnemonic == zCALL || d->mnemonic == zCPDR || d->mnemonic == zCPIR || d->mnemonic == zDJNZ ||
- d->mnemonic == zHLT || d->mnemonic == zINDR || d->mnemonic == zINIR || d->mnemonic == zLDDR ||
- d->mnemonic == zLDIR || d->mnemonic == zOTDR || d->mnemonic == zOTIR || d->mnemonic == zRST)
- flags = STEP_OVER;
- else if (d->mnemonic == zRETN || d->mnemonic == zRET || d->mnemonic == zRETI)
- flags = STEP_OUT;
+ //if (d->mnemonic == zCALL || d->mnemonic == zCPDR || d->mnemonic == zCPIR || d->mnemonic == zDJNZ ||
+ // d->mnemonic == zHLT || d->mnemonic == zINDR || d->mnemonic == zINIR || d->mnemonic == zLDDR ||
+ // d->mnemonic == zLDIR || d->mnemonic == zOTDR || d->mnemonic == zOTIR || d->mnemonic == zRST)
+ // flags = STEP_OVER;
+ //else if (d->mnemonic == zRETN || d->mnemonic == zRET || d->mnemonic == zRETI)
+ // flags = STEP_OUT;
- return (pos - pc) | flags | SUPPORTED;
+ pc = dev._PCD;
+ dev._PCD = pc_save;
+ dev.m_extra_cycles = m_extra_cycles_save;
+
+ return pc; //(pos - pc) | flags | SUPPORTED;
}
u32 z180_disassembler::opcode_alignment() const