1 .\" $Id: ns_as.6,v 1.5 1994/06/24 14:02:09 ceriel Exp $
2 .TH NS_AS 6 "$Revision: 1.5 $"
5 ns_as \- National Semiconductor 16032 assembler
7 ~em/lib.bin/ns/as [options] argument ...
9 The assembler for the National Semiconductor 16032 is based
10 on the universal assembler \fIuni_ass\fP(6). It is an assembler generating
11 relocatable object code in \fIack.out\fP(5) format.
12 The mnemonics for the instructions are taken from the NS-16000
13 Programmers Reference Manual.
14 The syntax of the instruction operands is similar to the syntax used
16 although the meaning is sometimes quite different.
17 The cross assembler issued by National Semiconductor
18 associates a type (sb,..) with each symbol
19 and automatically generates sb offset mode for symbols of type sb.
20 This assembler does not record the types,
21 each symbol simply produces an untyped value.
23 The possible operands are:
24 .IP "general registers
25 These are called r0, r1, r2, r3, r4, r5, r6 and r7.
26 The symbol REG is used to indicate use of any of these 8 registers
28 .IP "floating point registers
29 These are called f0, f1, f2, f3, f4, f5, f6 and f7.
30 .IP "dedicated registers
31 All types of dedicated registers can be used with the appropriate instructions.
32 Examples: sb, fp, intbase, ptb1.
36 frame pointer relative
40 stack pointer relative
42 program counter relative,
43 the expression indicates a location in memory from which the current value
44 of '.' is subtracted by the assembler.
45 E.g. "movw label(pc),r0; label: .word ..." moves the contents of the word
53 .IP external(expr)+expr
60 Usage of the scaled index operands is allowed.
62 The convention used to indicate offset length by appending :B, :W or :D
63 to offsets is not implemented.
64 The assembler tries to find out the minimal size needed for any constant
65 in an operand of the instruction placed in the text segment.
66 Offsets in instructions outside \fI.text\fP are always four bytes.
68 All special operands, e.g. register list, configuration list, have
69 the same format as in the Programmers Reference Manual.
71 Whenever possible the assembler automatically uses the short(quick) opcodes for
72 jsr(jsb), jump(br), add(addq), cmp(cmpq) and mov(movq).
74 The data types floating and packed-decimal are not supported.
76 Initialization of floating-point numbers is not possible.
78 The mnemonics of the slave processor instructions are poorly documented,
79 the format of the NS-16032S-6 data sheet is used.
81 The documentation gave contradictory information on the format
82 of a few instructions.
84 Three different schemes are presented for the encoding
85 of the last operand of the block instructions.
87 Two different values are specified for
88 the encoding of the msr register in smr and lmr instructions.
90 Two different possibilities are given for the encoding of
91 the instructions movsu and movus.
97 NS 16000 Programmers Reference Manual. Publ. no. 420306565-001PB
99 NS16032S-6, NS16032S-4 High Performance Microprocessors, november 1982
101 publ. no. 420306619-002A.
104 Ed Keizer, Vrije Universiteit