1 .\" $Id: m68k2_as.6,v 1.3 1994/06/24 14:02:06 ceriel Exp $
2 .TH M68K2_AS 6 "$Revision: 1.3 $"
5 m68k2_as \- assembler for Motorola 68000
7 ~em/lib.bin/m68k2/as [options] argument ...
9 This assembler is made with the general framework
10 described in \fIuni_ass\fP(6). It is an assembler generating relocatable
11 object code in \fIack.out\fP(5) format.
14 The 68000 has the following registers:
15 seven data-registers (d1 - d7), seven address-registers (a1 - a6, sp)
16 of which sp is the system stack pointer, a program counter (pc),
17 a status register (sr), and a condition codes register (ccr) which is actually
18 just the low order byte of the status register.
19 .IP "addressing modes"
21 .ta 8n 16n 24n 32n 40n 48n
24 reg contents of \fIreg\fP is operand, where \fIreg\fP is
25 one of the registers mentioned above (register direct)
27 (areg) contents of \fIareg\fP is address of operand, where
28 \fIareg\fP is an address-register
29 (address register indirect)
31 (areg)+ same as (areg), but after the address is used,
32 \fIareg\fP is incremented by the operand length
35 -(areg) same as (areg), but before the address is used,
36 \fIareg\fP is decremented by the operand length
40 expr(pc) \fIexpr\fP + the contents of the register yields the
41 address of the operand (displacement)
44 expr(pc, ireg) \fIexpr\fP + the contents of the register + the contents
45 of \fIireg\fP yields the address of the operand. \fIireg\fP is
46 an address- or a data-register.
47 \fIireg\fP may be followed by .w or .l indicating whether
48 the size of the index is a word or a long
49 (displacement with index)
51 expr \fIexpr\fP is the address of the operand
54 #expr \fIexpr\fP is the operand (immediate)
57 Some instructions have as operand a register list. This list consists of
58 one or more ranges of registers separated by '/'s. A register range consists
59 of either one register (e.g. d3) or two registers separated by a '-'
60 (e.g. a2-a4, or d4-d5). The two registers must be in the same set (address-
61 or data-registers) and the first must have a lower number than the second.
63 Some instructions can have a byte, word, or longword operand.
64 This may be indicated by prepending the mnemonic with .b, .w, or .l
65 respectively. Default is .w.
71 MC68000 16-bit microprocessor User's manual, Motorola Inc, 1979
75 .ta 8n 16n 24n 32n 40n 48n 56n 64n
80 movem.l a0/d0/d1,.savreg
81 move.l (sp)+,a0 ! return address
82 move (sp)+,d0 ! destination size
83 sub (sp)+,d0 ! destination - source size
85 sub d0,sp ! pop extra bytes
98 movem.l .savreg,a0/d0/d1