1 .\" $Id: i86_as.6,v 1.5 1994/06/24 14:01:57 ceriel Exp $
2 .TH I86_AS 6 "$Revision: 1.5 $"
5 i86_as \- assembler for Intel 8086
7 ~em/lib.bin/i86/as [options] argument ...
9 This assembler is made with the general framework
10 described in \fIuni_ass\fP(6). It is an assembler generating relocatable
11 object code in \fIack.out\fP(5) format.
14 An address on the Intel 8086 consists of two pieces:
15 a segment number and an offset. A memory address is computed as
16 the segment number shifted left 4 bits + the offset.
17 Assembly language addresses only give the offset, with the exception of
18 the address of an inter-segment jump or call (see \fIaddressing modes\fP
21 The Intel 8086 has the following 16-bit registers:
23 Four general registers: ax (accumulator), bx (base), cx (count), and dx (data).
24 The upper halves and lower halves of these registers are separately
25 addressable as ah, bh, ch, dh, and al, bl, cl, dl respectively.
27 Two pointer registers: sp (stack pointer) and bp (base pointer).
29 Two index registers: si (source index) and di (destination index).
31 Four segment registers: cs (code), ds (data), ss (stack), and es (extra).
32 .IP "addressing modes"
34 .ta 8n 16n 24n 32n 40n 48n
37 expr the value of \fIexpr\fP is immediate data or
38 an address offset. There is no special
39 notation for immediate data.
41 register one of the aforementioned general registers
42 or their upper or lower halves, or one of the
43 four segment registers.
45 (expr) the value of expr is the address of the operand.
48 expr (reg) the value of \fIexpr\fP (if present) + the contents of
49 \fIreg\fP (which must be a pointer or an index register)
50 is the address of the operand.
54 the value of \fIexpr\fP (if present) + the contents of
55 \fIpreg\fP (which must be a pointer register) + the
56 contents of \fIireg\fP (which must be an index register)
57 is the address of the operand.
59 The next addressing mode is only allowed with the instructions
62 expr : expr the value of the first \fIexpr\fP is a segment number,
63 the value of the second \fIexpr\fP is an address offset.
64 The (absolute) address of the operand is computed
69 Each time an address is computed the processor decides which segment register
70 to use. You can override the processor's choice by prefixing the instruction
71 with one of eseg, cseg, sseg, or dseg; these prefixes indicate that the
72 assembler should choose es, cs, ss, or ds instead.
82 MCS-86 assembly language reference manual, 1978, Intel Corporation
85 .ta 8n 16n 24n 32n 40n 48n
86 An example of Intel 8086 assembly language: