1 .\" $Id: 6809_as.6,v 1.3 1994/06/24 14:01:42 ceriel Exp $
2 .TH 6809_AS 6 "$Revision: 1.3 $"
5 6809_as \- assembler for 6809
7 ~em/lib.bin/6809/as [options] argument ...
9 This assembler is made with the general framework
10 described in \fIuni_ass\fP(6). It is an assembler generating relocatable
11 object code in \fIack.out\fP(5) format.
14 The 6809 contains four 8-bit registers registers:
15 two accumulators (a and b),
16 a direct page register (dp),
17 and a condition code register (cc),
18 and five 16-bit registers:
19 two index registers (x and y),
20 a user an a hardware stack pointer (u resp. s),
21 and a program counter (pc).
22 The index registers and the stack pointers are indexable.
23 Accumulators a and b can be concatenated to form
24 the double accumulator d,
25 of which a is the high and b is the low byte.
26 An instruction that refers to accumulator a
27 has an "a" as last character.
28 In the same way a "b" means that the instruction
29 uses b as accumulator.
30 .IP "pseudo instructions"
31 The 6809 assembler recognizes one additional instruction
32 that is not translated into a machine instruction: setdp.
33 It expects an expression as argument.
34 This is used for efficient address encoding of some addressing
36 .IP "addressing modes"
38 .ta 8n 16n 24n 32n 40n 48n
41 reg The operand of the instruction is in \fIreg\fP.
43 reglist \fIreglist\fP is a either list of registers, seperated
44 by ','s, or the word "all". It encodes in a register
45 save mask, where "all" means all registers, that can
46 be used by the push-pull instructions pshs, pshu,
49 <expr The one-byte value of \fIexpr\fP is an address within
50 a 256-byte page. The particular page in use is
51 indicated by the contents of dp, so \fIexpr\fP is the
52 low byte of the effective address of the operand,
53 and dp the high byte. (direct)
55 >expr The two-byte value of \fIexpr\fP is the exact memory
56 address. Not that this mode always requires one
57 byte more than "<expr". (extended)
59 expr The value of \fIexpr\fP is an address.
60 Except for long branches, this value is examined
61 first to see if a short encoding is possible.
62 When the instruction is a short branch, the value
63 is checked to see if the address is not too remote,
64 because in that case this branch is automatically
65 replaced by a long branch. When the instruction is
66 not a branch, the high byte of the value is compared
67 with the value of the argument of the last setdp
68 pseudo. If they are equal, this mode is replaced by
69 "<expr", else by ">expr".
70 (relative for branch-instructions)
72 #expr The value of \fIexpr\fP is one- or two-byte immediate
75 (expr) The value of \fIexpr\fP is a pointer to the address
76 of the operand. (indirect)
78 expr, reg The value of \fIexpr\fP added to the contents of \fIreg\fP
79 (which must be a 16-bit register) yields the
80 effective address of the operand.
81 (constant-offset indexed)
83 , ireg The contents of \fIireg\fP (which must be indexable)
84 yields the effective address of the operand.
85 (constant-offset indexed)
87 (expr, reg) The value of \fIexpr\fP added to the contents of \fIreg\fP
88 (which must be a 16-bit register) yields a pointer
89 to the effective address of the operand.
90 (constant-offset indexed indirect)
92 (, ireg) The contents of \fIireg\fP (which must be indexable)
93 yields a pointer to the effective address of the
94 operand. (constant-offset indexed indirect)
96 ac, ireg The contents of \fIac\fP (which must be an accumulator)
97 added to the contents of \fIireg\fP (which must be
98 indexable) yields the effective address of the
99 operand. (accumulator indexed)
101 (ac, ireg) The contents of \fIac\fP (which must be an accumulator)
102 added to the contents of \fIireg\fP (which must be
103 indexable) yields a pointer to the effective address
104 of the operand. (accumulator indexed indirect)
107 ,ireg++ The contents of \fIireg\fP (which must be indexable) is
108 used as effective address of the operand. After that
109 it is incremented by 1 (+) or 2 (++).
112 (,ireg++) The contents of \fIireg\fP (which must be indexable) is
113 used as a pointer to the effective address of the
114 operand. After that it is incremented by 2.
115 (auto-increment indirect)
118 ,--ireg \fIireg\fP (which must be indexable) is decremented
119 by 1 (-) or 2 (--). After that, its contents is used
120 as effective address of the operand.
123 (,--ireg) \fIireg\fP (which must be indexable) is decremented by 2.
124 After that, its contents is used as a pointer to the
125 effective address of the operand.
126 (auto-decrement indirect)
134 MC6809 preliminary programming manual, Motorola Inc., First Edition, 1979
136 An example of 6809 assembly code.
138 .ta 8n 16n 24n 32n 40n 48n
143 ldx #table - 2 !start of table
149 jmp (b, x) !accumulator offset indirect