1 .\" $Id: 6500_as.6,v 1.5 1994/06/24 14:01:33 ceriel Exp $
2 .TH 6500_AS 6 "$Revision: 1.5 $"
5 6500_as \- assembler for Mostek 6500
7 ~em/lib.bin/6500/as [options] argument ...
9 This assembler is made with the general framework
10 described in \fIuni_ass\fP(6). It is an assembler-loader.
11 Output is in \fIack.out\fP(5) object format, but not relocatable.
12 .SH "SECTIONS and TYPES"
13 An additional section, the \fIzeropage\fP, can be started by the
14 \&\fI.sect .zero\fP pseudo-instruction.
15 Some adressing-modes require an address between 0 and 255.
16 Such an address must be defined with the means of the \fI.sect .zero\fP
18 A plain number between 0 and 255 is not allowed.
19 The assembler will complain that it must be a zero page expression.
30 An two-byte expression followed by the pseudo-operator \fI.h\fP (\fI.l\fP)
31 has the value of the higher (lower) byte of the expression.
32 \&\fI.h\fP and \fI.l\fP bind stronger than all other operators.
33 E.g. -1.h parses as -[1.h] which has value 0.
34 You have to write [-1].h to get 0xFF.
35 .IP "addressing modes"
37 .ta 16n 24n 32n 40n 48n
40 #expr 8-bit value (immediate)
44 expr, x expr + contents of x
46 expr, y expr + contents of y
47 yields address (indexed)
49 (expr) address of address (only with JMP) (indirect)
52 In the next two addressing modes \fIexpr\fP has to be
53 a zeropage expression.
56 (expr, x) expr + contents of x
57 yields address (pre-indexed indirect)
59 (expr), y contents of expr + contents of y
60 yields address (post-indexed indirect)
63 There are two mnemonics that do not map onto one machine-instruction:
64 \fIadd\fP and \fIsub\fP. \fIAdd mode\fP maps onto \fIclc; adc mode\fP.
65 \fISub mode\fP maps onto \fIsec; sbc mode\fP.