1 rcsid = "$Id: table,v 1.15 1994/06/24 13:10:20 ceriel Exp $"
3 /*****************************************************************
5 * N S 1 6 0 3 2 B A C K - E N D T A B L E *
8 * Author: Annita Wilschut. *
10 * Corrections: Nigel Hall *
12 *****************************************************************/
14 /* The handling of arrays was not complete. Tables extended
15 * in order to handle access to other lexical levels between
16 * local and global. Corrections to ordering of tokens made.
18 * The token length was added to cope with the length field
19 * of MOVMi instructions. The lengths adjusted by division by 4.
21 * The compare procedures did not return a result. Caused
22 * an extra word to be popped off the stack. The "cmi txx ior" &
23 * "txx and" sequences needed their branch criterion inverting.
28 * Deze tabel implementeert, naast gewone, ook floating point
29 * instructies. Bij gebrek aan een floating point processor
30 * is het betreffende onderdeel van de tabel echter niet
31 * getest. Wanneer NOFLOAT "aan" is worden er zeker geen
32 * floating point instructies gegenereerd. Na verwijdering van
33 * alle ifdef's worden er bij de vertaling van een programma dat
34 * geen floating point gebruikt, hoogst waarschijnlijk ook
35 * geen floating point instructies gegenereerd. Dit is echter niet
47 REG /* Normal registers */
48 FREG /* Floating point registers */
49 DFREG(8) /* double floating reg for double precision */
50 MEMREG /* sp, fp en sb */
51 REGPAIR(8) /* register pair for extended integer instr */
56 PROCREG /* processor register - used by LPRi & SPRi */
62 r7,r4,r5,r6 : REG regvar .
63 f0,f1,f2,f3,f4,f5,f6,f7 : FREG.
67 f67("f6")=f6+f7 : DFREG.
68 r01("r0")=r0+r1,r23("r2")=r2+r3 : REGPAIR.
69 sp : STACKPOINTER, MEMREG, PROCREG.
71 fp : LOCALBASE, MEMREG, PROCREG.
72 sb : STATICBASE, MEMREG, PROCREG.
77 const4 = { INT num; } 4 num .
78 LOCAL = { INT ind;} 4 ind "(fp)" .
79 DLOCAL = { INT ind;} 8 ind "(fp)".
82 addr_local = { INT ind; } 4 .
83 addr_external = { ADDR disp; } 4 disp .
85 regrel1 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
86 regrel2 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
87 regrel4 = { REG reg; ADDR disp; } 4 disp "(" reg ")" .
88 regrel8 = { REG reg; ADDR disp; } 8 disp "(" reg ")" .
89 memregrel1 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
90 memregrel2 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
91 memregrel4 = { MEMREG reg; ADDR disp; } 4 disp "(" reg ")" .
92 memregrel8 = { MEMREG reg; ADDR disp; } 8 disp "(" reg ")" .
93 memrel1 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
95 memrel2 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
97 memrel4 = { MEMREG reg; ADDR disp1; ADDR disp2; } 4 disp2 "("
99 memrel8 = { MEMREG reg; ADDR disp1; ADDR disp2; } 8 disp2 "("
101 absolute1 = { ADDR disp; } 4 "@" disp .
102 absolute2 = { ADDR disp; } 4 "@" disp .
103 absolute4 = { ADDR disp; } 4 "@" disp .
104 absolute8 = { ADDR disp; } 8 "@" disp .
107 regcon4 = { REG reg; ADDR disp; } 4 .
108 memregcon4 = { MEMREG reg; ADDR disp; } 4 .
109 memregrelcon4 = { MEMREG reg; ADDR disp1; ADDR disp2;} 4 .
111 label = {ADDR disp; } 4 disp .
113 regrelsid = {INT ind; REG reg1; REG reg2; } 4 ind "(" reg1
115 memregrelsid = {INT ind; MEMREG reg1; REG reg2; } 4 ind "(" reg1
117 abssid = {ADDR disp; REG reg; } 4 "@" disp "[" reg ":d]" .
118 fprelsid = {ADDR disp1; ADDR disp2; REG reg; } 4
119 disp2 "(" disp1 "(fp))[" reg ":d]" .
120 sprelsid = {ADDR disp1; ADDR disp2; REG reg; } 4
121 disp2 "(" disp1 "(sp))[" reg ":d]" .
125 src1 = regrel1 + memregrel1 + memrel1 + absolute1 .
126 src2 = regrel2 + memregrel2 + memrel2 + absolute2 .
127 src4 = REG + const4 + LOCAL + regrel4 + memrel4 +
128 memregrel4 + regrelsid + memregrelsid + abssid + absolute4 +
130 con4 = regcon4 + memregcon4 + memregrelcon4 .
131 tossrc4 = TOS + src4 .
132 consrc4 = con4 + src4 .
133 fsrc4 = FREG + LOCAL + regrel4 + memrel4 +
134 memregrel4 + memregrelsid + abssid + absolute4 .
135 tosfsrc4 = TOS + fsrc4 .
136 fsrc8 = DFREG + DLOCAL + regrel8 + memrel8 +
137 memregrel8 + absolute8 .
138 tosfsrc8 = TOS + fsrc8 .
140 tosdst1 = TOS + dst1 .
142 tosdst2 = TOS + dst2 .
143 dst4 = REG + LOCAL + regrel4 + memregrel4 + memrel4 +
144 absolute4 + regrelsid + memregrelsid + abssid .
145 tosdst4 = TOS + dst4 .
146 fdst4 = FREG + LOCAL + regrel4 + memregrel4 + memrel4 +
147 absolute4 + regrelsid + memregrelsid + abssid .
148 tosfdst4 = TOS + fdst4 .
150 tosfdst8 = tosfsrc8 .
151 regrel = regrel1 + regrel2 + regrel4 +regrel8 .
152 memregrel = memregrel1 + memregrel2 + memregrel4 +memregrel8 .
153 memrel = memrel1 + memrel2 + memrel4 +memrel8 .
154 rel = regrel + memregrel + memrel + regrelsid + memregrelsid
155 + fprelsid + sprelsid .
156 absolute = absolute1 + absolute2 + absolute4 + absolute8 + abssid .
157 regs = REG + FREG + DFREG + MEMREG + REGPAIR .
158 allmincon = ALL - (regs + const4 + addr_local + addr_external
159 + regcon4 + memregcon4) .
160 src24 = src2 + src4 .
161 src124 = src1 + src2 + src4 .
162 tossrc24 = TOS + src24 .
163 tossrc124 = TOS + src124 .
169 movb tossrc124:ro, tosdst1:wo .
170 movw tossrc24:ro, tosdst2:wo .
171 movd tossrc4:ro, tosdst4:wo .
172 movf tosfsrc4:ro, tosfdst4:wo .
173 movl tosfsrc8:ro, tosfdst8:wo .
174 movdf tossrc4:ro, tosfdst4:wo .
175 movdl tossrc4:ro, tosfdst8:wo .
176 movfl tosfsrc4:ro, tosfdst8:wo .
177 movlf tosfsrc8:ro, tosfdst4:wo .
178 truncfd tosfsrc4:ro, tosdst4:wo .
179 truncld tosfsrc8:ro, tosdst4:wo .
180 cmpb tossrc124:ro, src1:ro .
181 cmpw tossrc24:ro, src2:ro .
182 cmpd tossrc4:ro, tossrc4:ro .
183 cmpf tosfsrc4:ro, tosfsrc4:ro .
184 cmpl tosfsrc8:ro, tosfsrc8:ro .
185 addd tossrc4:ro, tosdst4:rw .
186 addcd tossrc4:ro, tosdst4:rw .
187 addf tosfsrc4:ro, tosfdst4:rw .
188 addl tosfsrc8:ro, tosfdst8:rw .
189 subd tossrc4:ro, tosdst4:rw .
190 subcd tossrc4:ro, tosdst4:rw .
191 subf tosfsrc4:ro, tosfdst4:rw .
192 subl tosfsrc8:ro, tosfdst8:rw .
193 muld tossrc4:ro, tosdst4:rw .
194 mulf tosfsrc4:ro, tosfdst4:rw .
195 mull tosfsrc8:ro, tosfdst8:rw .
196 quod tossrc4:ro, tosdst4:rw .
197 divd tossrc4:ro, tosdst4:rw .
198 divf tosfsrc4:ro, tosfdst4:rw .
199 divl tosfsrc8:ro, tosfdst8:rw .
200 remd tossrc4:ro, tosdst4:rw .
201 modd tossrc4:ro, tosdst4:rw .
202 negd tossrc4:ro, tosdst4:wo .
203 negf tosfsrc4:ro, tosfdst4:wo .
204 negl tosfsrc8:ro, tosfdst8:wo .
205 roundfd tosfsrc4:ro, tosdst4:wo .
206 roundld tosfsrc8:ro, tosdst4:wo .
207 andd tossrc4:ro, tosdst4:wo .
208 ord tossrc4:ro, tosdst4:wo .
209 xord tossrc4:ro, tosdst4:rw .
210 comd tossrc4:ro, tosdst4:rw .
211 ashd tossrc124:ro, tosdst4:rw .
212 lshd tossrc124:ro, tosdst4:rw .
213 rotd tossrc124:ro, tosdst4:rw .
214 movzbd tossrc124:ro, tosdst4:wo .
215 movzwd tossrc24:ro, tosdst4:wo .
216 movxbd tossrc124:ro, tosdst4:wo .
217 movxwd tossrc124:ro, tosdst4:wo .
218 addr tosdst4:ro, tosdst4:wo .
219 movqd const4:ro, tosdst4:wo .
220 cmpqd const4:ro, tossrc4:ro .
221 meid tossrc4:ro, REGPAIR:rw .
231 tbitd tossrc4:ro, tosdst4:ro .
232 cbitd tossrc4:ro, tosdst4:rw .
233 sbitd tossrc4:ro, tosdst4:rw .
234 movmd tossrc4:ro, tosdst4:rw, const4 .
235 indexd REG, tossrc4:ro, tossrc4:ro .
250 acbd const4:ro, tosdst4:rw, label .
255 lprd PROCREG:rw, tossrc4:ro .
256 sprd PROCREG:ro, tossrc4:rw .
263 from memregrelcon4 to tosdst4
264 gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, %2
266 from regcon4 to tosdst4
267 gen addr {regrel4, %1.reg, %1.disp}, %2
269 from memregcon4 to tosdst4
270 gen addr {memregrel4, %1.reg, %1.disp}, %2
272 from tossrc4 to tosdst4
275 from tossrc124 to tosdst1
278 from tossrc24 to tosdst2
282 from tosfsrc4 to FREG
285 from FREG to tosfdst4
288 from tosfsrc8 to DFREG
291 from DFREG to tosfdst8
317 gen addr {memregrel4, %1, 0}, {TOS}
319 from addr_local to STACK
320 gen addr {memregrel4, fp, %1.ind}, {TOS}
322 from regcon4 to STACK
323 gen addr {regrel4, %1.reg, %1.disp}, {TOS}
325 from memregcon4 to STACK
326 gen addr {memregrel4, %1.reg, %1.disp}, {TOS}
328 from memregrelcon4 to STACK
329 gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, {TOS}
332 gen movd {LOCAL, %1.ind+4}, {TOS}
333 movd {LOCAL, %1.ind}, {TOS}
335 from absolute8 to STACK
336 gen movd {absolute4, %1.disp+4}, {TOS}
337 movd {absolute4, %1.disp}, {TOS}
339 from memrel8 to STACK
340 gen movd {memrel4, %1.reg, %1.disp1, %1.disp2+4}, {TOS}
341 movd {memrel4, %1.reg, %1.disp1, %1.disp2}, {TOS}
343 from regrel8 to STACK
344 gen movd {regrel4, %1.reg, %1.disp+4}, {TOS}
345 movd {regrel4, %1.reg, %1.disp}, {TOS}
347 from memregrel8 to STACK
348 gen movd {memregrel4, %1.reg, %1.disp+4}, {TOS}
349 movd {memregrel4, %1.reg, %1.disp}, {TOS}
356 gen move {TOS}, %a yields %a
361 gen move {TOS}, %a yields %a
365 gen move {TOS}, %a yields %a
370 gen move {TOS}, %a yields {regcon4, %a, 0}
372 from MEMREG yields {memregcon4, %1, 0}
376 gen addr {memregrel4, %1, 0}, %a yields %a
378 from REG yields {regcon4, %1, 0}
381 gen addr {regrel4, %1.reg, %1.disp}, %1.reg
386 gen addr {memregrel4, %1.reg, %1.disp}, %a
389 from LOCAL yields {memregrel4, fp, %1.ind}
393 gen addr {LOCAL, %1.ind}, %a yields %a
396 uses reusing %1, REG=%1 yields %a
399 uses reusing %1, REG=%1 yields {regcon4, %a, 0}
403 gen addr {memrel4, %1.reg, %1.disp1, %1.disp2}, %a
406 from memregrel4 yields {memregrelcon4, %1.reg,
411 gen movzbd %1, %a yields %a
415 gen movzwd %1, %a yields %a
417 from DLOCAL yields {LOCAL, %1.ind+4}
420 from absolute8 yields {absolute4, %1.disp+4}
423 from memrel8 yields {memrel4, %1.reg,
424 %1.disp1, %1.disp1+4}
428 from regrel8 yields {regrel4, %1.reg, %1.disp+4}
429 {regrel4, %1.reg, %1.disp}
431 from memregrel8 yields {memregrel4, %1.reg, %1.disp+4}
432 {memregrel4, %1.reg, %1.disp}
436 /**********************************************************************
437 * Group1 : load instructions *
438 **********************************************************************/
440 pat loc yields {const4, $1}
442 pat ldc leaving loc 18
445 pat lol yields {LOCAL, $1}
447 pat loe yields {absolute4, $1}
449 pat lil yields {memrel4, fp, $1, 0}
451 pat lol lof yields {memrel4, fp, $1, $2}
453 pat lal lof yields {LOCAL, $1+$2}
455 pat lae lof yields {absolute4, $1+$2}
458 with exact MEMREG yields {memregrel4, %1, $1}
459 with REG yields {regrel4, %1, $1}
460 with exact addr_external yields {absolute4, %1.disp+$1}
461 with exact addr_local yields {LOCAL, %1.ind+$1}
462 with exact memregrel4 yields {memrel4, %1.reg,
464 with exact memregrelcon4 yields {memrel4, %1.reg,
465 %1.disp1, $1+%1.disp2}
466 with exact memregcon4 yields {memregrel4, %1.reg, %1.disp+$1}
467 with exact regcon4 yields {regrel4, %1.reg, %1.disp+$1}
468 with exact LOCAL yields {memrel4, fp, %1.ind, $1}
470 pat lxl $1==0 yields fp
472 pat lxl $1==1 yields {LOCAL, 8}
474 pat lxl $1==2 yields {memrel4, fp, 8, 8}
477 uses REG={memrel4, fp, 8, 8},
480 move {regrel4, %a, 8}, %a
481 acbd {const4, 0-1}, %b, {label, "1b"}
484 pat lxa $1==0 yields {addr_local, 8}
486 pat lxa $1==1 yields {memregrelcon4, fp, 8, 8}
489 uses REG={memrel4, fp, 8, 8} yields {regcon4, %a, 8}
492 uses REG={memrel4, fp, 8, 8},
495 move {regrel4, %a, 8}, %a
496 acbd {const4, 0-1}, %b, {label, "1b"}
497 yields {regcon4, %a, 8}
499 pat lol loi $2==1 yields {memrel1, fp, $1, 0}
501 pat lal loi $2==1 yields {memregrel1, fp, $1}
503 pat lae loi $2==1 yields {absolute1, $1}
505 pat lol loi $2==4 yields {memrel4, fp, $1, 0}
507 pat lal loi $2==4 yields {LOCAL, $1}
509 pat lae loi $2==4 yields {absolute4, $1}
511 pat lal yields {addr_local, $1}
513 pat lae yields {addr_external, $1}
516 with exact MEMREG yields {memregrel1, %1, 0}
517 with REG yields {regrel1, %1, 0}
518 with exact memregcon4 yields {memregrel1, %1.reg, %1.disp}
519 with exact regcon4 yields {regrel1, %1.reg, %1.disp}
520 with exact memregrel4 yields {memrel1, %1.reg, %1.disp, 0}
521 with exact memregrelcon4 yields {memrel1, %1.reg,
523 with exact addr_local yields {memregrel1, fp, %1.ind}
524 with exact addr_external yields {absolute1, %1.disp}
525 with exact LOCAL yields {memrel1, fp, %1.ind, 0}
528 with exact MEMREG yields {memregrel2, %1, 0}
529 with REG yields {regrel2, %1, 0}
530 with exact memregcon4 yields {memregrel2, %1.reg, %1.disp}
531 with exact regcon4 yields {regrel2, %1.reg, %1.disp}
532 with exact memregrel4 yields {memrel2, %1.reg, %1.disp, 0}
533 with exact memregrelcon4 yields {memrel2, %1.reg,
535 with exact addr_local yields {memregrel2, fp, %1.ind}
536 with exact addr_external yields {absolute2, %1.disp}
537 with exact LOCAL yields {memrel2, fp, %1.ind, 0}
540 with exact MEMREG yields {memregrel4, %1, 0}
541 with REG yields {regrel4, %1, 0}
542 with exact memregcon4 yields {memregrel4, %1.reg, %1.disp}
543 with exact regcon4 yields {regrel4, %1.reg, %1.disp}
544 with exact memregrel4 yields {memrel4,%1.reg,%1.disp,0}
545 with exact memregrelcon4 yields {memrel4, %1.reg,
547 with exact addr_local yields {LOCAL, %1.ind}
548 with exact addr_external yields {absolute4, %1.disp}
549 with exact LOCAL yields {memrel4, fp, %1.ind, 0}
552 with REG yields {regrel8, %1, 0}
553 with exact addr_local yields {DLOCAL, %1.ind}
554 with exact addr_external yields {absolute8, %1.disp}
555 with exact LOCAL yields {memrel8, fp, %1.ind, 0}
559 uses REG = {const4, $1}
563 movd {regrel4, %1, 0}, {TOS}
564 acbd {const4, 0-4}, %a, {label, "1b"}
568 gen jsr {absolute4, ".los"}
570 pat ldl yields {DLOCAL, $1}
572 pat lde yields {absolute8, $1}
575 with exact addr_local yields {DLOCAL, %1.ind+$1}
576 with exact addr_external yields {absolute8, %1.disp+$1}
577 with regcon4 yields {regrel8, %1.reg,
580 pat lpi yields {addr_external, $1}
583 /*****************************************************************
584 * Group2 : store instructions *
585 *****************************************************************/
589 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
590 gen move %1, {LOCAL, $1}
592 gen move {TOS}, {LOCAL, $1}
594 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
595 gen movzbd %1, {LOCAL, $1}
598 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
599 gen move %1, {LOCAL, $1}
604 kills absolute + rel + memregrelcon4
605 gen move %1, {absolute4, $1}
607 kills absolute + rel + memregrelcon4
608 gen movzbd %1, {absolute4, $1}
611 kills absolute + rel + memregrelcon4
612 gen move %1, {absolute4, $1}
618 gen move %1, {memrel4, fp, $1, 0}
621 gen movzbd %1, {memrel4, fp, $1, 0}
625 gen move %1, {memrel4, fp, $1, 0}
629 with exact MEMREG src4 + con4
631 gen move %2, {memregrel4, %1, $1}
634 gen move %2, {regrel4, %1, $1}
635 with exact memregcon4 src4 + con4
637 gen move %2, {memregrel4, %1.reg, $1 + %1.disp}
638 with exact regcon4 consrc4
640 gen move %2, {regrel4, %1.reg, $1 + %1.disp}
641 with exact memregrel4 consrc4
643 gen move %2, {memrel4, %1.reg, %1.disp, $1}
644 with exact memregrelcon4 consrc4
646 gen move %2, {memrel4, %1.reg, %1.disp1, %1.disp2 + $1}
647 with exact addr_external consrc4
649 gen move %2, {absolute4, %1.disp + $1}
650 with exact addr_local consrc4
652 gen move %2, {LOCAL,%1.ind + $1}
656 gen move %2, {regrel4, %1, $1}
662 gen move %1, {LOCAL, $1}
667 gen move %1, {absolute4, $1}
672 gen move %1, {memrel4, fp, $1, 0}
677 gen move %1, {memrel1, fp, $1, 0}
680 with exact MEMREG consrc4
682 gen move %2, {memregrel4, %1, 0}
685 gen move %2, {regrel4, %1, 0}
689 gen movf %2, {regrel4, %1, 0}
691 with exact memregcon4 consrc4
693 gen move %2, {memregrel4, %1.reg, %1.disp}
694 with exact regcon4 consrc4
696 gen move %2, {regrel4, %1.reg, %1.disp}
697 with exact memregrel4 consrc4
699 gen move %2, {memrel4, %1.reg, %1.disp, 0}
700 with exact memregrelcon4 consrc4
702 gen move %2, {memrel4, %1.reg, %1.disp1, %1.disp2}
703 with exact addr_external consrc4
705 gen move %2, {absolute4, %1.disp}
706 with exact addr_local consrc4
708 gen move %2, {LOCAL, %1.ind}
709 with exact LOCAL consrc4
711 gen move %2, {memrel4, fp, %1.ind, 0}
716 gen move %2, {regrel2, %1.reg, %1.disp}
717 with exact addr_external src24
719 gen move %2, {absolute2, %1.disp}
720 with exact addr_local src24
722 gen move %2, {memregrel2, fp, %1.ind}
725 with exact MEMREG src124
727 gen move %2, {memregrel1, %1, 0}
730 gen move %2, {regrel1, %1, 0}
731 with exact memregcon4 src124
733 gen move %2, {memregrel1, %1.reg, %1.disp}
734 with exact regcon4 src124
736 gen move %2, {regrel1, %1.reg, %1.disp}
737 with exact memregrel4 src124
739 gen move %2, {memrel1, %1.reg, %1.disp, 0}
740 with exact memregrelcon4 src124
742 gen move %2, {memrel1, %1.reg, %1.disp1, %1.disp2}
743 with exact addr_external src124
745 gen move %2, {absolute1, %1.disp}
746 with exact addr_local src124
748 gen move %2, {memregrel1, fp, %1.ind}
749 with exact LOCAL src124
751 gen move %2, {memrel1, fp, %1.ind, 0}
757 gen move %2, {regrel8, %1.reg, %1.disp}
758 with exact addr_external DFREG
760 gen move %2, {absolute8, %1.disp}
761 with exact addr_local DFREG
763 gen move %2, {memregrel8, fp, %1.ind}
765 with regcon4 consrc4 consrc4
767 gen move %1, {regrel4, %1.reg, %1.disp}
768 move %2, {regrel4, %1.reg, %1.disp+4}
773 uses REG={const4, $1}
775 movd {TOS}, {regrel4, %1, 0}
776 addr {regrel4, %1, 4}, %1
777 acbd {const4, 0-4}, %a, {label, "1b"}
781 gen jsr {absolute4, ".sts"}
785 kills rel, LOCAL %ind-8 < $1 && %ind+8 > $1
786 gen move %1, {LOCAL, $1}
787 move %2, {LOCAL, $1+4}
790 kills rel, LOCAL %ind-8 < $1 && %ind+8 > $1
791 gen move %1, {DLOCAL, $1}
796 kills absolute + rel + memregrelcon4
797 gen move %1, {absolute4, $1}
798 move %2, {absolute4, $1+4}
801 kills absolute + rel + memregrelcon4
802 gen move %1, {absolute8, $1}
806 with exact addr_local consrc4 consrc4
808 gen move %2, {LOCAL, %1.ind+$1}
809 move %3, {LOCAL, %1.ind+4+$1}
810 with exact addr_external consrc4 consrc4
812 gen move %2, {absolute4, %1.disp+$1}
813 move %3, {absolute4, %1.disp+4+$1}
814 with regcon4 consrc4 consrc4
816 gen move %2, {regrel4, %1.reg, %1.disp+$1}
817 move %3, {regrel4, %1.reg, %1.disp+$1+4}
819 with exact addr_local DFREG
821 gen move %2, {DLOCAL, %1.ind+$1}
822 with exact addr_external DFREG
824 gen move %2, {absolute8, %1.disp+$1}
825 with exact regcon4 DFREG
827 gen move %2, {regrel8, %1.reg, %1.disp+$1}
830 /*****************************************************************
831 * Group3 : integer arithmetic *
832 *****************************************************************/
833 pat loe loc adi ste $3==4 && $1==$4
834 kills absolute + rel + memregrelcon4
835 gen addd {const4, $2}, {absolute4, $1}
837 pat lol loc adi stl $3==4 && $1==$4
838 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
839 gen addd {const4, $2}, {LOCAL, $1}
841 pat lil loc adi sil $3==4 && $1==$4
843 gen addd {const4, $2}, {memrel4, fp, $1, 0}
845 pat lol adi stl $1==$3 && $2==4
847 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
848 gen addd %1, {LOCAL, $1}
850 pat lil adi sil $1==$3 && $2==4
853 gen addd %1, {memrel4, fp, $1, 0}
855 pat loe adi ste $1==$3 && $2==4
857 kills absolute + rel + memregrelcon4
858 gen addd %1, {absolute4, $1}
861 with exact MEMREG const4 yields {memregcon4, %1, %2.num}
862 with exact REG const4 yields {regcon4, %1, %2.num}
863 with exact const4 REG yields {regcon4, %2, %1.num}
864 with exact memregrel4 const4 yields {memregrelcon4, %1.reg,
866 with exact memregcon4 const4 yields {memregcon4, %1.reg,
868 with exact regcon4 const4 yields {regcon4, %1.reg,
870 with exact memregrelcon4 const4 yields {memregrelcon4, %1.reg,
871 %1.disp1, %1.disp2+%2.num}
872 with exact addr_local const4 yields {addr_local, %1.ind+%2.num}
873 with exact LOCAL const4 yields {memregrelcon4, fp,
875 with exact const4 LOCAL yields {memregrelcon4, fp,
877 with exact const4 addr_local yields {addr_local, %2.ind+%1.num}
878 with exact MEMREG addr_external yields {memregcon4, %1, %2.disp}
879 with exact REG addr_external yields {regcon4, %1, %2.disp}
880 with exact memregrel4 addr_external yields {memregrelcon4, %1.reg,
882 with exact memregcon4 addr_external yields {memregcon4, %1.reg,
884 with exact regcon4 addr_external yields {regcon4, %1.reg,
886 with exact memregrelcon4 addr_external yields {memregrelcon4, %1.reg,
887 %1.disp1, %1.disp2+%2.disp}
889 gen addd %1, %2 yields %2
891 gen addd %2, %1 yields %1
893 pat loe loc sbi ste $3==4 && $1==$4
894 kills absolute + rel + memregrelcon4
895 gen addd {const4, 0-$2}, {absolute4, $1}
897 pat lol loc sbi stl $3==4 && $1==$4
898 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
899 gen addd {const4, 0-$2}, {LOCAL, $1}
901 pat lil loc sbi sil $3==4 && $1==$4
903 gen addd {const4, 0-$2}, {memrel4, fp, $1, 0}
907 gen subd %1, %2 yields %2
909 gen addd {const4, 0-%1.num}, %2 yields %2
910 with exact addr_local addr_local
911 uses REG={const4, %2.ind}
912 gen subd {const4, %1.ind}, %a yields %a
916 gen muld %1, %2 yields %2
918 gen muld %2, %1 yields %1
922 gen quod %1,%2 yields %2
926 gen remd %1, %2 yields %2
931 gen negd %1, %a yields %a
933 pat lol ngi stl $1==$3 && $2==4
934 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
935 gen negd {LOCAL, $1}, {LOCAL, $1}
937 pat loe ngi ste $1==$3 && $2==4
938 kills absolute + rel + memregrelcon4
939 gen negd {absolute4, $1}, {absolute4, $1}
941 pat lil ngi sil $1==$3 && $2==4
943 gen negd {memrel4, fp, $1, 0}, {memrel4, fp, $1, 0}
947 gen ashd %1, %2 yields %2
949 pat lol loc sli stl $1==$4 && $3==4
950 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
951 gen ashd {const4, $2}, {LOCAL, $1}
953 pat loe loc sli ste $1==$4 && $3==4
954 kills absolute + rel + memregrelcon4
955 gen ashd {const4, $2}, {absolute4, $1}
959 gen ashd {const4,0-$1}, %1 yields %1
964 ashd %1, %2 yields %2
966 pat lol loc sri stl $1==$4 && $3==4
967 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
968 gen ashd {const4, 0-$2}, {LOCAL, $1}
970 pat loe loc sri ste $1==$4 && $3==4
971 kills absolute + rel + memregrelcon4
972 gen ashd {const4, 0-$2}, {absolute4, $1}
975 /*****************************************************************
976 * Group4 : unsigned arithmetic *
977 *****************************************************************/
979 pat loe loc adu ste $3==4 && $1==$4
980 kills absolute + rel + memregrelcon4
981 gen addd {const4, $2}, {absolute4, $1}
983 pat lol loc adu stl $3==4 && $1==$4
984 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
985 gen addd {const4, $2}, {LOCAL, $1}
987 pat lil loc adu sil $3==4 && $1==$4
989 gen addd {const4, $2}, {memrel4, fp, $1, 0}
991 pat lol adu stl $1==$3 && $2==4
993 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
994 gen addd %1, {LOCAL, $1}
996 pat lil adu sil $1==$3 && $2==4
999 gen addd %1, {memrel4, fp, $1, 0}
1001 pat loe adu ste $1==$3 && $2==4
1003 kills absolute + rel + memregrelcon4
1004 gen addd %1, {absolute4, $1}
1006 pat adu leaving adi $1
1008 pat loe loc sbu ste $3==4 && $1==$4
1009 kills absolute + rel + memregrelcon4
1010 gen addd {const4, 0-$2}, {absolute4, $1}
1012 pat lol loc sbu stl $3==4 && $1==$4
1013 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1014 gen addd {const4, 0-$2}, {LOCAL, $1}
1016 pat lil loc sbu sil $3==4 && $1==$4
1018 gen addd {const4, 0-$2}, {memrel4, fp, $1, 0}
1020 pat sbu leaving sbi $1
1024 uses reusing %1, REGPAIR
1026 meid %2, %a yields %a.1
1030 gen jsr {absolute4, ".dvu"} yields r0
1034 gen jsr {absolute4, ".rmu"} yields r0
1036 pat slu leaving sli $1
1040 gen lshd {const4, 0-$1}, %1 yields %1
1045 lshd %1, %2 yields %2
1048 /*****************************************************************
1049 * Group5 : floating point arithmetic *
1050 *****************************************************************/
1055 gen addf %1, %2 yields %2
1059 gen addl %1, %2 yields %2
1063 gen subf %1, %2 yields %2
1067 gen subl %1, %2 yields %2
1071 gen mulf %1, %2 yields %2
1075 gen mull %1, %2 yields %2
1079 gen divf %1, %2 yields %2
1083 gen divl %1, %2 yields %2
1087 gen negf %1, %1 yields %1
1091 gen negl %1, %1 yields %1
1099 subf %a, %2 yields %a %2
1107 subl %a, %2 yields %a %2
1114 lshd {const4, 1}, {TOS}
1115 lshd {const4, 0-24}, {TOS}
1117 subd {const4, 127}, %a
1118 ord {const4, 0x3F000000}, {TOS}
1119 lshd {const4,2},{TOS}
1120 lshd {const4,0-2},{TOS}
1121 cbitd {const4, 23},{TOS}
1122 movf {TOS}, %1 yields %1 %a
1129 adjspd {const4, 0-4}
1130 lshd {const4, 1}, {TOS}
1131 lshd {const4, 0-21}, {TOS}
1133 subd {const4, 1023}, %a
1134 ord {const4, 0x3FE00000}, {memregrel4, sp, 4}
1135 lshd {const4,2},{memregrel4, sp, 4}
1136 lshd {const4,0-2},{memregrel4, sp, 4}
1137 cbitd {const4, 52},{TOS}
1138 movl {TOS}, %1 yields %1 %a
1142 pat adf leaving loc 18 trp
1143 pat sbf leaving loc 18 trp
1144 pat mlf leaving loc 18 trp
1145 pat dvf leaving loc 18 trp
1146 pat ngf leaving loc 18 trp
1147 pat fif leaving loc 18 trp
1148 pat fef leaving loc 18 trp
1152 /*****************************************************************
1153 * Group6 : pointer arithmetic *
1154 *****************************************************************/
1156 pat lol dup adp stl $1==$4 && $2==4
1158 uses REG={LOCAL, $1}
1159 gen addr {memrel4, fp, $1, $3}, {LOCAL, $1} yields %a
1161 pat loe dup adp ste $1==$4 && $2==4
1163 uses REG={absolute4, $1}
1164 gen addd {const4, $3}, {absolute4, $1}
1166 pat lol adp stl $1==$3
1168 gen addr {memrel4, fp, $1, $2}, {LOCAL, $1}
1170 pat loe adp ste $1==$3
1172 gen addd {const4, $2}, {absolute4, $1}
1175 with exact MEMREG yields {memregcon4, %1, $1}
1176 with REG yields {regcon4, %1, $1}
1177 with exact memregcon4 yields {memregcon4, %1.reg,
1179 with exact regcon4 yields {regcon4, %1.reg,
1181 with exact memregrel4 yields {memregrelcon4, %1.reg,
1183 with exact memregrelcon4 yields {memregrelcon4, %1.reg,
1184 %1.disp1, %1.disp2 + $1}
1185 with exact addr_external yields {addr_external, $1+%1.disp}
1186 with exact addr_local yields {addr_local, %1.ind + $1}
1187 with exact LOCAL yields {memregrelcon4, fp,
1190 pat loe loc ads ste $3==4 && $1==$4
1191 kills absolute + rel + memregrelcon4
1192 gen addd {const4, $2}, {absolute4, $1}
1194 pat lol loc ads stl $3==4 && $1==$4
1195 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1196 gen addd {const4, $2}, {LOCAL, $1}
1198 pat lol ads stl $1==$3 && $2==4
1200 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1201 gen addd %1, {LOCAL, $1}
1203 pat loe ads ste $1==$3 && $2==4
1205 kills absolute + rel + memregrelcon4
1206 gen addd %1, {absolute4, $1}
1208 pat ads $1==4 leaving adi 4
1210 pat sbs $1==4 leaving sbi 4
1212 /*****************************************************************
1213 * Group7 : increment/decrement/zero *
1214 *****************************************************************/
1218 gen addd {const4,1}, %1 yields %1
1220 gen addd {const4, 1},{TOS}
1222 pat loc inc yields {const4, $1+1}
1224 pat lol inc stl $1==$3
1226 gen addd {const4, 1}, {LOCAL, $1}
1228 pat lol dec stl $1==$3
1230 gen addd {const4, 0-1}, {LOCAL, $1}
1232 pat lil inc sil $1==$3
1234 gen addd {const4, 1}, {memrel4, fp, $1, 0}
1236 pat lil dec sil $1==$3
1238 gen addd {const4, 0-1}, {memrel4, fp, $1, 0}
1241 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1242 gen addd {const4,1},{LOCAL, $1}
1245 kills absolute, rel, memregrelcon4
1246 gen addd {const4,1},{absolute4, $1}
1250 gen addd {const4,0-1}, %1 yields %1
1252 gen addd {const4,0-1}, {TOS}
1254 pat loc dec yields {const4, $1-1}
1257 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1258 gen addd {const4,0-1},{LOCAL, $1}
1261 kills absolute, rel, memregrelcon4
1262 gen addd {const4,0-1},{absolute4, $1}
1265 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1266 gen move {const4, 0}, {LOCAL, $1}
1269 kills absolute, rel, memregrelcon4
1270 gen move {const4, 0}, {absolute4, $1}
1275 gen movd {const4, 0}, {TOS}
1279 gen movd {const4, 0}, {TOS}
1280 movd {const4, 0}, {TOS}
1282 pat zrf leaving loc 18 trp
1285 pat zer $1==4 yields {const4, 0}
1287 pat zer $1==8 yields {const4, 0}
1290 pat zer $1==12 yields {const4, 0}
1296 uses REG={const4, $1/4}
1298 movqd {const4, 0}, {TOS}
1299 acbd {const4, 0-1}, %a, {label, "1b"}
1301 /*****************************************************************
1302 * Group8 : convert *
1303 *****************************************************************/
1305 pat loc loc cii $1==4 && $2==4
1307 pat loc loc cii $1==1 && $2==4
1309 uses reusing %1, REG
1310 gen movxbd %1, %a yields %a
1312 pat loc loc cii $1==2 && $2==4
1314 uses reusing %1, REG
1315 gen movxwd %1, %a yields %a
1319 gen jsr {absolute4, ".cii"}
1325 pat loc loc cfi $1==8 && $2==4
1328 gen roundld %1, %a yields %a
1330 pat loc loc cfi $1==4 && $2==4
1333 gen roundfd %1, %a yields %a
1337 gen jsr {absolute4, ".cfi"}
1339 pat loc loc cif $1==4 && $2==8
1342 gen movdl %1, %a yields %a
1344 pat loc loc cif $1==4 && $2==4
1347 gen movdf %1, %a yields %a
1351 gen jsr {absolute4, ".cif"}
1356 pat loc loc cff $1==4 && $2==4
1358 pat loc loc cff $1==8 && $2==8
1360 pat loc loc cff $1==4 && $2==8
1363 gen movfl %1, %a yields %a
1365 pat loc loc cff $1==8 && $2==4
1368 gen movlf %1, %a yields %a
1372 gen jsr {absolute4, ".cff"}
1376 pat cif leaving loc 18 trp
1377 pat cfi leaving loc 18 trp
1378 pat cuf leaving loc 18 trp
1379 pat cfu leaving loc 18 trp
1380 pat cff leaving loc 18 trp
1392 /*****************************************************************
1393 * Group9 : logical *
1394 *****************************************************************/
1396 pat loe loc and ste $3==4 && $1==$4
1397 kills absolute + rel + memregrelcon4
1398 gen andd {const4, $2}, {absolute4, $1}
1400 pat lol loc and stl $3==4 && $1==$4
1401 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1402 gen andd {const4, $2}, {LOCAL, $1}
1404 pat lil loc and sil $3==4 && $1==$4
1406 gen andd {const4, $2}, {memrel4, fp, $1, 0}
1408 pat lol and stl $1==$3 && $2==4
1410 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1411 gen andd %1, {LOCAL, $1}
1413 pat lil and sil $1==$3 && $2==4
1416 gen andd %1, {memrel4, fp, $1, 0}
1418 pat loe and ste $1==$3 && $2==4
1420 kills absolute + rel + memregrelcon4
1421 gen andd %1, {absolute4, $1}
1425 gen andd %1, %2 yields %2
1427 gen andd %2, %1 yields %1
1431 gen move {const4, $1}, r0
1432 addr {memregrel4, sp, $1}, r1
1434 andd {TOS}, {regrel4, r1, 0}
1435 addr {regrel4, r1, 4}, r1
1436 acbd {const4, 0-4}, r0, {label, "1b"}
1438 pat and !defined($1)
1441 gen addr {memregrel4, sp, 0}, %a
1444 andd {TOS}, {regrel4, %a, 0}
1445 addr {regrel4, %a, 4}, %a
1446 acbd {const4, 0-4}, %1, {label, "1b"}
1448 pat lol ior stl $1==$3 && $2==4
1450 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1451 gen ord %1, {LOCAL, $1}
1453 pat lol loc ior stl $3==4 && $1==$4
1454 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1455 gen ord {const4, $2}, {LOCAL, $1}
1457 pat lil loc ior sil $3==4 && $1==$4
1459 gen ord {const4, $2}, {memrel4, fp, $1, 0}
1461 pat lil ior sil $1==$3 && $2==4
1464 gen ord %1, {memrel4, fp, $1, 0}
1466 pat loe ior ste $1==$3 && $2==4
1468 kills absolute + rel + memregrelcon4
1469 gen ord %1, {absolute4, $1}
1471 pat lol loc xor stl $3==4 && $1==$4
1472 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1473 gen xord {const4, $2}, {LOCAL, $1}
1475 pat lil loc xor sil $3==4 && $1==$4
1477 gen xord {const4, $2}, {memrel4, fp, $1, 0}
1479 pat lol xor stl $1==$3 && $2==4
1481 kills rel, LOCAL %ind-4 < $1 && %ind+4 > $1
1482 gen xord %1, {LOCAL, $1}
1484 pat lil xor sil $1==$3 && $2==4
1487 gen xord %1, {memrel4, fp, $1, 0}
1489 pat loe xor ste $1==$3 && $2==4
1491 kills absolute + rel + memregrelcon4
1492 gen xord %1, {absolute4, $1}
1496 gen ord %1, %2 yields %2
1498 gen ord %2, %1 yields %1
1502 gen move {const4, $1}, r0
1503 addr {memregrel4, sp, $1}, r1
1505 ord {TOS}, {regrel4, r1, 0}
1506 addr {regrel4, r1, 4}, r1
1507 acbd {const4, 0-4}, r0, {label, "1b"}
1509 pat ior !defined($1)
1512 gen addr {memregrel4, sp, 0}, %a
1515 ord {TOS}, {regrel4, %a, 0}
1516 addr {regrel4, %a, 4}, %a
1517 acbd {const4, 0-4}, %1, {label, "1b"}
1521 gen xord %1, %2 yields %2
1523 gen xord %2, %1 yields %1
1527 gen move {const4, $1}, r0
1528 addr {memregrel4, sp, $1}, r1
1530 xord {TOS}, {regrel4, r1, 0}
1531 addr {regrel4, r1, 4}, r1
1532 acbd {const4, 0-4}, r0, {label, "1b"}
1534 pat xor !defined($1)
1537 gen addr {memregrel4, sp, 0}, %a
1540 xord {TOS}, {regrel4, %a, 0}
1541 addr {regrel4, %a, 4}, %a
1542 acbd {const4, 0-4}, %1, {label, "1b"}
1546 gen comd %1, %1 yields %1
1550 gen move {const4, $1}, r0
1551 addr {memregrel4, sp, 0}, r1
1553 comd {regrel4, r1, 0}, {regrel4, r1, 0}
1554 addr {regrel4, r1, 4}, r1
1555 acbd {const4, 0-4}, r0, {label, "1b"}
1557 pat com !defined($1)
1560 gen addr {memregrel4, sp, 0}, %a
1562 comd {regrel4, %a, 0}, {regrel4, %a, 0}
1563 addr {regrel4, %a, 4}, %a
1564 acbd {const4, 0-4}, %1, {label, "1b"}
1568 gen rotd %1, %2 yields %2
1572 gen rotd {const4, 0-$1}, %1 yields %1
1577 rotd %1, %2 yields %2
1579 /*****************************************************************
1581 *****************************************************************/
1585 gen cmpd {const4, 0}, %1
1592 gen cmpd {const4, 0}, %1
1612 adjspd {const4, 0-4}
1619 pat inn !defined($1)
1620 with src4 src4 STACK
1623 adjspd {const4, 0-4}
1632 uses REG={const4, 0}
1633 gen sbitd %1, %a yields %a
1637 uses REG={const4, $1/4}
1639 movqd {const4, 0}, {TOS}
1640 acbd {const4, 0-1}, %a, {label, "1b"}
1643 pat set !defined($1)
1644 with src4 src4 STACK
1645 uses reusing %1, REG=%1
1646 gen quod {const4, 4}, %a
1648 movqd {const4, 0}, {TOS}
1649 acbd {const4, 0-1}, %a, {label, "1b"}
1652 /*****************************************************************
1654 *****************************************************************/
1656 pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)==0
1659 pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)!=0
1663 pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)==0
1665 gen ashd {const4, 1}, %1 yields %1
1668 pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)!=0
1670 gen ashd {const4, 1}, %1 yields {regcon4, %1,(0-2)*rom($1,1)}
1673 pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)==0
1676 gen addr {regrelsid, 0, %2, %1}, %a
1680 gen addr {memregrelsid, %2.ind, fp, %1}, %a
1682 with REG addr_external
1684 gen addr {abssid, %2.disp, %1}, %a
1686 with leaving lae $1 aar $2
1688 pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)!=0
1691 gen subd {const4, rom($1,1)}, %1
1692 addr {regrelsid, 0, %2, %1}, %a
1696 gen subd {const4, rom($1,1)}, %1
1697 addr {memregrelsid, %2.ind, fp, %1}, %a
1699 with REG addr_external
1701 gen subd {const4, rom($1,1)}, %1
1702 addr {abssid, %2.disp, %1}, %a
1704 with leaving lae $1 aar $2
1706 pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)==0
1707 with REG REG yields {regrelsid, 0, %2, %1}
1708 with REG addr_local yields {memregrelsid, %2.ind, fp, %1}
1709 with REG addr_external yields {abssid, %2.disp, %1}
1710 with leaving lae $1 lar $2
1712 pat lae lar $2==4 && rom($1,3)==4 && rom($1,1)!=0
1714 gen subd {const4, rom($1,1)}, %1 yields {regrelsid, 0, %2, %1}
1716 gen subd {const4, rom($1,1)}, %1 yields {memregrelsid, %2.ind, fp, %1}
1717 with REG addr_external
1718 gen subd {const4, rom($1,1)}, %1 yields {abssid, %2.disp, %1}
1719 with leaving lae $1 lar $2
1721 pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)==0
1724 gen movd %3, {regrelsid, 0, %2, %1}
1725 with REG addr_local src4
1727 gen move %3, {memregrelsid, %2.ind, fp, %1}
1728 with REG addr_external src4
1730 gen move %3, {abssid, %2.disp, %1}
1731 with leaving lae $1 sar $2
1733 pat lae sar $2==4 && rom($1,3)==4 && rom($1,1)!=0
1736 gen subd {const4, rom($1,1)}, %1
1737 movd %3, {regrelsid, 0, %2, %1}
1738 with REG addr_local src4
1740 gen subd {const4, rom($1,1)}, %1
1741 move %3, {memregrelsid, %2.ind, fp, %1}
1742 with REG addr_external src4
1744 gen subd {const4, rom($1,1)}, %1
1745 move %3, {abssid, %2.disp, %1}
1746 with leaving lae $1 sar $2
1748 pat lae aar $2==4 && rom($1,1)==0
1750 gen indexd %1, {const4, rom($1,3)-1}, %2
1753 pat lae aar $2==4 && rom($1,1)!=0
1755 gen subd {const4, rom($1,1)}, %1
1756 indexd %1, {const4, rom($1,3)-1}, %2
1759 pat lae sar defined(rom($1,3))
1764 pat lae lar defined(rom($1,3))
1771 gen jsr {absolute4, ".aar"}
1775 gen jsr {absolute4, ".lar"}
1779 gen jsr {absolute4, ".sar"}
1781 pat aar !defined($1)
1784 gen jsr {absolute4, ".aar"}
1786 pat lar !defined($1)
1789 gen jsr {absolute4, ".lar"}
1791 pat sar !defined($1)
1794 gen jsr {absolute4, ".sar"}
1796 /*****************************************************************
1797 * Group12 : compare *
1798 *****************************************************************/
1804 movqd {const4, 0}, %3
1811 sbitd {const4, 0}, %3
1816 gen cmpqd {const4, 0}, %1
1818 movqd {const4, 0}, %2
1823 gen cmpqd {const4, 0}, %1
1825 sbitd {const4, 0}, %2
1828 pat cmi tlt and $1==4 && $3==4 call cmitxxand("bgt")
1829 pat cmi tle and $1==4 && $3==4 call cmitxxand("bge")
1830 pat cmi teq and $1==4 && $3==4 call cmitxxand("beq")
1831 pat cmi tne and $1==4 && $3==4 call cmitxxand("bne")
1832 pat cmi tge and $1==4 && $3==4 call cmitxxand("ble")
1833 pat cmi tgt and $1==4 && $3==4 call cmitxxand("blt")
1835 pat cmi tlt ior $1==4 && $3==4 call cmitxxior("ble")
1836 pat cmi tle ior $1==4 && $3==4 call cmitxxior("blt")
1837 pat cmi teq ior $1==4 && $3==4 call cmitxxior("bne")
1838 pat cmi tne ior $1==4 && $3==4 call cmitxxior("beq")
1839 pat cmi tge ior $1==4 && $3==4 call cmitxxior("bgt")
1840 pat cmi tgt ior $1==4 && $3==4 call cmitxxior("bge")
1842 pat tlt and $2==4 call txxand("bgt")
1843 pat tle and $2==4 call txxand("bge")
1844 pat teq and $2==4 call txxand("beq")
1845 pat tne and $2==4 call txxand("bne")
1846 pat tge and $2==4 call txxand("ble")
1847 pat tgt and $2==4 call txxand("blt")
1849 pat tlt ior $2==4 call txxior("ble")
1850 pat tle ior $2==4 call txxior("blt")
1851 pat teq ior $2==4 call txxior("bne")
1852 pat tne ior $2==4 call txxior("beq")
1853 pat tge ior $2==4 call txxior("bgt")
1854 pat tgt ior $2==4 call txxior("bge")
1858 uses REG={const4, 0}
1864 addd {const4, 0-1}, %a
1870 uses REG = {const4, 0}
1874 movqd {const4, 1}, %a
1877 movqd {const4, 0-1}, %a
1882 uses REG = {const4, 0}
1886 movqd {const4, 1}, %a
1889 movqd {const4, 0-1}, %a
1894 pat cmf leaving loc 18 trp
1899 uses REG={const4, 0}
1905 addd {const4, 0-1}, %a
1910 gen move {const4, $1}, {TOS}
1911 jsr {absolute4, ".cmu"} yields r1
1913 pat cms $1==4 leaving cmi $1
1917 gen move {const4, $1}, {TOS}
1918 jsr {absolute4, ".cms"} yields r1
1920 pat cms !defined($1)
1922 gen jsr {absolute4, ".cms"} yields r1
1925 with exact addr_local addr_local yields {const4, %2.ind}
1933 gen cmpqd {const4, 0}, %1
1936 pat tlt call txx("sgtd")
1937 pat tle call txx("sged")
1938 pat teq call txx("seqd")
1939 pat tne call txx("sned")
1940 pat tge call txx("sled")
1941 pat tgt call txx("sltd")
1943 /*****************************************************************
1944 * Group13 : branch *
1945 *****************************************************************/
1947 proc bxx example beq
1948 with src4 src4 STACK
1951 with exact src4 STACK
1955 pat blt call bxx("blt")
1956 pat ble call bxx("ble")
1957 pat beq call bxx("beq")
1958 pat bne call bxx("bne")
1959 pat bge call bxx("bge")
1960 pat bgt call bxx("bgt")
1966 pat loc beq $1>=0 && $1<=127
1969 gen cmpb {const4, $1}, %1
1971 with yields {const4, $1}
1974 pat loc bne $1>=0 && $1<=127
1977 gen cmpb {const4, $1}, %1
1979 with yields {const4, $1}
1982 proc cmpzxx example cmp zeq
1983 with src4 src4 STACK
1986 with exact src4 STACK
1989 with exact addr_local addr_local
1991 gen cmpd {const4, %2.ind}, {const4, %1.ind}
1994 pat cmp zlt call cmpzxx("blo")
1995 pat cmp zle call cmpzxx("bls")
1996 pat cmp zeq call cmpzxx("beq")
1997 pat cmp zne call cmpzxx("bne")
1998 pat cmp zge call cmpzxx("bhs")
1999 pat cmp zgt call cmpzxx("bhi")
2002 proc cmf4zxx example cmf zeq
2003 with fsrc4 fsrc4 STACK
2006 with exact fsrc4 STACK
2010 pat cmf zlt $1==4 call cmf4zxx("blo")
2011 pat cmf zle $1==4 call cmf4zxx("bls")
2012 pat cmf zeq $1==4 call cmf4zxx("beq")
2013 pat cmf zne $1==4 call cmf4zxx("bne")
2014 pat cmf zge $1==4 call cmf4zxx("bhs")
2015 pat cmf zgt $1==4 call cmf4zxx("bhi")
2017 proc cmf8zxx example cmf zeq
2018 with fsrc8 fsrc8 STACK
2021 with exact fsrc8 STACK
2025 pat cmf zlt $1==8 call cmf8zxx("blo")
2026 pat cmf zle $1==8 call cmf8zxx("bls")
2027 pat cmf zeq $1==8 call cmf8zxx("beq")
2028 pat cmf zne $1==8 call cmf8zxx("bne")
2029 pat cmf zge $1==8 call cmf8zxx("bhs")
2030 pat cmf zgt $1==8 call cmf8zxx("bhi")
2033 proc zxx example zeq
2035 gen cmpqd {const4,0}, %1
2038 gen cmpqd {const4,0}, {TOS}
2041 pat zlt call zxx("bgt")
2042 pat zle call zxx("bge")
2043 pat zeq call zxx("beq")
2044 pat zne call zxx("bne")
2045 pat zge call zxx("ble")
2046 pat zgt call zxx("blt")
2048 /*****************************************************************
2049 * Group14 : procedure call *
2050 *****************************************************************/
2054 gen jsr {absolute4, $1}
2063 gen exit {label, "[]"}
2079 pat lfr $1==4 yields r0
2081 pat lfr $1==8 yields r1 r0
2083 /*****************************************************************
2084 * Group15 : miscellaneous *
2085 *****************************************************************/
2089 gen adjspd {const4,0-$1}
2096 gen adjspd {const4,0-%1.num}
2101 with tosdst4 tossrc4
2105 pat blm $1>4 && $1<=16
2108 gen movmd {regrel4, %2, 0}, {regrel4, %1, 0}, {const4, $1/4}
2109 with exact addr_external addr_external
2111 gen movmd {absolute4, %2.disp}, {absolute4, %1.disp}, {const4, $1/4}
2112 with exact addr_external addr_local
2114 gen movmd {LOCAL, %2.ind}, {absolute4, %1.disp}, {const4, $1/4}
2115 with exact addr_local addr_external
2117 gen movmd {absolute4, %2.disp}, {LOCAL, %1.ind}, {const4, $1/4}
2118 with exact addr_local addr_local
2120 gen movmd {LOCAL, %2.ind}, {LOCAL, %1.ind}, {const4, $1/4}
2125 uses REG={const4,$1}
2127 movd {regrel4, %2, 0}, {regrel4, %1, 0}
2128 addr {regrel4, %1, 4}, %1
2129 addr {regrel4, %2, 4}, %2
2130 acbd {const4, 0-4}, %a, {label, "1b"}
2136 movd {regrel4, %3, 0}, {regrel4, %2, 0}
2137 addr {regrel4, %2, 4}, %2
2138 addr {regrel4, %3, 4}, %3
2139 acbd {const4, 0-4}, %1, {label, "1b"}
2145 move {addr_external, $1}, r1
2146 jsr {absolute4, ".csa"}
2152 jsr {absolute4, ".csa"}
2158 move {addr_external, $1}, r1
2159 jsr {absolute4, ".csb"}
2165 jsr {absolute4, ".csb"}
2167 pat dch leaving loi 4
2170 with src4 yields %1 %1
2173 with src4 src4 yields %2 %1 %2 %1
2174 with exact DLOCAL yields %1 %1
2175 with exact absolute8 yields %1 %1
2179 gen move {const4, $1}, r0
2180 jsr {absolute4, ".dup"}
2186 jsr {absolute4, ".dup"}
2189 with src4 src4 yields %1 %2
2192 with src4 src4 src4 src4 yields %2 %1 %4 %3
2196 gen move {const4, $1}, r0
2197 jsr {absolute4, ".exg"}
2200 gen move {addr_external, $1}, {absolute4, "hol0"+4}
2204 gen move {addr_external, $1}, r0
2207 pat lim yields {absolute2, ".ignmask"}
2210 gen move {const4, $1}, {absolute4, "hol0"}
2213 gen addd {const4, 1}, {absolute4, "hol0"}
2215 pat lor $1==0 yields fp
2218 with STACK yields sp
2220 pat lor $1==2 yields {absolute4, ".reghp"}
2222 pat lpb leaving adp 8
2226 gen jsr {absolute4, ".mon"}
2231 gen move {absolute4, "hol0"}, {TOS}
2232 jsr {absolute4, ".print"}
2233 jsr {absolute4, ".prnl"}
2238 gen jsr {absolute4, ".rck"}
2240 pat rtt leaving ret 0
2245 gen move {absolute4, ".trpreg"}, %a
2246 move %1, {absolute4, ".trpreg"} yields %a
2251 gen movw %1, {absolute2, ".ignmask"}
2265 jsr {absolute4, ".strhp"}
2266 adjspd {const4, 0-4}
2270 gen jsr {absolute4, ".trp"}