2 * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
3 * See the copyright notice in the ACK home directory, in the file "Copyright".
5 #define RCSID1 "$Id: mach1.c,v 0.4 1994/06/24 13:09:46 ceriel Exp $"
8 * NS 16032 C declarations
11 #define low4(val) ((int)(val&0xF))
13 /* signed value fits in ? bits */
14 #define fit32(val) ( (val)>= -2147483647L-1 && (val)<=2147483647L )
15 #define fit16(val) ( (val)>= -32767-1 && (val)<=32767 )
16 #define fit8(val) ( (val)>= -128 && (val)<=127 )
17 #define fit4(val) ( (val)>= -8 && (val)<=7 )
19 /* Fits in byte, word displacement */
20 #define fitd_b(val) ( (val)>= -64 && (val)<=63 )
21 #define fitd_w(val) ( (val)>= -8192 && (val)<=8191 )
23 /* Assemble and disassemble operator id's */
24 /* the i_value's in the instruction keyword table
25 contain five bit fields:
26 0-3 Opcode used in format indicated by the i_type field
27 4-7 Condition Code field. B_?? Also used for reg in FFS type.
28 8-11 The type of the first addressing mode gen1
29 12-15 The type of the second addressing mode gen2
30 The integer type T_????
31 The custom Slave type S_????
32 The Floating point type F_????
35 #define MK_op(op) (op)
36 #define MK_cc(cc) ( (cc)<<4 )
37 #define MK_g1(g1) ( (g1)<<8 )
38 #define MK_g2(g2) ( (g2)<<12 )
40 #define mk_op(o) (MK_op(o)|MK_g1(X_ILLGL)|MK_g2(X_ILLGL))
41 #define mk_op1(o,g1) (MK_op(o)|MK_g1(g1)|MK_g2(X_ILLGL))
42 #define mk_op2(o,g1,g2) (MK_op(o)|MK_g1(g1)|MK_g2(g2))
43 #define mk_c(c) MK_cc(c)
44 #define mk_op1c(o,g1,c) (MK_op(o)|MK_g1(g1)|MK_g2(X_ILLGL)|MK_cc(c))
45 #define mk_op2c(o,g1,g2,c) (MK_op(o)|MK_g1(g1)|MK_g2(g2)|MK_cc(c))
47 #define id_op(id) ((id) &0xF)
48 #define id_cc(id) (((id)>>4) &0xF)
49 #define id_g1(id) (((id)>>8) &3)
50 #define id_g2(id) (((id)>>12)&3)
51 #define id_t1(id) (((id)>>10)&3)
52 #define id_t2(id) (((id)>>14)&3)
54 /* Type definitions */
60 #define I_BYTE (T_INT<<2) | 0
61 #define I_WORD (T_INT<<2) | 1
62 #define I_DOUBLE (T_INT<<2) | 3
64 #define F_FLOAT (T_FL<<2) | 1
65 #define F_LONG (T_FL<<2) | 0
67 #define S_DOUBLE (T_SLAVE<<2) | 1
68 #define S_QUAD (T_SLAVE<<2) | 0
70 #define X_ILLGL (T_ILLGL<<2) | 2
89 /* String option bits */
95 /* output definitions */
96 #define form0(id) emit1(0xA + (id_cc(id)<<4) )
97 #define form1(id) emit1(0x2 + (id_op(id)<<4) )
98 #define form6(id) emit1(0x4E) ; form4(id)
99 #define form7(id) emit1(0xCE) ; form4(id)
102 /* Structure contains information for generation of an addressing mode */
103 /* The size of immediates is not stored in here and must be fetched from
107 int m_mode; /* The main mode bits */
108 int m_index ; /* m_mode= index mode, m_index has index byte */
109 int m_ndisp ; /* The number of displacements */
110 expr_t m_expr1 ; /* The first expression */
112 int m_rel1, m_rel2; /* relocation */
114 expr_t m_expr2 ; /* The second expression */
115 } mode1, mode2, *mode_ptr ;
117 #define not_imm(mode_ptr) if ( (mode_ptr)->m_mode==0x14 ) ill_imm() ;