2 * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
3 * See the copyright notice in the ACK home directory, in the file "Copyright".
6 rscid = "$Id: table,v 1.61 1995/07/21 12:05:07 ceriel Exp $"
9 * Back end tables for Intel 8086, 80286
13 * Adapted to ncg format by BMT Mosseveld, EM v Mulligen, M de Rooy, E tulp,
14 * and R Vendelmans (practical work course compiler construction).
16 * New format table much corrected: Ceriel Jacobs
17 * Added register variables: Ceriel Jacobs
18 * Adapted to use floating point library: Ceriel Jacobs
20 * wordsize = 2 bytes, pointersize = 2 bytes.
22 * Register bp is used as LB, sp is used for SP.
23 * Some global variables are used:
24 * - .reghp : the heap pointer
25 * - .ignmask : trap ignore mask
26 * - .trppc : address of user defined trap handler
42 /*****************************************************************/
44 /*****************************************************************/
63 /*****************************************************************/
65 /*****************************************************************/
68 ah,bl,bh,ch,dl,dh : REG1 .
69 cl : REG1 , SHIFT_CREG .
70 ax = al + ah : REG , GENREG , ACC .
71 bx = bl + bh : REG , GENREG , BXREG , ADDREG , AREG .
72 cx = cl + ch : REG , GENREG , CXREG , SHIFT_CREG.
73 dx = dl + dh : REG , GENREG , DXREG .
75 si : REG , IREG , AREG , ADDREG .
76 di : REG , IREG , AREG , ADDREG .
78 si : AREG , RADDREG , IREG regvar(reg_any) .
79 di : AREG , RADDREG , IREG regvar(reg_any) .
84 /*****************************************************************/
86 /*****************************************************************/
88 ANYCON = { INT val; } 2 cost(2,2) val .
89 CONSTR = { ADDR off; } 2 cost(2,2) off .
90 ADDR_EXTERN = { ADDR off; } 2 cost(2,2) off .
91 EXTERN1 = { ADDR off; } 2 cost(2,12) "(" off ")" .
92 EXTERN2 = { ADDR off; } 2 cost(2,12) "(" off ")" .
93 ADDR_LOCAL = { INT ind; } 2 cost(1,9) ind "(bp)" .
94 LOCAL = { INT ind; INT size; } 2 cost(1,15) ind "(bp)" .
95 LOCAL1 = { INT ind; INT size; } 2 cost(1,15) ind "(bp)" .
97 Rreg_off = { AREG reg; ADDR off;} 2 cost(1,9) off "(" reg ")" .
98 Rbpreg_off = { AREG reg; INT ind;} 2 cost(1,11) ind "(bp)" "(" reg ")" .
99 Xreg_off = { AREG reg; ADDR off;} 2 cost(1,9) off "(" reg ")" .
101 ind_reg2 = { AREG reg;} 2 cost(0,11) "(" reg ")" .
102 ind_regoff2 = { AREG reg; ADDR off;} 2 cost(1,15) off "(" reg ")" .
103 ind_bpregoff2 = { AREG reg; INT ind;} 2 cost(1,18) ind "(bp)" "(" reg ")" .
105 ind_reg1 = { AREG reg;} 2 cost(0,11) "(" reg ")" .
106 ind_regoff1 = { AREG reg; ADDR off;} 2 cost(1,15) off "(" reg ")" .
107 ind_bpregoff1 = { AREG reg; INT ind;} 2 cost(1,18) ind "(bp)" "(" reg ")" .
108 label = { ADDR off;} 2 off .
110 /*****************************************************************/
112 /*****************************************************************/
114 /* Mode refering to a word in memory */
115 memory2 = EXTERN2 + ind_reg2 + ind_regoff2 + ind_bpregoff2 +
119 memory1 = EXTERN1 + ind_reg1 + ind_regoff1 + ind_bpregoff1 +
122 const = ANYCON + ADDR_EXTERN + CONSTR .
123 register = REG + AREG
133 anyreg = register + BREG .
134 rm = anyreg + memory2 .
135 rmnoacc = IREG + BXREG + CXREG + memory2 .
136 rmorconst = const + rm .
137 regorconst = const + anyreg .
139 /* Needed because there is a shortage of ADDREG-registers.
140 This is the main penalty for having register variables.
142 regorconstnoaddr = const + IREG + ACC + CXREG + DXREG .
144 regorconstnoaddr = regorconst .
146 dest = register + memory2 .
148 rm1 = REG1 + memory1 .
149 rmorconst1 = const + rm1 .
150 regorconst12 = REG1 + GENREG + const .
151 dest1 = REG1 + memory1 .
152 rm12 = rm1 + memory2 .
154 /* Modes used to indicate tokens to be removed from the fakestack */
155 reg_indexed = ind_reg2 + ind_regoff2 + ind_reg1 + ind_regoff1 .
156 lb_indexed = ind_bpregoff2 + ind_bpregoff1 .
157 indexed = reg_indexed + lb_indexed .
158 externals = EXTERN2 + EXTERN1 .
159 locals = LOCAL + LOCAL1 .
160 all_locals = locals + lb_indexed .
161 indirects = externals + reg_indexed .
162 referals = indirects + locals .
165 reg_off = Xreg_off + Rreg_off .
166 bpreg_off = Rbpreg_off .
167 halfindir = reg_off + bpreg_off + ADDR_LOCAL .
168 some_off = halfindir + ADDR_EXTERN + addreg .
169 a_word = rmorconst + rm1 + halfindir .
170 no_reg_off = rmorconst + rm1 + ADDR_LOCAL .
172 /*****************************************************************/
174 /*****************************************************************/
177 adc rm:rw:cc, regorconst:ro.
178 adc anyreg:rw:cc, rmorconst:ro.
180 add LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
182 add anyreg:rw:cc, rmorconst:ro.
183 add rm:rw:cc, regorconst:ro.
185 axx "syntax error" LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
187 axx "syntax error" anyreg:rw:cc, rmorconst:ro.
188 axx "syntax error" rm:rw:cc, regorconst:ro.
190 and LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
192 and rm:rw:cc, regorconst:ro.
193 and anyreg:rw:cc, rmorconst:ro.
194 cbw kills ah cost(1,2).
195 cmp rm:ro, regorconst:ro kills :cc.
196 cmp anyreg:ro, rmorconst:ro kills :cc.
197 cmpb rm1:ro, REG1+const:ro kills :cc.
198 cmpb REG1:ro, rm1:ro kills :cc.
199 cwd kills dx cost(1,5).
200 dec rm:rw:cc cost(1,2).
201 div rm:ro kills:cc ax dx cost(1,150).
202 idiv rm:ro kills:cc ax dx cost(1,170).
203 inc rm:rw:cc cost(1,2).
208 jcxz label cost(1,5).
216 joehoe "call" label+rm cost(1,8).
217 jxx "syntax error" label.
218 lea anyreg:wo, halfindir:ro cost(1,2).
219 lea LOCAL:wo, halfindir:ro cost(1,2). /* only for register variables, UNSAFE!!! */
220 loop label kills cx cost(1,5).
222 mov LOCAL:wo, memory2:ro cost(1,2). /* only for register variables, UNSAFE!!! */
224 mov a_word:wo, regorconst:ro cost(1,2).
225 mov anyreg:wo, rmorconst:ro cost(1,2).
226 movb rm1:wo, regorconst12:ro cost(1,2).
227 movb REG1:wo, rm1:ro cost(1,2).
228 mul rmorconst:ro kills :cc ax dx cost(1,124).
232 ORB "orb" REG1:ro, REG1:ro:cc. /* use ORB for tests */
233 OR "or" anyreg:ro, anyreg:ro:cc. /* Use OR for tests */
235 or LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
237 or rm:rw:cc, regorconst:ro.
238 or anyreg:rw:cc, rmorconst:ro.
239 pop rmorconst:wo cost(1,8).
240 push rmorconst:ro cost(1,10).
241 rcl rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
242 rcr rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
244 rol rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
245 ror rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
246 sal rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
247 sar rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
248 sbb rm:rw:cc, regorconst:ro.
249 sbb anyreg:rw:cc, rmorconst:ro.
250 shl rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
251 shr rm:rw, ANYCON+SHIFT_CREG:ro kills:cc.
252 sxx rm:rw:cc, ANYCON+SHIFT_CREG:ro.
254 sub LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
256 sub rm:rw:cc, regorconst:ro.
257 sub anyreg:rw:cc, rmorconst+halfindir:ro.
258 check "test" rm:ro, regorconst:ro kills :cc.
259 check "test" anyreg:ro, rmorconst:ro kills :cc.
260 testb "testb" rm12:ro, regorconst:ro kills :cc.
261 testb "testb" REG1:ro, rmorconst:ro kills :cc.
262 testb "testb" ACC1:ro, const:ro kills :cc.
263 uxx "syntax error" rm:rw:cc cost(1,2).
264 xchg rm:rw, anyreg:rw.
265 xchg anyreg:rw, rm:rw.
266 xor rm:rw:cc, regorconst:ro.
267 xor anyreg:rw:cc, rmorconst:ro.
268 xorb rm1:rw:cc, regorconst12:ro.
269 xorb anyreg:rw:cc, rm1:ro.
270 killreg "! kill" anyreg:wo cost(0,0).
271 killcc "! kill cc" kills:cc cost(0,0).
274 word ".data2" const:ro.
278 /*****************************************************************/
280 /*****************************************************************/
283 from memory2 to LOCAL /* unsafe !!! */
286 from halfindir to LOCAL /* unsafe !!! */
296 from halfindir to register+AREG
305 from ANYCON %val==0 to register
308 from ANYCON %val==0 to REG1
314 from const+REG1 to rm1
318 /*****************************************************************/
320 /*****************************************************************/
326 gen cmp %1, {ANYCON,0}
332 gen cmpb %1, {ANYCON,0}
335 /*****************************************************************/
337 /*****************************************************************/
342 from memory2 to STACK
359 gen move {ANYCON,0},%a
369 xchg {ind_regoff2,bx,2},ax
372 from Xreg_off to STACK
373 gen add %1.reg,{CONSTR,%1.off}
376 from ADDR_LOCAL %ind==0 to STACK
380 from halfindir to STACK
385 from halfindir to STACK
390 xchg {ind_regoff2,bx,2},ax
394 /*****************************************************************/
396 /*****************************************************************/
398 /***************************
399 * From source to register *
400 ***************************/
403 uses reusing %1,REG=%1 yields %a
406 gen add %1.reg,{CONSTR,%1.off} yields %1.reg
409 uses reusing %1,ADDREG
410 gen move %1,%a yields %a
414 gen move %1,%a yields %a
416 /************************
417 * From source to token *
418 ************************/
420 from ANYCON yields {ADDR_EXTERN,%1.val}
427 uses reusing %1,REG1=%1 yields %a
430 uses reusing %1,GENREG
432 xorb %a.2,%a.2 yields %a
436 gen xorb %a.2,%a.2 yields %a
438 /************************
439 * From STACK coercions *
440 ************************/
447 /*****************************************************************/
449 /*****************************************************************/
451 /******************************************************************
452 * Group 1 : Load Instructions *
453 ******************************************************************/
455 pat loc yields {ANYCON,$1}
457 pat ldc loww($1)==0 && highw($1)==0
458 uses REG = {ANYCON, 0} yields %a %a
460 pat ldc yields {ANYCON,highw($1)}
463 pat lol yields {LOCAL,$1,2}
471 pat stl lol lof $1==$2
475 with AREG yields %1 %1
476 leaving stl $1 lof $3
478 pat stl lol loi $1==$2
482 with AREG yields %1 %1
483 leaving stl $1 loi $3
485 pat sdl ldl $1==$2 leaving dup 4 sdl $1
488 pat lol dup stl $2==2 && inreg($1) <= 0 && inreg($3) > 0
490 gen move {LOCAL,$1,2}, {LOCAL,$3,2}
494 pat loe yields {EXTERN2,$1}
496 pat ste loe $1==$2 leaving dup 2 ste $1
498 pat ste loe lof $1==$2
499 with AREG yields %1 %1
500 leaving ste $1 lof $3
502 pat ste loe loi $1==$2
503 with AREG yields %1 %1
504 leaving ste $1 loi $3
506 pat sde lde $1==$2 leaving dup 4 sde $1
509 pat loe dup stl $2==2 && inreg($3) > 0
511 gen move {EXTERN2,$1}, {LOCAL,$3,2}
516 pat lil inreg($1) > 0 yields {ind_reg2, regvar($1)}
519 uses ADDREG={LOCAL,$1,2} yields {ind_reg2,%a}
521 pat lil dup stl $2==2 leaving lil $1 stl $3 lol $3
523 pat sil lil $1==$2 leaving dup 2 sil $1
526 with exact reg_off yields {ind_regoff2,%1.reg,%1.off+$1}
527 with exact bpreg_off yields {ind_bpregoff2,%1.reg,%1.ind+$1}
528 with exact ADDR_EXTERN yields {EXTERN2,%1.off+$1}
529 with exact ADDR_LOCAL yields {LOCAL,%1.ind + $1,2}
530 with addreg yields {ind_regoff2,%1,$1}
532 pat lal yields {ADDR_LOCAL,$1}
534 pat lae yields {ADDR_EXTERN,$1}
536 pat lpb leaving adp SL
538 pat lxl $1==0 yields {ADDR_LOCAL,0}
540 pat lxl $1==1 yields {LOCAL,SL,2}
543 uses ADDREG={LOCAL,SL,2} yields {ind_regoff2,%a,SSL}
546 uses ADDREG={LOCAL,SL,2},
549 mov %a,{ind_regoff2,%a,4}
550 loop {label,1b} yields %a
552 pat lxa $1==0 yields {ADDR_LOCAL,SL}
555 uses ADDREG={LOCAL,SL,2} yields {Xreg_off,%a,SSL}
558 uses ADDREG={LOCAL,SL,2}
559 gen move {ind_regoff2,%a,SSL},%a yields {Xreg_off,%a,SSL}
562 uses ADDREG={LOCAL,SL,2},
565 mov %a,{ind_regoff2,%a,4}
566 loop {label,1b} yields {Xreg_off,%a,SSL}
568 pat dch leaving loi 2
571 with addreg yields {ind_reg2,%1}
572 with exact reg_off yields {ind_regoff2,%1.reg,%1.off}
573 with exact bpreg_off yields {ind_bpregoff2,%1.reg,%1.ind}
574 with exact ADDR_EXTERN yields {EXTERN2,%1.off}
575 with exact ADDR_LOCAL yields {LOCAL,%1.ind,2}
578 with addreg yields {ind_reg1,%1}
579 with exact reg_off yields {ind_regoff1,%1.reg,%1.off}
580 with exact bpreg_off yields {ind_bpregoff1,%1.reg,%1.ind}
581 with exact ADDR_EXTERN yields {EXTERN1,%1.off}
582 with exact ADDR_LOCAL yields {LOCAL1,%1.ind,1}
585 with addreg yields {ind_regoff2,%1,2}
587 with exact reg_off yields {ind_regoff2,%1.reg,%1.off+2}
588 {ind_regoff2,%1.reg,%1.off}
589 with exact bpreg_off yields {ind_bpregoff2,%1.reg,%1.ind+2}
590 {ind_bpregoff2,%1.reg,%1.ind}
591 with exact ADDR_LOCAL yields {LOCAL,%1.ind+2,2}
593 with exact ADDR_EXTERN yields {EXTERN2,%1.off + 2}
599 gen mov cx,{ANYCON,$1}
600 joehoe {label,".loi"}
605 gen joehoe {label,".los"}
607 pat ldl yields {LOCAL,$1+2,2}
610 pat lde yields {EXTERN2,$1 + 2}
614 with exact reg_off yields {ind_regoff2,%1.reg,
618 with addreg yields {ind_regoff2,%1,$1+2}
620 with exact bpreg_off yields {ind_bpregoff2,%1.reg,%1.ind+2+$1}
621 {ind_bpregoff2,%1.reg,%1.ind+$1}
622 with exact ADDR_EXTERN yields {EXTERN2,%1.off+2+$1}
624 with exact ADDR_LOCAL yields {LOCAL,%1.ind + $1 + 2,2}
625 {LOCAL,%1.ind + $1,2}
627 pat lpi yields {ADDR_EXTERN,$1}
629 /* this code sequence is generated by the C-compiler to tackle
630 char parameters, on the 8086 it reduces to nil */
632 pat lol lal sti $1==$2 && $3<=2
634 /*******************************************************************
635 * Group 2 : Store Instructions *
636 *******************************************************************/
639 pat stl inreg($1)==reg_any
642 gen move %1, {LOCAL,$1,2}
645 gen move %1, {LOCAL,$1,2}
648 gen pop {LOCAL, $1, 2}
652 kills indexed,locals %ind+%size > $1 && %ind < $1+2
653 gen move %1,{LOCAL,$1,2}
655 kills indexed,locals %ind+%size > $1 && %ind < $1+2
661 gen move %1,{EXTERN2,$1}
667 pat sil inreg($1)==reg_any
670 gen move %1,{ind_reg2,regvar($1)}
673 gen pop {ind_reg2,regvar($1)}
676 with regorconstnoaddr
678 uses ADDREG={LOCAL,$1,2}
679 gen move %1,{ind_reg2,%a}
683 uses ADDREG={LOCAL,$1,2}
684 gen pop {ind_reg2,%a}
688 with addreg regorconst
690 gen move %2,{ind_regoff2,%1,$1}
691 with exact addreg STACK
693 gen pop {ind_regoff2, %1,$1}
694 with reg_off regorconst
696 gen move %2,{ind_regoff2,%1.reg,%1.off+$1}
697 with exact reg_off STACK
699 gen pop {ind_regoff2,%1.reg,$1+%1.off}
700 with exact bpreg_off STACK
701 kills all_locals, indexed
702 gen pop {ind_bpregoff2,%1.reg,$1+%1.ind}
703 with ADDR_LOCAL regorconst
704 kills indexed,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+2
705 gen move %2,{LOCAL,%1.ind+$1,2}
706 with exact ADDR_LOCAL STACK
707 kills indexed,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+2
708 gen pop {LOCAL,%1.ind+$1,2}
709 with bpreg_off regorconst
710 kills all_locals,indexed
711 gen move %2,{ind_bpregoff2,%1.reg,%1.ind+$1}
712 with ADDR_EXTERN regorconst
714 gen move %2,{EXTERN2,%1.off+$1}
715 with exact ADDR_EXTERN STACK
717 gen pop {EXTERN2,%1.off+$1}
720 with addreg regorconst
722 gen move %2,{ind_reg2,%1}
723 with exact addreg STACK
725 gen pop {ind_reg2,%1}
726 with reg_off regorconst
728 gen move %2,{ind_regoff2,%1.reg,%1.off}
729 with exact reg_off STACK
731 gen pop {ind_regoff2,%1.reg,%1.off}
732 with bpreg_off regorconst
733 kills all_locals,indexed
734 gen move %2,{ind_bpregoff2,%1.reg,%1.ind}
735 with exact bpreg_off STACK
736 kills all_locals,indexed
737 gen pop {ind_bpregoff2,%1.reg,%1.ind}
738 with ADDR_EXTERN regorconst
740 gen move %2,{EXTERN2,%1.off}
741 with exact ADDR_EXTERN STACK
743 gen pop {EXTERN2,%1.off}
744 with ADDR_LOCAL regorconst
745 kills indexed,locals %ind+%size > %1.ind && %ind < %1.ind+2
746 gen move %2,{LOCAL,%1.ind,2}
747 with exact ADDR_LOCAL STACK
748 kills indexed,locals %ind+%size > %1.ind && %ind < %1.ind+2
749 gen pop {LOCAL,%1.ind,2}
752 with addreg regorconst12
754 gen move %2,{ind_reg1,%1}
755 with reg_off regorconst12
757 gen move %2,{ind_regoff1,%1.reg,%1.off}
758 with bpreg_off regorconst12
759 kills all_locals,indexed
760 gen move %2,{ind_bpregoff1,%1.reg,%1.ind}
761 with ADDR_EXTERN regorconst12
763 gen move %2,{EXTERN1,%1.off}
764 with ADDR_LOCAL regorconst12
765 kills indexed,locals %ind+%size > %1.ind && %ind <= %1.ind
766 gen move %2,{LOCAL1,%1.ind,1}
768 pat sti $1==4 leaving sdf 0
773 gen mov cx,{ANYCON,$1}
774 joehoe {label, ".sti"}
776 /* this sort of construction gives problems in the codegenerator
777 because of the potential very large lookahead
782 add %1,{ANYCON,2} yields %1 leaving sti $1-2
789 gen joehoe {label,".sts"}
792 with regorconst regorconst yields %2 %1
793 leaving stl $1 stl $1+2
794 with exact STACK leaving stl $1 stl $1+2
797 with regorconst regorconst yields %2 %1
798 leaving ste $1 ste $1+2
799 with exact STACK leaving ste $1 ste $1+2
802 with addreg regorconst regorconst
804 gen move %2,{ind_regoff2,%1,$1}
805 move %3,{ind_regoff2,%1,$1+2}
806 with exact addreg STACK
808 gen pop {ind_regoff2,%1,$1}
809 pop {ind_regoff2,%1,$1+2}
810 with exact halfindir STACK
812 uses reusing %1,ADDREG=%1
813 gen pop {ind_regoff2,%a,$1}
814 pop {ind_regoff2,%a,$1+2}
815 with exact memory2 STACK
817 uses reusing %1,ADDREG=%1
818 gen pop {ind_regoff2,%a,$1}
819 pop {ind_regoff2,%a,$1+2}
820 with reg_off regorconst regorconst
822 gen move %2,{ind_regoff2,%1.reg,%1.off+$1}
823 move %3,{ind_regoff2,%1.reg,%1.off+$1+2}
824 with exact reg_off STACK
826 gen pop {ind_regoff2,%1.reg,$1+%1.off}
827 pop {ind_regoff2,%1.reg,$1+2+%1.off}
828 with exact bpreg_off STACK
829 kills all_locals,indexed
830 gen pop {ind_bpregoff2, %1.reg,$1+%1.ind}
831 pop {ind_bpregoff2, %1.reg,$1+2+%1.ind}
832 with ADDR_LOCAL regorconst regorconst
833 kills indexed,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
834 gen move %2,{LOCAL,%1.ind+$1,2}
835 move %3,{LOCAL,%1.ind+$1+2,2}
836 with exact ADDR_LOCAL STACK
837 kills indexed,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
838 gen pop {LOCAL,%1.ind+$1,2}
839 pop {LOCAL,%1.ind+$1+2,2}
840 with ADDR_EXTERN regorconst regorconst
842 gen move %2,{EXTERN2,%1.off+$1}
843 move %3,{EXTERN2,%1.off+$1+2}
844 with exact ADDR_EXTERN STACK
846 gen pop {EXTERN2,%1.off+$1}
847 pop {EXTERN2,%1.off+$1+2}
848 with bpreg_off regorconst regorconst
849 kills all_locals,indexed
850 gen move %2,{ind_bpregoff2,%1.reg,%1.ind+$1}
851 move %3,{ind_bpregoff2,%1.reg,%1.ind+$1+2}
854 /****************************************************************
855 * Group 3 : Integer Arithmetic. *
857 * Implemented (sometimes with the use of subroutines) : *
858 * all 2 and 4 byte arithmetic. *
859 ****************************************************************/
863 with exact ANYCON IREG
864 yields {Rreg_off,%2,%1.val}
865 with exact IREG ANYCON
866 yields {Rreg_off,%1,%2.val}
869 gen add %1,%2 yields %1
871 gen add %2,%1 yields %2
872 with EXACT rmorconst const
873 uses reusing %1,REG=%1
874 gen add %a,%2 yields %a
877 with EXACT REG REG rmorconst rmorconst
879 adc %2,%4 yields %2 %1
880 with rmorconst rmorconst REG REG
882 adc %4,%2 yields %4 %3
887 gen joehoe {label,".adi"} yields ax
892 gen sub %2,%1 yields %2
893 with EXACT REG rmorconst
898 with rmorconst rmorconst REG REG
900 sbb %4,%2 yields %4 %3
905 gen joehoe {label,".sbi"} yields ax
909 uses reusing %2,DXREG
911 /* mul and imul have same low order result
915 with rmnoacc rmorconst
916 uses reusing %2,DXREG,ACC=%2
922 gen joehoe {label,".mli4"} yields dx ax
928 gen joehoe {label,".mli"}
932 with rmnoacc rmorconst
933 uses reusing %2,DXREG,ACC=%2
939 gen joehoe {label,".dvi4"} yields dx ax
945 gen joehoe {label,".dvi"}
949 with rmnoacc rmorconst
950 uses reusing %2, ACC=%2, DXREG
956 gen joehoe {label,".rmi4"} yields dx ax
962 gen joehoe {label,".rmi"}
973 sbb %2,{ANYCON,0} yields %2 %1
979 gen joehoe {label,".ngi"}
982 pat loc sli $1==1 && $2==2
984 gen sal %1,{ANYCON,1} yields %1
986 pat loc sli $1==1 && $2==4
988 gen sal %1,{ANYCON,1}
989 rcl %2,{ANYCON,1} yields %2 %1
991 pat loc sli $1==2 && $2==4
993 gen sal %1,{ANYCON,1}
996 rcl %2,{ANYCON,1} yields %2 %1
998 pat loc sli $1==3 && $2==4
1000 gen sal %1,{ANYCON,1}
1005 rcl %2,{ANYCON,1} yields %2 %1
1007 pat loc sli $1==16 && $2==4
1008 with rmorconst rmorconst yields %1 {ANYCON,0}
1012 gen sal %2,cl yields %2
1025 pat sli !defined($1)
1028 gen joehoe {label,".sli"}
1031 pat loc sri $1==1 && $2==2
1033 gen sar %1,{ANYCON,1} yields %1
1035 pat loc sri $1==1 && $2==4
1037 gen sar %2,{ANYCON,1}
1038 rcr %1,{ANYCON,1} yields %2 %1
1040 pat loc sri $1==2 && $2==4
1042 gen sar %2,{ANYCON,1}
1045 rcr %1,{ANYCON,1} yields %2 %1
1047 pat loc sri $1==3 && $2==4
1049 gen sar %2,{ANYCON,1}
1054 rcr %1,{ANYCON,1} yields %2 %1
1058 gen sar %2,cl yields %2
1071 pat sri !defined($1)
1074 gen joehoe {label,".sri"}
1077 /*******************************************************************
1078 * Group 4: Unsigned Arithmetic *
1079 *******************************************************************/
1081 pat adu leaving adi $1
1082 pat loc lol adu stl $1==1 && $3==2 && $2==$4 leaving inl $2
1083 pat loc loe adu ste $1==1 && $3==2 && $2==$4 leaving ine $2
1084 pat loc lol adu $1==1 && $3==2 leaving lol $2 inc
1085 pat loc loe adu $1==1 && $3==2 leaving loe $2 inc
1086 pat loc lil adu $1==1 && $3==2 leaving lil $2 inc
1087 pat loc lol adu stl $1==0-1 && $3==2 && $2==$4 leaving del $2
1088 pat loc loe adu ste $1==0-1 && $3==2 && $2==$4 leaving dee $2
1089 pat loc lol adu $1==0-1 && $3==2 leaving lol $2 dec
1090 pat loc loe adu $1==0-1 && $3==2 leaving loe $2 dec
1091 pat loc lil adu $1==0-1 && $3==2 leaving lil $2 dec
1092 pat sbu leaving sbi $1
1093 pat lol loc sbu stl $1==$4 && $2==1 && $3==2 leaving del $1
1094 pat loe loc sbu ste $1==$4 && $2==1 && $3==2 leaving dee $1
1095 pat lol loc sbu $2==1 && $3==2 leaving lol $1 dec
1096 pat loe loc sbu $2==1 && $3==2 leaving loe $1 dec
1097 pat lil loc sbu $2==1 && $3==2 leaving lil $1 dec
1098 pat lol loc sbu stl $1==$4 && $2==0-1 && $3==2 leaving inl $1
1099 pat loe loc sbu ste $1==$4 && $2==0-1 && $3==2 leaving ine $1
1100 pat lol loc sbu $2==0-1 && $3==2 leaving lol $1 inc
1101 pat loe loc sbu $2==0-1 && $3==2 leaving loe $1 inc
1102 pat lil loc sbu $2==0-1 && $3==2 leaving lil $1 inc
1103 pat mlu leaving mli $1
1105 pat loe loc loe adu ste $1==$3 && $1==$5 && $4==2
1106 uses REG = {EXTERN2, $1}
1107 yields %a leaving loc $2 loe $3 adu 2 ste $3
1109 pat lol loc lol adu stl $1==$3 && $1==$5 && $4==2
1110 uses REG = {LOCAL, $1, 2}
1111 yields %a leaving loc $2 lol $3 adu 2 stl $3
1113 pat loe loc loe adi ste $1==$3 && $1==$5 && $4==2
1114 uses REG = {EXTERN2, $1}
1115 yields %a leaving loc $2 loe $3 adi 2 ste $3
1117 pat lol loc lol adi stl $1==$3 && $1==$5 && $4==2
1118 uses REG = {LOCAL, $1, 2}
1119 yields %a leaving loc $2 lol $3 adi 2 stl $3
1122 with rmnoacc rmorconst
1123 uses reusing %2, ACC=%2, DXREG={ANYCON,0}
1124 gen div %1 yields ax
1128 gen joehoe {label,".dvu4"} yields dx ax
1131 pat dvu !defined($1)
1134 gen joehoe {label,".dvu"}
1138 with rmnoacc rmorconst
1139 uses reusing %2, ACC=%2, DXREG={ANYCON,0}
1140 gen div %1 yields dx
1144 gen joehoe {label,".rmu4"} yields dx ax
1147 pat rmu !defined($1)
1150 gen joehoe {label,".rmu"}
1153 pat slu leaving sli $1
1154 pat loc slu leaving loc $1 sli $2
1156 pat loc sru $1==1 && $2==2
1158 gen shr %1,{ANYCON, 1} yields %1
1160 pat loc sru $1==16 && $2==4
1161 with rmorconst rmorconst yields {ANYCON,0} %2
1165 gen shr %2,cl yields %2
1177 pat sru !defined($1)
1180 gen joehoe {label,".sru"}
1183 /*******************************************************************
1184 * Group 5: Floating Point Instructions *
1185 *******************************************************************/
1187 pat adf $1==4 leaving cal ".adf4" asp 4
1188 pat adf $1==8 leaving cal ".adf8" asp 8
1189 pat sbf $1==4 leaving cal ".sbf4" asp 4
1190 pat sbf $1==8 leaving cal ".sbf8" asp 8
1191 pat mlf $1==4 leaving cal ".mlf4" asp 4
1192 pat mlf $1==8 leaving cal ".mlf8" asp 8
1193 pat dvf $1==4 leaving cal ".dvf4" asp 4
1194 pat dvf $1==8 leaving cal ".dvf8" asp 8
1195 pat ngf $1==4 leaving cal ".ngf4"
1196 pat ngf $1==8 leaving cal ".ngf8"
1197 pat fif $1==4 leaving lor 1 cal ".fif4" asp 2
1198 pat fif $1==8 leaving lor 1 cal ".fif8" asp 2
1199 pat fef $1==4 leaving lor 1 adp 0-2 cal ".fef4"
1200 pat fef $1==8 leaving lor 1 adp 0-2 cal ".fef8"
1202 /******************************************************************
1203 * Group 6: Pointer Arithmetic *
1204 ******************************************************************/
1207 with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
1208 with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
1209 with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
1210 with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
1211 with exact Rbpreg_off yields {Rbpreg_off,%1.reg,%1.ind+$1}
1213 gen inc %1 yields %1
1216 yields {Xreg_off, %1, $1}
1217 with exact RADDREG yields {Rreg_off, %1, $1}
1220 with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
1221 with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
1222 with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
1223 with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
1224 with exact Rbpreg_off yields {Rbpreg_off,%1.reg,%1.ind+$1}
1226 gen dec %1 yields %1
1229 yields {Xreg_off, %1, $1}
1230 with exact RADDREG yields {Rreg_off, %1, $1}
1233 with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
1234 with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
1235 with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
1236 with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
1237 with exact Rbpreg_off yields {Rbpreg_off,%1.reg,%1.ind+$1}
1240 yields {Xreg_off,%1,$1}
1241 with exact RADDREG yields {Rreg_off, %1, $1}
1243 gen add %1,{ANYCON,$1} yields %1
1245 pat ads stl $1==2 leaving adi 2 stl $2
1246 pat ads ste $1==2 leaving adi 2 ste $2
1247 pat ads sil $1==2 leaving adi 2 sil $2
1248 pat ads lol stf $1==2 leaving adi 2 lol $2 stf $3
1249 pat ads loe stf $1==2 leaving adi 2 loe $2 stf $3
1252 with exact ANYCON Rreg_off
1253 yields {Rreg_off,%2.reg,%2.off+%1.val}
1254 with exact ANYCON Xreg_off
1255 yields {Xreg_off,%2.reg,%2.off+%1.val}
1256 with exact ADDR_EXTERN Rreg_off
1257 yields {Rreg_off,%2.reg,%2.off+%1.off}
1258 with exact ADDR_EXTERN Xreg_off
1259 yields {Xreg_off,%2.reg,%2.off+%1.off}
1260 with rmorconst Xreg_off
1261 gen add %2.reg,%1 yields %2
1262 with exact ANYCON Rbpreg_off
1263 yields {Rbpreg_off,%2.reg,%2.ind+%1.val}
1264 with Xreg_off rmorconst
1265 gen add %1.reg,%2 yields %1
1266 with exact Xreg_off ANYCON
1267 yields {Xreg_off,%1.reg,%1.off+%2.val}
1268 with exact Rreg_off ANYCON
1269 yields {Rreg_off,%1.reg,%1.off+%2.val}
1270 with exact Xreg_off ADDR_EXTERN
1271 yields {Xreg_off,%1.reg,%1.off+%2.off}
1272 with exact Rreg_off ADDR_EXTERN
1273 yields {Rreg_off,%1.reg,%1.off+%2.off}
1274 with exact Xreg_off reg_off
1275 gen add %1.reg,%2.reg
1276 yields {Xreg_off,%1.reg,%1.off+%2.off}
1277 with exact IREG ADDR_LOCAL
1278 yields {Rbpreg_off, %1, %2.ind}
1279 with exact IREG ADDR_EXTERN
1280 yields {Rreg_off, %1, %2.off}
1281 with exact ADDR_EXTERN IREG
1282 yields {Rreg_off,%2,%1.off}
1283 with exact ADDR_LOCAL IREG
1284 yields {Rbpreg_off,%2,%1.ind}
1286 with exact rmorconst ADDR_EXTERN
1287 uses reusing %1,ADDREG=%1
1288 yields {Xreg_off,%a,%2.off}
1289 with exact ADDR_EXTERN rmorconst
1290 uses reusing %2,ADDREG=%2
1291 yields {Xreg_off,%a,%1.off}
1292 with rmorconst ADDREG
1293 gen add %2,%1 yields %2
1294 with ADDREG rmorconst
1295 gen add %1,%2 yields %1
1298 with exact ANYCON Xreg_off
1299 yields {Xreg_off,%2.reg,%2.off+"-"+%1.val}
1300 with exact ANYCON Rreg_off
1301 yields {Rreg_off,%2.reg,%2.off+"-"+%1.val}
1302 with exact ANYCON ADDR_LOCAL
1303 yields {ADDR_LOCAL,%2.ind-%1.val}
1305 gen sub %2.reg,%1 yields {Xreg_off,%2.reg,%2.off}
1308 with exact reg_off ANYCON
1309 yields {reg_off,%1.reg,%1.off-%2.val}
1310 with ANYCON ADDR_EXTERN
1311 yields {ADDR_EXTERN,%2.off+%1.val}
1312 with exact ANYCON ADDR_LOCAL
1313 yields {ADDR_LOCAL,%1.val+%2.ind}
1317 gen sub %2,%1 yields %2
1319 gen sub %2,%1 yields %2
1321 /*******************************************************************
1322 * Group 7 : Increment/Decrement Zero *
1323 *******************************************************************/
1327 gen inc %1 yields %1
1330 pat inl inreg($1)==reg_any
1332 gen inc {LOCAL,$1,2}
1336 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1337 gen inc {LOCAL, $1, 2}
1341 gen inc {EXTERN2, $1}
1345 gen dec %1 yields %1
1348 pat del inreg($1)==reg_any
1350 gen dec {LOCAL,$1,2}
1354 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1355 gen dec {LOCAL, $1, 2}
1359 gen dec {EXTERN2, $1}
1361 pat zrl yields {ANYCON, 0} leaving stl $1
1363 pat zre yields {ANYCON, 0} leaving ste $1
1365 pat zrf leaving zer $1
1367 pat zer $1==2 yields {ANYCON, 0}
1368 pat zer $1==4 yields {ANYCON, 0} {ANYCON, 0}
1369 pat zer $1==6 yields {ANYCON, 0} {ANYCON, 0}
1371 pat zer $1==8 yields {ANYCON, 0} {ANYCON, 0}
1372 {ANYCON, 0} {ANYCON, 0}
1376 gen move {ANYCON, $1/2}, cx
1377 move {ANYCON, 0}, bx
1382 pat zer !defined($1)
1384 gen move {ANYCON, 0}, bx
1391 proc lolrxxxstl example lol adi stl
1394 gen axx* {LOCAL, $1, 2}, %1
1396 proc lilrxxxsil example lil adi sil
1399 gen axx* {ind_reg2, regvar($1)}, %1
1401 pat lol adi stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("add")
1402 pat lol adu stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("add")
1403 pat lol ads stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("add")
1404 pat lol and stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("and")
1405 pat lol ior stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("or")
1406 pat lol xor stl $1==$3 && $2==2 && inreg($1)==reg_any call lolrxxxstl("xor")
1408 pat lil adi sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("add")
1409 pat lil adu sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("add")
1410 pat lil ads sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("add")
1411 pat lil and sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("and")
1412 pat lil ior sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("or")
1413 pat lil xor sil $1==$3 && $2==2 && inreg($1)==reg_any call lilrxxxsil("xor")
1416 proc lolxxxstl example lol adi stl
1418 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1419 gen axx* {LOCAL, $1, 2}, %1
1421 pat lol adi stl $1==$3 && $2==2 call lolxxxstl("add")
1422 pat lol adu stl $1==$3 && $2==2 call lolxxxstl("add")
1423 pat lol ads stl $1==$3 && $2==2 call lolxxxstl("add")
1424 pat lol and stl $1==$3 && $2==2 call lolxxxstl("and")
1425 pat lol ior stl $1==$3 && $2==2 call lolxxxstl("or")
1426 pat lol xor stl $1==$3 && $2==2 call lolxxxstl("xor")
1428 proc lilxxxsil example lil adi sil
1431 uses ADDREG={LOCAL, $1, 2}
1432 gen axx* {ind_reg2, %a}, %1
1435 pat lil adi sil $1==$3 && $2==2 call lilxxxsil("add")
1436 pat lil adu sil $1==$3 && $2==2 call lilxxxsil("add")
1437 pat lil ads sil $1==$3 && $2==2 call lilxxxsil("add")
1438 pat lil and sil $1==$3 && $2==2 call lilxxxsil("and")
1439 pat lil ior sil $1==$3 && $2==2 call lilxxxsil("or")
1440 pat lil xor sil $1==$3 && $2==2 call lilxxxsil("xor")
1443 proc lilruxxsil example lil ngi sil
1445 gen uxx* {ind_reg2, regvar($1)}
1447 pat lil ngi sil $1==$3 && $2==2 && inreg($1)==reg_any call lilruxxsil("neg")
1448 pat lil com sil $1==$3 && $2==2 && inreg($1)==reg_any call lilruxxsil("not")
1449 pat lil dec sil $1==$3 && inreg($1)==reg_any call lilruxxsil("dec")
1450 pat lil inc sil $1==$3 && inreg($1)==reg_any call lilruxxsil("inc")
1453 proc liluxxsil example lil ngi sil
1455 uses ADDREG={LOCAL, $1, 2}
1456 gen uxx* {ind_reg2, %a}
1459 pat lil ngi sil $1==$3 && $2==2 call liluxxsil("neg")
1460 pat lil com sil $1==$3 && $2==2 call liluxxsil("not")
1461 pat lil dec sil $1==$3 call liluxxsil("dec")
1462 pat lil inc sil $1==$3 call liluxxsil("inc")
1464 proc loexxxste example loe adi ste
1467 gen axx* {EXTERN2, $1}, %1
1469 pat loe adi ste $1==$3 && $2==2 call loexxxste("add")
1470 pat loe adu ste $1==$3 && $2==2 call loexxxste("add")
1471 pat loe ads ste $1==$3 && $2==2 call loexxxste("add")
1472 pat loe and ste $1==$3 && $2==2 call loexxxste("and")
1473 pat loe ior ste $1==$3 && $2==2 call loexxxste("or")
1474 pat loe xor ste $1==$3 && $2==2 call loexxxste("xor")
1476 proc ldlxxxsdl example ldl adi sdl
1477 with regorconst regorconst
1478 kills indexed,locals %ind+%size > $1 && %ind < $1+4
1479 gen axx[1] {LOCAL,$1,2},%1
1480 axx[2] {LOCAL,$1+2,2},%2
1482 pat ldl adi sdl $1==$3 && $2==4 call ldlxxxsdl("add", "adc")
1483 pat ldl adu sdl $1==$3 && $2==4 call ldlxxxsdl("add", "adc")
1484 pat ldl and sdl $1==$3 && $2==4 call ldlxxxsdl("and", "and")
1485 pat ldl ior sdl $1==$3 && $2==4 call ldlxxxsdl("or", "or")
1486 pat ldl xor sdl $1==$3 && $2==4 call ldlxxxsdl("xor", "xor")
1488 proc ldlcxxsdl example ldl ldc sbi sdl
1489 kills indexed,locals %ind+%size > $1 && %ind < $1+4
1490 gen axx[1] {LOCAL,$1,2},{ANYCON,loww($2)}
1491 axx[2] {LOCAL,$1+2,2},{ANYCON,highw($2)}
1493 pat ldl ldc sbi sdl $1==$4 && $3==4 call ldlcxxsdl("sub", "sbb")
1494 pat ldl ldc sbu sdl $1==$4 && $3==4 call ldlcxxsdl("sub", "sbb")
1496 proc ldexxxsde example lde adi sde
1497 with regorconst regorconst
1499 gen axx[1] {EXTERN2,$1},%1
1500 axx[2] {EXTERN2,$1+2},%2
1502 pat lde adi sde $1==$3 && $2==4 call ldexxxsde("add", "adc")
1503 pat lde adu sde $1==$3 && $2==4 call ldexxxsde("add", "adc")
1504 pat lde and sde $1==$3 && $2==4 call ldexxxsde("and", "and")
1505 pat lde ior sde $1==$3 && $2==4 call ldexxxsde("or", "or")
1506 pat lde xor sde $1==$3 && $2==4 call ldexxxsde("xor", "xor")
1509 proc lofrxxxsof example lol lof adi lol stf
1512 gen axx* {ind_regoff2, regvar($1), $2}, %1
1514 pat lol lof adi lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1515 call lofrxxxsof("add")
1516 pat lol lof adu lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1517 call lofrxxxsof("add")
1518 pat lol lof ads lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1519 call lofrxxxsof("add")
1520 pat lol lof and lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1521 call lofrxxxsof("and")
1522 pat lol lof ior lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1523 call lofrxxxsof("or")
1524 pat lol lof xor lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1525 call lofrxxxsof("xor")
1527 proc ldfrxxxsdf example lol ldf adi lol sdf
1528 with regorconst regorconst
1530 gen axx[1] {ind_regoff2, regvar($1), $2}, %1
1531 axx[2] {ind_regoff2, regvar($1), $2+2}, %2
1533 pat lol ldf adi lol sdf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
1534 call ldfrxxxsdf("add", "adc")
1535 pat lol ldf adu lol sdf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
1536 call ldfrxxxsdf("add", "adc")
1537 pat lol ldf and lol sdf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
1538 call ldfrxxxsdf("and", "and")
1539 pat lol ldf ior lol sdf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
1540 call ldfrxxxsdf("or", "or")
1541 pat lol ldf xor lol sdf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
1542 call ldfrxxxsdf("xor", "xor")
1544 proc ldirxxxsdi example lol loi adi lol sti
1545 with regorconst regorconst
1547 gen axx[1] {ind_reg2, regvar($1)}, %1
1548 axx[2] {ind_regoff2, regvar($1), 2}, %2
1550 pat lol loi adi lol sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)==reg_any
1551 call ldirxxxsdi("add", "adc")
1552 pat lol loi adu lol sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)==reg_any
1553 call ldirxxxsdi("add", "adc")
1554 pat lol loi and lol sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)==reg_any
1555 call ldirxxxsdi("and", "and")
1556 pat lol loi ior lol sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)==reg_any
1557 call ldirxxxsdi("or", "or")
1558 pat lol loi xor lol sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)==reg_any
1559 call ldirxxxsdi("xor", "xor")
1561 proc lofruxxsof example lol lof inc lol stf
1563 gen uxx* {ind_regoff2, regvar($1), $2}
1565 pat lol lof inc lol stf $1==$4 && $2==$5 && inreg($1)==reg_any
1566 call lofruxxsof("inc")
1567 pat lol lof dec lol stf $1==$4 && $2==$5 && inreg($1)==reg_any
1568 call lofruxxsof("dec")
1569 pat lol lof ngi lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1570 call lofruxxsof("neg")
1571 pat lol lof com lol stf $1==$4 && $2==$5 && $3==2 && inreg($1)==reg_any
1572 call lofruxxsof("not")
1575 proc lofuxxsof example lol lof inc lol stf
1577 uses ADDREG={LOCAL,$1,2}
1578 gen uxx* {ind_regoff2, %a, $2}
1581 pat lol lof ngi lol stf $1==$4 && $2==$5 && $3==2 call lofuxxsof("neg")
1582 pat lol lof com lol stf $1==$4 && $2==$5 && $3==2 call lofuxxsof("not")
1583 pat lol lof dec lol stf $1==$4 && $2==$5 call lofuxxsof("dec")
1584 pat lol lof inc lol stf $1==$4 && $2==$5 call lofuxxsof("inc")
1586 proc lofxxxsof example lol lof adi lol stf
1587 with regorconstnoaddr
1589 uses ADDREG={LOCAL,$1,2}
1590 gen axx* {ind_regoff2, %a, $2}, %1
1593 pat lol lof adi lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("add")
1594 pat lol lof adu lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("add")
1595 pat lol lof ads lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("add")
1596 pat lol lof and lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("and")
1597 pat lol lof ior lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("or")
1598 pat lol lof xor lol stf $1==$4 && $2==$5 && $3==2 call lofxxxsof("xor")
1600 proc ldfxxxsdf example lol ldf adi lol sdf
1601 with regorconstnoaddr regorconstnoaddr
1603 uses ADDREG={LOCAL,$1,2}
1604 gen axx[1] {ind_regoff2, %a, $2}, %1
1605 axx[2] {ind_regoff2, %a, $2+2}, %2
1608 pat lol ldf adi lol sdf $1==$4 && $2==$5 && $3==4 call ldfxxxsdf("add", "adc")
1609 pat lol ldf adu lol sdf $1==$4 && $2==$5 && $3==4 call ldfxxxsdf("add", "adc")
1610 pat lol ldf and lol sdf $1==$4 && $2==$5 && $3==4 call ldfxxxsdf("and", "and")
1611 pat lol ldf ior lol sdf $1==$4 && $2==$5 && $3==4 call ldfxxxsdf("or", "or")
1612 pat lol ldf xor lol sdf $1==$4 && $2==$5 && $3==4 call ldfxxxsdf("xor", "xor")
1614 proc ldixxxsdi example lol loi adi lol sti
1615 with regorconstnoaddr regorconstnoaddr
1617 uses ADDREG={LOCAL,$1,2}
1618 gen axx[1] {ind_reg2, %a}, %1
1619 axx[2] {ind_regoff2, %a, 2}, %2
1622 pat lol loi adi lol sti $1==$4 && $2==4 && $5==4 && $3==4
1623 call ldixxxsdi("add", "adc")
1624 pat lol loi adu lol sti $1==$4 && $2==4 && $5==4 && $3==4
1625 call ldixxxsdi("add", "adc")
1626 pat lol loi and lol sti $1==$4 && $2==4 && $5==4 && $3==4
1627 call ldixxxsdi("and", "and")
1628 pat lol loi ior lol sti $1==$4 && $2==4 && $5==4 && $3==4
1629 call ldixxxsdi("or", "or")
1630 pat lol loi xor lol sti $1==$4 && $2==4 && $5==4 && $3==4
1631 call ldixxxsdi("xor", "xor")
1633 proc lefuxxsef example loe lof inc loe stf
1635 uses ADDREG={EXTERN2,$1}
1636 gen uxx* {ind_regoff2, %a, $2}
1639 pat loe lof ngi loe stf $1==$4 && $2==$5 && $3==2 call lefuxxsef("neg")
1640 pat loe lof com loe stf $1==$4 && $2==$5 && $3==2 call lefuxxsef("not")
1641 pat loe lof dec loe stf $1==$4 && $2==$5 call lefuxxsef("dec")
1642 pat loe lof inc loe stf $1==$4 && $2==$5 call lefuxxsef("inc")
1644 proc lefxxxsef example loe lof adi loe stf
1645 with regorconstnoaddr
1647 uses ADDREG={EXTERN2,$1}
1648 gen axx* {ind_regoff2, %a, $2}, %1
1651 pat loe lof adi loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("add")
1652 pat loe lof adu loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("add")
1653 pat loe lof ads loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("add")
1654 pat loe lof and loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("and")
1655 pat loe lof ior loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("or")
1656 pat loe lof xor loe stf $1==$4 && $2==$5 && $3==2 call lefxxxsef("xor")
1658 proc leiuxxsei example loe loi inc loe sti
1660 uses ADDREG={EXTERN2,$1}
1661 gen uxx* {ind_reg2, %a}
1664 pat loe loi ngi loe sti $1==$4 && $2==2 && $5==2 && $3==2
1665 call leiuxxsei("neg")
1666 pat loe loi com loe sti $1==$4 && $2==2 && $5==2 && $3==2
1667 call leiuxxsei("not")
1668 pat loe loi dec loe sti $1==$4 && $2==2 && $5==2 call leiuxxsei("dec")
1669 pat loe loi inc loe sti $1==$4 && $2==2 && $5==2 call leiuxxsei("inc")
1671 proc leixxxsei example loe loi adi loe sti
1672 with regorconstnoaddr
1674 uses ADDREG={EXTERN2,$1}
1675 gen axx* {ind_reg2, %a}, %1
1678 pat loe loi adi loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("add")
1679 pat loe loi adu loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("add")
1680 pat loe loi ads loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("add")
1681 pat loe loi and loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("and")
1682 pat loe loi ior loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("or")
1683 pat loe loi xor loe sti $1==$4 && $2==$5 && $2==2 && $3==2 call leixxxsei("xor")
1686 proc lolcrxxstl example lol loc sbi stl
1688 gen axx* {LOCAL,$1,2},{ANYCON,$2}
1690 pat lol loc sbi stl $1==$4 && $3==2 && inreg($1)==reg_any
1691 call lolcrxxstl("sub")
1692 pat lol loc sbu stl $1==$4 && $3==2 && inreg($1)==reg_any
1693 call lolcrxxstl("sub")
1694 pat lol loc sli stl $1==$4 && $3==2 && $2==1 && inreg($1)==reg_any
1695 call lolcrxxstl("sal")
1696 pat lol loc slu stl $1==$4 && $3==2 && $2==1 && inreg($1)==reg_any
1697 call lolcrxxstl("sal")
1698 pat lol loc sri stl $1==$4 && $3==2 && $2==1 && inreg($1)==reg_any
1699 call lolcrxxstl("sar")
1700 pat lol loc sru stl $1==$4 && $3==2 && $2==1 && inreg($1)==reg_any
1701 call lolcrxxstl("shr")
1703 proc lolr2shstl example lol loc sli stl
1705 gen axx* {LOCAL,$1,2},{ANYCON,1}
1706 axx* {LOCAL,$1,2},{ANYCON,1}
1708 pat lol loc sli stl $1==$4 && $3==2 && $2==2 && inreg($1)==reg_any
1709 call lolr2shstl("sal")
1710 pat lol loc slu stl $1==$4 && $3==2 && $2==2 && inreg($1)==reg_any
1711 call lolr2shstl("sal")
1712 pat lol loc sri stl $1==$4 && $3==2 && $2==2 && inreg($1)==reg_any
1713 call lolr2shstl("sar")
1714 pat lol loc sru stl $1==$4 && $3==2 && $2==2 && inreg($1)==reg_any
1715 call lolr2shstl("shr")
1717 proc lolrcshstl example lol loc sli stl
1719 uses CXREG = {ANYCON,$2}
1720 gen sxx* {LOCAL,$1,2},cl
1722 pat lol loc sli stl $1==$4 && $3==2 && inreg($1)==reg_any
1723 call lolrcshstl("sal")
1724 pat lol loc slu stl $1==$4 && $3==2 && inreg($1)==reg_any
1725 call lolrcshstl("sal")
1726 pat lol loc sri stl $1==$4 && $3==2 && inreg($1)==reg_any
1727 call lolrcshstl("sar")
1728 pat lol loc sru stl $1==$4 && $3==2 && inreg($1)==reg_any
1729 call lolrcshstl("shr")
1733 proc lolcxxstl example lol loc sbi stl
1734 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1735 gen axx* {LOCAL,$1,2},{ANYCON,$2}
1737 pat lol loc sbi stl $1==$4 && $3==2 call lolcxxstl("sub")
1738 pat lol loc sbu stl $1==$4 && $3==2 call lolcxxstl("sub")
1739 pat lol loc sli stl $1==$4 && $3==2 && $2==1 call lolcxxstl("sal")
1740 pat lol loc slu stl $1==$4 && $3==2 && $2==1 call lolcxxstl("sal")
1741 pat lol loc sri stl $1==$4 && $3==2 && $2==1 call lolcxxstl("sar")
1742 pat lol loc sru stl $1==$4 && $3==2 && $2==1 call lolcxxstl("shr")
1744 proc lolcshstl example lol loc sli stl
1745 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1746 uses CXREG = {ANYCON,$2}
1747 gen sxx* {LOCAL,$1,2},cl
1749 pat lol loc sli stl $1==$4 && $3==2 call lolcshstl("sal")
1750 pat lol loc slu stl $1==$4 && $3==2 call lolcshstl("sal")
1751 pat lol loc sri stl $1==$4 && $3==2 call lolcshstl("sar")
1752 pat lol loc sru stl $1==$4 && $3==2 call lolcshstl("shr")
1755 proc loecxxste example loe loc sbi ste
1757 gen axx* {EXTERN2,$1},{ANYCON,$2}
1759 pat loe loc sbi ste $1==$4 && $3==2 call loecxxste("sub")
1760 pat loe loc sbu ste $1==$4 && $3==2 call loecxxste("sub")
1761 pat loe loc adu ste $1==$4 && $3==2 call loecxxste("add")
1762 pat loe loc adi ste $1==$4 && $3==2 call loecxxste("add")
1763 pat loe loc sli ste $1==$4 && $3==2 && $2==1 call loecxxste("sal")
1764 pat loe loc slu ste $1==$4 && $3==2 && $2==1 call loecxxste("sal")
1765 pat loe loc sri ste $1==$4 && $3==2 && $2==1 call loecxxste("sar")
1766 pat loe loc sru ste $1==$4 && $3==2 && $2==1 call loecxxste("shr")
1768 proc loecshste example loe loc sli ste
1770 uses CXREG = {ANYCON,$2}
1771 gen sxx* {EXTERN2,$1},cl
1773 pat loe loc sli ste $1==$4 && $3==2 call loecshste("sal")
1774 pat loe loc slu ste $1==$4 && $3==2 call loecshste("sal")
1775 pat loe loc sri ste $1==$4 && $3==2 call loecshste("sar")
1776 pat loe loc sru ste $1==$4 && $3==2 call loecshste("shr")
1779 pat lol ngi stl $1==$3 && $2==2 && inreg($1)==reg_any
1781 gen neg {LOCAL, $1, 2}
1784 pat lol ngi stl $1==$3 && $2==2
1785 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1786 gen neg {LOCAL, $1, 2}
1788 pat ldl ngi sdl $1==$3 && $2==4
1789 kills indexed,locals %ind+%size > $1 && %ind < $1+4
1790 gen neg {LOCAL, $1+2, 2}
1792 sbb {LOCAL, $1+2, 2}, {ANYCON, 0}
1794 pat lol dup adp stl loi stl $1==$4 && $2==2 && $5<=2
1795 leaving lol $1 loi $5 stl $6 lol $4 adp $3 stl $4
1798 pat lol dup adp stl loi $1==$4 && $2==2 && $5==1 && inreg($1) > 0
1799 uses REG1 = {ind_reg1, regvar($1)}
1801 leaving lol $4 adp $3 stl $4
1803 pat lol dup adp stl loi $1==$4 && $2==2 && $5==2 && inreg($1) > 0
1804 uses REG = {ind_reg2, regvar($1)}
1806 leaving lol $4 adp $3 stl $4
1807 pat adp stl inreg($2) > 0 leaving stl $2 lol $2 adp $1 stl $2
1810 pat lol dup adp stl $1==$4 && $2==2
1811 uses ADDREG={LOCAL,$1,2} yields %a
1812 leaving lol $4 adp $3 stl $4
1815 uses REG={LOCAL,$1,2} yields %a
1819 uses REG={LOCAL,$1,2} yields %a
1822 pat lol adp stl $1==$3 && $2==1 leaving inl $1
1823 pat lol adp stl $1==$3 && $2==0-1 leaving del $1
1824 pat lol adp stl $1==$3 leaving loc $2 lol $1 adi 2 stl $3
1827 pat lol com stl $1==$3 && $2==2 && inreg($1)==reg_any
1829 gen not {LOCAL,$1,2}
1832 pat lol com stl $1==$3 && $2==2
1833 kills indexed,locals %ind+%size > $1 && %ind < $1+2
1834 gen not {LOCAL, $1, 2}
1836 pat lil adp dup sil lof $1==$4 && $3==2 && $5==(0-$2)
1837 leaving lil $4 dup 2 adp $2 sil $4 loi 2
1840 pat lil dup adp sil $1==$4 && $2==2 && inreg($1)==reg_any
1841 uses ADDREG={ind_reg2, regvar($1)}
1843 leaving lil $4 adp $3 sil $4
1845 pat lil adp dup sil $1==$4 && $3==2 && inreg($1)==reg_any
1846 leaving lil $4 adp $2 sil $4 lil $4
1848 pat lil dup inc sil $1==$4 && $2==2 && inreg($1)==reg_any
1849 uses REG={ind_reg2, regvar($1)}
1851 leaving lil $4 inc sil $4
1853 pat lil dup dec sil $1==$4 && $2==2 && inreg($1)==reg_any
1854 uses REG={ind_reg2, regvar($1)}
1856 leaving lil $4 dec sil $4
1859 pat lil adp sil $1==$3 && $2==1 leaving lil $1 inc sil $1
1861 pat lil adp sil $1==$3 && $2==0-1 leaving lil $1 dec sil $1
1863 pat lil adp sil $1==$3 leaving loc $2 lil $1 adi 2 sil $3
1865 pat lol lof adp lol stf $1==$4 && $2==$5 && $3==1
1866 leaving lol $1 lof $2 inc lol $4 stf $5
1867 pat lol lof adp lol stf $1==$4 && $2==$5 && $3==(0-1)
1868 leaving lol $1 lof $2 dec lol $4 stf $5
1869 pat lol lof adp lol stf $1==$4 && $2==$5
1870 leaving loc $3 lol $1 lof $2 adi 2 lol $4 stf $5
1873 pat lol lof lol lof adp lol stf
1874 $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
1875 uses ADDREG={ind_regoff2, regvar($1), $2}
1877 leaving lol $1 lof $2 adp $5 lol $6 stf $7
1879 pat lol lof lol lof inc lol stf
1880 $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
1881 uses REG={ind_regoff2, regvar($1), $2}
1883 leaving lol $1 lof $2 inc lol $6 stf $7
1885 pat lol lof lol lof dec lol stf
1886 $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
1887 uses REG={ind_regoff2, regvar($1), $2}
1889 leaving lol $1 lof $2 dec lol $6 stf $7
1891 pat lol lof dup adp lol stf
1892 $1==$5 && $2==$6 && $3==2 && inreg($1)==reg_any
1893 uses ADDREG={ind_regoff2, regvar($1), $2}
1895 leaving lol $1 lof $2 adp $4 lol $1 stf $2
1897 pat lol lof dup inc lol stf
1898 $1==$5 && $2==$6 && $3==2 && inreg($1)==reg_any
1899 uses REG={ind_regoff2, regvar($1), $2}
1901 leaving lol $1 lof $2 inc lol $1 stf $2
1903 pat lol lof dup dec lol stf
1904 $1==$5 && $2==$6 && $3==2 && inreg($1)==reg_any
1905 uses REG={ind_regoff2, regvar($1), $2}
1907 leaving lol $1 lof $2 dec lol $1 stf $2
1911 pat lol lof dup adp lol stf
1912 $1==$5 && $2==$6 && $3==2 && $4==1
1914 uses ADDREG={LOCAL,$1,2}, REG
1915 gen move {ind_regoff2, %a, $2},%b
1916 inc {ind_regoff2, %a, $2}
1919 pat loe lof dup adp loe stf
1920 $1==$5 && $2==$6 && $3==2 && $4==1
1922 uses ADDREG={EXTERN2,$1}, REG
1923 gen move {ind_regoff2, %a, $2},%b
1924 inc {ind_regoff2, %a, $2}
1927 pat loe loi dup adp loe sti
1928 $1==$5 && $2==$6 && $3==2 && $2==2 && $4==1
1930 uses ADDREG={EXTERN2,$1}, REG
1931 gen move {ind_reg2, %a},%b
1935 pat lol lof dup adp lol stf
1936 $1==$5 && $2==$6 && $3==2 && $4==(0-1)
1938 uses ADDREG={LOCAL,$1,2}, REG
1939 gen move {ind_regoff2, %a, $2},%b
1940 dec {ind_regoff2, %a, $2}
1943 pat loe lof dup adp loe stf
1944 $1==$5 && $2==$6 && $3==2 && $4==(0-1)
1946 uses ADDREG={EXTERN2,$1}, REG
1947 gen move {ind_regoff2, %a, $2},%b
1948 dec {ind_regoff2, %a, $2}
1951 pat loe loi dup adp loe sti
1952 $1==$5 && $2==$6 && $3==2 && $2==2 && $4==(0-1)
1954 uses ADDREG={EXTERN2,$1}, REG
1955 gen move {ind_reg2, %a},%b
1959 pat lol lof dup adp lol stf
1960 $1==$5 && $2==$6 && $3==2
1962 uses ADDREG={LOCAL,$1,2}, REG
1963 gen move {ind_regoff2, %a, $2},%b
1964 add {ind_regoff2, %a, $2}, {ANYCON, $4}
1967 pat loe lof dup adp loe stf
1968 $1==$5 && $2==$6 && $3==2
1970 uses ADDREG={EXTERN2,$1}, REG
1971 gen move {ind_regoff2, %a, $2},%b
1972 add {ind_regoff2, %a, $2}, {ANYCON, $4}
1975 pat loe loi dup adp loe sti
1976 $1==$5 && $2==$6 && $3==2 && $2==2
1978 uses ADDREG={EXTERN2,$1}, REG
1979 gen move {ind_reg2, %a},%b
1980 add {ind_reg2, %a}, {ANYCON, $4}
1983 pat loe ngi ste $1==$3 && $2==2
1985 gen neg {EXTERN2, $1}
1987 pat lde ngi sde $1==$3 && $2==4
1989 gen neg {EXTERN2, $1+2}
1991 sbb {EXTERN2, $1+2}, {ANYCON, 0}
1993 pat loe dup adp ste $1==$4 && $2==2
1994 uses ADDREG={EXTERN2,$1} yields %a
1995 leaving loe $1 adp $3 ste $1
1998 uses REG={EXTERN2,$1} yields %a leaving ine $1
2001 uses REG={EXTERN2,$1} yields %a leaving dee $1
2003 pat loe adp ste $1==$3 && $2==1 leaving ine $1
2005 pat loe adp ste $1==$3 && $2==0-1 leaving dee $1
2007 pat loe adp ste $1==$3 leaving loc $2 loe $1 adi 2 ste $3
2009 pat loe com ste $1==$3 && $2==2
2011 gen not {EXTERN2, $1}
2013 pat loe lof adp loe stf $1==$4 && $2==$5 && $3==1
2014 leaving loe $1 lof $2 inc loe $1 stf $2
2015 pat loe lof adp loe stf $1==$4 && $2==$5 && $3==0-1
2016 leaving loe $1 lof $2 dec loe $1 stf $2
2017 pat loe lof adp loe stf $1==$4 && $2==$5
2018 leaving loc $3 loe $1 lof $2 adi 2 loe $1 stf $2
2020 pat loe loi adp loe sti $1==$4 && $2==$5 && $3==1 && $2==2
2021 leaving loe $1 loi $2 inc loe $1 sti $2
2022 pat loe loi adp loe sti $1==$4 && $2==$5 && $3==0-1 && $2==2
2023 leaving loe $1 loi $2 dec loe $1 sti $2
2024 pat loe loi adp loe sti $1==$4 && $2==$5 && $2==2
2025 leaving loc $3 loe $1 loi $2 adi 2 loe $1 sti $2
2027 /*******************************************************************
2028 * Group 8: Convert Instructions *
2029 *******************************************************************/
2032 with CXREG DXREG ACC
2034 gen joehoe {label,".cii"} yields %3
2040 with CXREG DXREG ACC
2042 gen joehoe {label,".cuu"} yields %3
2044 pat loc loc cii zeq $1==1 && $2==2
2049 pat loc loc cii zne $1==1 && $2==2
2054 pat loc loc cii loc and zeq $4<256 && $4>=0 && $5==2 && $1==1 && $2==2
2055 leaving loc $4 and $5 zeq $6
2056 pat loc loc cii loc and zne $4<256 && $4>=0 && $5==2 && $1==1 && $2==2
2057 leaving loc $4 and $5 zne $6
2059 pat loc loc cii $1==1 && $2==2
2062 with exact rmorconst1 ACC
2067 with exact rmorconst1
2068 uses reusing %1, ACC1=%1
2071 pat loc loc cii $1==1 && $2==4
2076 with exact rmorconst1
2077 uses reusing %1, ACC1=%1, DXREG
2081 pat loc loc cii $1==2 && $2==4
2084 gen cwd. yields dx ax
2086 pat loc loc cii $1==4 && $2==2
2087 with a_word a_word yields %1
2089 pat loc loc ciu leaving loc $1 loc $2 cuu
2090 pat loc loc cui leaving loc $1 loc $2 cuu
2092 pat loc loc cuu $1==$2
2094 pat loc loc cuu $1==2 && $2==4
2095 with a_word yields {ANYCON,0} %1
2097 pat loc loc cuu $1==4 && $2==2
2098 with a_word a_word yields %1
2100 pat loc loc cif $1==2 && $2==4 leaving loc $1 cal ".cif4"
2101 pat loc loc cif $1==4 && $2==4 leaving loc $1 cal ".cif4" asp 2
2103 pat loc loc cif $1==2 && $2==8
2108 push %1 leaving loc $1 cal ".cif8"
2110 pat loc loc cif $1==4 && $2==8
2115 push %1 leaving loc $1 cal ".cif8"
2117 pat loc loc cuf $1==2 && $2==4 leaving loc $1 cal ".cuf4"
2118 pat loc loc cuf $1==4 && $2==4 leaving loc $1 cal ".cuf4" asp 2
2120 pat loc loc cuf $1==2 && $2==8
2125 push %1 leaving loc $1 cal ".cuf8"
2127 pat loc loc cuf $1==4 && $2==8
2132 push %1 leaving loc $1 cal ".cuf8"
2134 pat loc loc cfi $1==4 && $2==2 leaving loc $1 loc $2 cal ".cfi" asp 8 lfr 2
2135 pat loc loc cfi $2==4 leaving loc $1 loc $2 cal ".cfi" asp $1
2136 pat loc loc cfi $1==8 && $2==2 leaving loc $1 loc $2 cal ".cfi" asp 12 lfr 2
2137 pat loc loc cfu $1==4 && $2==2 leaving loc $1 loc $2 cal ".cfu" asp 8 lfr 2
2138 pat loc loc cfu $2==4 leaving loc $1 loc $2 cal ".cfu" asp $1
2139 pat loc loc cfu $1==8 && $2==2 leaving loc $1 loc $2 cal ".cfu" asp 12 lfr 2
2140 pat loc loc cff $1==8 && $2==4 leaving cal ".cff4" asp 4
2141 pat loc loc cff $1==4 && $2==8
2148 push %1 leaving cal ".cff8"
2150 /********************************************************************
2151 * Group 9 : Logical Instructions *
2152 ********************************************************************/
2156 gen and %1,%2 yields %1
2158 gen and %2,%1 yields %2
2160 pat loc and $1==65535 && $2==2
2162 pat loc and $1==255 && $2==2
2163 with GENREG yields %1.1
2165 pat loc and $1==0 && $2==2 leaving asp 2 loc 0
2168 with EXACT REG REG rmorconst rmorconst
2170 and %2,%4 yields %2 %1
2171 with rmorconst rmorconst REG REG
2173 and %4,%2 yields %4 %3
2175 pat ldc and highw($1)==(0-1) && $2==4 leaving loc loww($1) and 2
2177 pat ldc and loww($1)==0 && $2==4 leaving asp 2 loc highw($1) and 2 loc 0
2179 pat ldc and loww($1)==65535 && $2==4
2181 gen and %2,{ANYCON, highw($1)} yields %2 %1
2183 pat ldc and highw($1)==0 && $2==4
2185 gen and %1,{ANYCON, loww($1)} yields {ANYCON,0} %1
2189 gen mov cx,{ANYCON,$1}
2190 joehoe {label, ".and"}
2192 pat and !defined($1)
2195 gen joehoe {label, ".and"}
2199 gen or %1,%2 yields %1
2201 gen or %2,%1 yields %2
2203 pat loc ior $1==0 && $2==2
2205 pat loc ior $1==65535 && $2==2 leaving asp 2 loc $1
2208 with EXACT REG REG rmorconst rmorconst
2210 or %2,%4 yields %2 %1
2211 with rmorconst rmorconst REG REG
2213 or %4,%2 yields %4 %3
2215 pat ldc ior highw($1)==(0-1) && $2==4
2217 gen or %1,{ANYCON, loww($1)} yields {ANYCON,0-1} %1
2219 pat ldc ior highw($1)==0 && $2==4 leaving loc loww($1) ior 2
2221 pat ldc ior loww($1)==65535 && $2==4 leaving asp 2 loc highw($1) ior 2 loc 0-1
2223 pat ldc ior loww($1)==0 && $2==4
2225 gen or %2,{ANYCON, highw($1)} yields %2 %1
2229 gen mov cx,{ANYCON,$1}
2230 joehoe {label, ".ior"}
2232 pat ior !defined($1)
2235 gen joehoe {label, ".ior"}
2239 gen xor %1,%2 yields %1
2241 gen xor %2,%1 yields %2
2244 with EXACT REG REG rmorconst rmorconst
2246 xor %2,%4 yields %2 %1
2247 with rmorconst rmorconst REG REG
2249 xor %4,%2 yields %4 %3
2253 gen mov cx,{ANYCON,$1}
2254 joehoe {label, ".xor"}
2256 pat xor !defined($1)
2259 gen joehoe {label, ".xor"}
2263 gen not %1 yields %1
2272 gen mov cx,{ANYCON,$1}
2273 joehoe {label, ".com"}
2275 pat com !defined($1)
2278 gen joehoe {label, ".com"}
2280 pat loc rol $1==1 && $2==2
2282 gen rol %1,{ANYCON,1} yields %1
2286 gen rol %2,cl yields %2
2290 gen jcxz {label, 1f}
2291 2: sal %2,{ANYCON,1}
2297 pat loc ror $1==1 && $2==2
2299 gen ror %1,{ANYCON,1} yields %1
2303 gen ror %2,cl yields %2
2307 gen jcxz {label, 1f}
2310 2: sal %2,{ANYCON,1}
2316 /*******************************************************************
2317 * Group 10 : Set Instructions *
2318 *******************************************************************/
2323 and %2,{ANYCON, 1} yields %2
2325 pat loc inn $1==1 && $2==2
2327 gen shr %1,{ANYCON, 1}
2328 and %1,{ANYCON, 1} yields %1
2330 pat loc inn $1==0 && $2==2
2332 gen and %1,{ANYCON, 1} yields %1
2337 gen mov cx,{ANYCON, $1}
2338 joehoe {label,".inn"} yields ax
2340 pat inn !defined($1)
2343 gen joehoe {label,".inn"} yields ax
2345 pat loc inn zeq $2==2
2347 gen check %1,{ANYCON,1<<$1}
2350 pat loc inn zne $2==2
2352 gen check %1,{ANYCON,1<<$1}
2357 uses REG={ANYCON, 1}
2358 gen shl %a,cl yields %a
2363 gen mov cx,{ANYCON, $1}
2364 joehoe {label,".set"}
2366 pat set !defined($1)
2369 gen joehoe {label,".set"}
2371 /********************************************************************
2372 * Group 11 : Array Instructions *
2373 ********************************************************************/
2375 pat lae aar $2==2 && rom($1,3)==1 && rom($1,1)==0
2378 pat lae aar $2==2 && rom($1,3)==1 && rom($1,1)!=0
2379 leaving adp 0-rom($1,1) ads 2
2381 pat lae aar $2==2 && rom($1,3)==2 && rom($1,1)==0
2383 gen sal %1,{ANYCON,1} yields %1 leaving ads 2
2385 pat lae aar $2==2 && rom($1,3)==2 && rom($1,1)!=0
2387 gen sal %1,{ANYCON,1} yields %1 leaving adp 0-2*rom($1,1) ads 2
2389 pat lae aar $2==2 && rom($1,3)==4 && rom($1,1)==0
2391 gen sal %1,{ANYCON,1}
2392 sal %1,{ANYCON,1} yields %1 leaving ads 2
2394 pat lae aar $2==2 && rom($1,3)==4 && rom($1,1)!=0
2396 gen sal %1,{ANYCON,1}
2397 sal %1,{ANYCON,1} yields %1 leaving adp 0-4*rom($1,1) ads 2
2399 pat lae aar $2==2 && rom($1,1)==0
2401 uses DXREG,REG={ANYCON,rom($1,3)}
2402 gen mul %b yields %1 leaving ads 2
2404 pat lae aar $2==2 && defined(rom($1,1))
2406 uses DXREG,REG={ANYCON,rom($1,3)}
2407 gen mul %b yields %1
2408 leaving adp 0-rom($1,1)*rom($1,3) ads 2
2410 pat loc sli ads sti $1==1 && $2==2 && $3==2
2411 with exact rmorconst ADDR_EXTERN
2412 uses reusing %1,ADDREG=%1
2413 gen sal %a,{ANYCON,1} yields {Xreg_off,%a,%2.off}
2415 with ADDREG rmorconst
2416 gen sal %1,{ANYCON,1}
2417 add %1,%2 yields %1 leaving sti $4
2419 gen sal %1,{ANYCON,1}
2420 add %2,%1 yields %2 leaving sti $4
2422 pat loc sli ads $1==1 && $2==2 && $3==2
2423 with exact rmorconst ADDR_EXTERN
2424 uses reusing %1,ADDREG=%1
2425 gen sal %a,{ANYCON,1} yields {Xreg_off,%a,%2.off}
2426 with ADDREG rmorconst
2427 gen sal %1,{ANYCON,1}
2430 gen sal %1,{ANYCON,1}
2433 gen sal %1,{ANYCON,1}
2436 pat loc sli ads sti $1==2 && $2==2 && $3==2
2437 with exact rmorconst ADDR_EXTERN
2438 uses reusing %1,ADDREG=%1
2439 gen sal %a,{ANYCON,1}
2440 sal %a,{ANYCON,1} yields {Xreg_off,%a,%2.off}
2442 with ADDREG rmorconst
2443 gen sal %1,{ANYCON,1}
2445 add %1,%2 yields %1 leaving sti $4
2447 gen sal %1,{ANYCON,1}
2449 add %2,%1 yields %2 leaving sti $4
2451 pat loc sli ads $1==2 && $2==2 && $3==2
2452 with exact rmorconst ADDR_EXTERN
2453 uses reusing %1,ADDREG=%1
2454 gen sal %a,{ANYCON,1}
2455 sal %a,{ANYCON,1} yields {Xreg_off,%a,%2.off}
2456 with ADDREG rmorconst
2457 gen sal %1,{ANYCON,1}
2461 gen sal %1,{ANYCON,1}
2465 gen sal %1,{ANYCON,1}
2469 pat loc sli ads sti $2==2 && $3==2
2470 with exact rmorconst ADDR_EXTERN
2471 uses reusing %1,ADDREG=%1,CXREG={ANYCON,$1}
2472 gen sal %a,cl yields {Xreg_off,%a,%2.off}
2474 with ADDREG rmorconst
2475 uses CXREG={ANYCON,$1}
2477 add %1,%2 yields %1 leaving sti $4
2479 uses CXREG={ANYCON,$1}
2481 add %2,%1 yields %2 leaving sti $4
2483 pat loc sli ads $2==2 && $3==2
2484 with exact rmorconst ADDR_EXTERN
2485 uses reusing %1,ADDREG=%1,CXREG={ANYCON,$1}
2486 gen sal %a,cl yields {Xreg_off,%a,%2.off}
2487 with ADDREG rmorconst
2488 uses CXREG={ANYCON,$1}
2492 uses CXREG={ANYCON,$1}
2496 uses CXREG={ANYCON,$1}
2503 gen sub %2,{ind_reg2,%1}
2504 mul {ind_regoff2,%1,4} yields %2 leaving ads 2
2507 gen sub %2,{ind_regoff2, %1.reg, %1.off}
2508 mul {ind_regoff2, %1.reg, 4+%1.off}
2509 yields %2 leaving ads 2
2512 gen sub %2,{ind_bpregoff2, %1.reg, %1.ind}
2513 mul {ind_bpregoff2, %1.reg, 4+%1.ind}
2514 yields %2 leaving ads 2
2517 gen sub %2,{LOCAL,%1.ind,2}
2518 mul {LOCAL, 4+%1.ind,2} yields %2 leaving ads 2
2519 with ADDR_EXTERN ACC
2521 gen sub %2,{EXTERN2,%1.off}
2522 mul {EXTERN2,4+%1.off} yields %2 leaving ads 2
2524 pat lae lar defined(rom($1,3)) leaving lae $1 aar $2 loi rom($1,3)
2526 pat lae sar defined(rom($1,3)) leaving lae $1 aar $2 sti rom($1,3)
2528 pat aar !defined($1)
2530 gen joehoe {label,".iaar"} yields bx
2535 gen joehoe {label,".sar2"}
2537 pat sar !defined($1)
2539 gen joehoe {label,".isar"}
2544 gen joehoe {label,".lar2"}
2546 pat lar !defined($1)
2548 gen joehoe {label,".ilar"}
2550 /*******************************************************************
2551 * Group 12 : Compare Instructions *
2552 *******************************************************************/
2555 with EXACT register rmorconst
2565 with rmorconst register
2578 gen joehoe {label,".cmi4"} yields ax
2580 pat cmu $1==2 leaving cmp
2584 gen joehoe {label,".cmu4"} yields ax
2587 with EXACT REG rmorconst
2588 gen sub %1,%2 yields %1
2590 gen sub %2,%1 yields %2
2593 with rmorconst rmorconst REG REG
2597 with EXACT REG REG rmorconst rmorconst
2604 gen mov cx,{ANYCON,$1}
2605 joehoe {label,".cms"} yields cx
2607 pat cms !defined($1)
2610 gen joehoe {label,".cms"} yields cx
2614 gen joehoe {label,".cmf4"} leaving asp 8 lfr 2
2618 gen joehoe {label,".cmf8"} leaving asp 16 lfr 2
2621 with EXACT register rmorconst
2622 uses REG = {ANYCON,0}
2630 with rmorconst register
2631 uses REG = {ANYCON,0}
2642 uses REG = {ANYCON,0}
2648 pat tlt call txx("jns")
2649 pat teq call txx("jne")
2650 pat tne call txx("je")
2651 pat tge call txx("js")
2653 /* For the next two patterns there is no I8086 test instruction (one that
2654 ignores the OF flag. Therefore, condition codes are killed and the test
2659 uses REG = {ANYCON, 0}
2668 uses REG = {ANYCON, 0}
2682 pat tlt ior $2==2 call txxior("jns")
2683 pat tge ior $2==2 call txxior("js")
2684 pat teq ior $2==2 call txxior("jne")
2685 pat tne ior $2==2 call txxior("je")
2687 /* For the next two patterns there is no I8086 test instruction (one that
2688 ignores the OF flag. Therefore, condition codes are killed and the test
2708 with regorconst rm REG
2714 pat cmi tlt ior $1==2 && $3==2 call cmixxior("jge")
2715 pat cmi tle ior $1==2 && $3==2 call cmixxior("jg")
2716 pat cmi teq ior $1==2 && $3==2 call cmixxior("jne")
2717 pat cmi tne ior $1==2 && $3==2 call cmixxior("je")
2718 pat cmi tge ior $1==2 && $3==2 call cmixxior("jl")
2719 pat cmi tgt ior $1==2 && $3==2 call cmixxior("jle")
2723 uses REG = {ANYCON,0}
2729 uses REG = {ANYCON,0}
2735 pat cmi tlt $1==2 call cmxtxx("jge","jle")
2736 pat cmi tle $1==2 call cmxtxx("jg","jl")
2737 pat cmi teq $1==2 call cmxtxx("jne","jne")
2738 pat cmi tne $1==2 call cmxtxx("je","je")
2739 pat cmi tge $1==2 call cmxtxx("jl","jg")
2740 pat cmi tgt $1==2 call cmxtxx("jle","jge")
2741 pat cmp tlt call cmxtxx("jae","jbe")
2742 pat cmp tle call cmxtxx("ja","jb")
2743 pat cmp teq call cmxtxx("jne","jne")
2744 pat cmp tne call cmxtxx("je","je")
2745 pat cmp tge call cmxtxx("jb","ja")
2746 pat cmp tgt call cmxtxx("jbe","jae")
2747 pat cms teq $1==2 call cmxtxx("jne","jne")
2748 pat cms tne $1==2 call cmxtxx("je","je")
2750 proc cmxzxx example cmp zlt
2751 with regorconst rm STACK
2754 with rm regorconst STACK
2758 pat cmp zlt call cmxzxx("jb","ja")
2759 pat cmp zle call cmxzxx("jbe","jae")
2760 pat cmp zeq call cmxzxx("je","je")
2761 pat cmp zne call cmxzxx("jne","jne")
2762 pat cmp zge call cmxzxx("jae","jbe")
2763 pat cmp zgt call cmxzxx("ja","jb")
2764 pat cms zeq $1==2 call cmxzxx("je","je")
2765 pat cms zne $1==2 call cmxzxx("jne","jne")
2767 proc cmx4zxx example cmi zlt
2768 with regorconst regorconst rm rm STACK
2775 with rm rm regorconst regorconst STACK
2783 pat cmi zlt $1==4 call cmx4zxx("jl", "jb", "jg", "ja")
2784 pat cmi zle $1==4 call cmx4zxx("jl", "jbe", "jg", "jae")
2785 pat cmi zgt $1==4 call cmx4zxx("jg", "ja", "jl", "jb")
2786 pat cmi zge $1==4 call cmx4zxx("jg", "jae", "jl", "jbe")
2788 pat cmu zlt $1==4 call cmx4zxx("jb", "jb", "ja", "ja")
2789 pat cmu zle $1==4 call cmx4zxx("jb", "jbe", "ja", "jae")
2790 pat cmu zgt $1==4 call cmx4zxx("ja", "ja", "jb", "jb")
2791 pat cmu zge $1==4 call cmx4zxx("ja", "jae", "jb", "jbe")
2793 pat ldc cmi zlt highw($1)==0 && loww($1)==0 && $2==4
2794 with rmorconst rmorconst yields %2 leaving zlt $3
2796 pat ldc cmi tlt highw($1)==0 && loww($1)==0 && $2==4
2797 with rmorconst rmorconst yields %2 leaving tlt
2799 pat ldc cmi zge highw($1)==0 && loww($1)==0 && $2==4
2800 with rmorconst rmorconst yields %2 leaving zge $3
2802 pat ldc cmi tge highw($1)==0 && loww($1)==0 && $2==4
2803 with rmorconst rmorconst yields %2 leaving tge $3
2805 pat ldc cmi tle highw($1)==0 && loww($1)==0 && $2==4
2806 with rmorconst rmorconst
2807 uses REG = {ANYCON, 0}
2817 pat ldc cmi tgt highw($1)==0 && loww($1)==0 && $2==4
2818 with rmorconst rmorconst
2819 uses REG = {ANYCON, 0}
2829 pat loc ldc cms zeq $3==4 && $1==0 && loww($2)==0 && highw($2)==0
2834 pat loc ldc cms zne $3==4 && $1==0 && loww($2)==0 && highw($2)==0
2839 pat loc ldc cms teq $3==4 && $1==0 && loww($2)==0 && highw($2)==0
2841 uses REG = {ANYCON, 0}
2847 pat loc ldc cms tne $3==4 && $1==0 && loww($2)==0 && highw($2)==0
2854 pat ldc cms zeq $2==4 && loww($1)==0 && highw($1)==0
2855 with rmorconst REG STACK
2858 with REG rmorconst STACK
2862 pat ldc cms zne $2==4 && loww($1)==0 && highw($1)==0
2863 with rmorconst REG STACK
2866 with REG rmorconst STACK
2870 pat ldc cms teq $2==4 && loww($1)==0 && highw($1)==0
2872 uses REG = {ANYCON, 0}
2878 uses REG = {ANYCON, 0}
2884 pat ldc cms tne $2==4 && loww($1)==0 && highw($1)==0
2896 pat ldc cms zeq $2==4 && loww($1)==65535 && highw($1)==(0-1)
2897 with rmorconst REG STACK
2901 with REG rmorconst STACK
2906 pat ldc cms zne $2==4 && loww($1)==65535 && highw($1)==(0-1)
2907 with rmorconst REG STACK
2911 with REG rmorconst STACK
2917 with regorconst regorconst rm rm STACK
2922 with rm rm regorconst regorconst STACK
2929 with regorconst regorconst rm rm STACK
2935 with rm rm regorconst regorconst STACK
2942 proc andzxx example and zeq
2943 with regorconst rm STACK
2946 with exact rm regorconst
2951 pat and zeq $1==2 call andzxx("je")
2952 pat and zne $1==2 call andzxx("jne")
2954 proc locandzxx example loc and zeq
2956 gen testb %1,{ANYCON,$1}
2959 gen testb %1.1,{ANYCON,$1}
2963 gen check %1,{ANYCON,$1}
2966 pat loc and zeq $1<256 && $1>=0 && $2==2 call locandzxx("je")
2967 pat loc and zne $1<256 && $1>=0 && $2==2 call locandzxx("jne")
2969 proc locbxx example loc beq
2971 gen cmpb %1,{ANYCON,$1}
2974 gen cmp %1,{ANYCON,$1}
2977 pat loc beq $1<256 && $1>=0 call locbxx("je")
2978 pat loc bne $1<256 && $1>=0 call locbxx("jne")
2980 proc loccmuzxx example loc cmu zeq
2982 gen cmpb %1,{ANYCON,$1}
2985 gen cmp %1,{ANYCON,$1}
2988 pat loc cmu zeq $1<256 && $1>=0 && $2==2 call loccmuzxx("je")
2989 pat loc cmu zne $1<256 && $1>=0 && $2==2 call loccmuzxx("jne")
2991 /*******************************************************************
2992 * Group 13 : Branch Instructions *
2993 *******************************************************************/
2995 pat lab topeltsize($1)==2 && !fallthrough($1)
2998 gen labeldef $1 yields ax
3000 pat lab topeltsize($1)==2 && fallthrough($1)
3003 gen labeldef $1 yields ax
3005 pat lab topeltsize($1)!=2
3010 pat bra topeltsize($1)==2
3014 pat bra topeltsize($1)!=2
3018 proc bxx example blt
3019 with regorconst rm STACK
3022 with rm regorconst STACK
3026 pat blt call bxx("jl","jg")
3027 pat ble call bxx("jle","jge")
3028 pat bge call bxx("jge","jle")
3029 pat bgt call bxx("jg","jl")
3031 proc bex example beq
3032 with regorconst rm STACK
3035 with rm regorconst STACK
3047 pat beq call bex("je","je")
3048 pat bne call bex("jne","jne")
3050 proc zxx example zlt
3055 pat zlt call zxx("js")
3056 pat zge call zxx("jns")
3058 /* For the next two patterns there is no I8086 test instruction (one that
3059 ignores the OF flag. Therefore, condition codes are killed and the test
3085 /*******************************************************************
3086 * Group 14 : Procedure-call Instructions *
3087 *******************************************************************/
3091 gen joehoe {label,$1}
3099 pat lfr adi stl $1==2 && $2==2 && inreg($3) > 0
3101 gen pop {LOCAL,$3,2}
3102 add {LOCAL,$3,2}, ax
3105 pat lfr $1==2 yields ax
3107 pat lfr $1==4 yields dx ax
3111 gen joehoe {label, ".lfr6"}
3115 gen joehoe {label, ".lfr8"}
3154 gen joehoe {label, ".ret6"}
3165 gen joehoe {label, ".ret8"}
3174 /********************************************************************
3175 * Group 15 : Miscellaneous Instructions *
3176 ********************************************************************/
3181 uses BXREG /* GENREG may contain lfr area */
3185 with exact a_word a_word
3187 uses BXREG /* GENREG may contain lfr area */
3192 with STACK yields bp
3196 gen add sp,{ANYCON,$1}
3199 with rmorconst STACK
3202 pat ass !defined($1)
3203 with rm rmorconst STACK
3204 gen cmp %1,{ANYCON,2}
3205 jne {label, ".unknown"}
3208 pat blm $1==0 leaving asp 4
3212 gen mov cx,{ANYCON,$1/2}
3213 joehoe {label, ".blm"}
3218 gen sar cx,{ANYCON,1}
3219 joehoe {label, ".blm"}
3221 pat bls !defined($1)
3224 gen cmp %1,{ANYCON,2}
3225 jne {label, ".unknown"}
3227 joehoe {label, ".blm"}
3232 uses BXREG = { ADDR_EXTERN, $1}
3233 gen jmp {label, ".csa2"}
3238 gen jmp {label, ".csa2"}
3241 with BXREG ACC DXREG
3243 gen jmp {label, ".csa4"}
3248 uses BXREG = { ADDR_EXTERN, $1}
3249 gen jmp {label, ".csb2"}
3254 gen jmp {label, ".csb2"}
3257 with BXREG ACC DXREG
3259 gen jmp {label, ".csb4"}
3262 with anyreg yields %1 %1
3263 with ACC1 yields %1 %1
3266 with regorconst regorconst yields %2 %1 %2 %1
3270 gen mov cx,{ANYCON,$1}
3271 joehoe {label, ".dup"}
3276 gen joehoe {label, ".dup"}
3278 pat dus !defined($1)
3281 gen cmp %1,{ANYCON,2}
3282 jne {label, ".unknown"}
3283 joehoe {label, ".dup"}
3286 with a_word a_word yields %1 %2
3289 with a_word a_word a_word a_word yields %2 %1 %4 %3
3293 gen mov cx,{ANYCON,$1}
3294 joehoe {label, ".exg"}
3299 gen joehoe {label, ".exg"}
3303 gen mov bx,{ADDR_EXTERN,$1}
3307 gen mov {EXTERN2,"hol0+4"},{ADDR_EXTERN,$1}
3311 gen mov %a,{EXTERN2,".ignmask"} yields %a
3314 gen mov {EXTERN2,"hol0"},{ANYCON,$1}
3317 gen inc {EXTERN2,"hol0"}
3319 pat lor $1==0 yields bp
3324 gen mov %a,sp yields %a
3328 gen mov %a,{EXTERN2,".reghp"} yields %a
3333 gen joehoe {label, ".mon"}
3338 gen joehoe {label, ".nop"}
3344 gen joehoe {label, ".rck"} yields ax
3346 pat rck !defined($1)
3347 with rm-BXREG-ACC BXREG ACC
3349 gen cmp %1,{ANYCON,2}
3350 jne {label, ".unknown"}
3351 joehoe {label, ".rck"} yields ax
3353 pat rtt leaving ret 0
3357 gen xchg {EXTERN2,".trppc"},%1 yields %1
3361 gen mov {EXTERN2,".ignmask"},%1
3368 with rmorconst STACK
3373 gen joehoe {label, ".strhp"}
3378 gen joehoe {label, ".Xtrp"}