mach/i86/ce/as_table

   1 adc dst:REG, src:EADDR  ==>     @text1( 0x13);
   2                                 mod_RM( dst->reg, src).
   3
   4 add dst:REG, src:EADDR  ==>     @text1( 0x3);
   5                                 mod_RM( dst->reg, src).
   6
   7 ... dst:ACCU, src:DATA  ==>     @text1( 0x5);
   8                                 @text2( %$(src->expr)).
   9
  10 ... dst:EADDR, src:DATA ==>     @text1( 0x81);
  11                                 mod_RM( 0, dst);
  12                                 @text2( %$(src->expr)).
  13
  14 ... dst:ACCU, src:lABEL ==>     @text1( 0x5);
  15                                 @reloc2( %$(src->lab), %$(src->off), !PC_REL).
  16
  17 ... dst:EADDR, src:lABEL ==>    @text1( 0x81);
  18                                 mod_RM( 0, dst);
  19                                 @reloc2( %$(src->lab), %$(src->off), !PC_REL).
  20
  21 and dst:REG, src:EADDR  ==>     @text1( 0x23);
  22                                 mod_RM( dst->reg, src).
  23
  24 ... dst:ACCU, src:DATA  ==>     @text1( 0x25);
  25                                 @text2( %$(src->expr)).
  26
  27 call dst:lABEL          ==>     @text1( 0xe8);
  28                                 @reloc2( %$(dst->lab), %$(dst->off), PC_REL).
  29
  30 ... dst:EADDR           ==>     @text1( 0xff);
  31                                 mod_RM( 2, dst).
  32
  33 cmp dst:REG, src:EADDR  ==>     @text1( 0x3b);
  34                                 mod_RM( dst->reg, src).
  35
  36 ... dst:ACCU, src:DATA  ==>     @text1( 0x3d);
  37                                 @text2( %$(src->expr)).
  38
  39 ... dst:EADDR, src:DATA ==>     @text1( 0x81);
  40                                 mod_RM(7,dst);
  41                                 @text2( %$(src->expr)).
  42
  43 cwd                     ==>     @text1( 0x99).
  44
  45 dec dst:REG             ==>     R53( 9, dst->reg).
  46
  47 ... dst:EADDR           ==>     @text1( 0xff);
  48                                 mod_RM( 1, dst).
  49
  50 div divisor:EADDR       ==>     @text1( 0xf7);
  51                                 mod_RM( 6, divisor).
  52
  53 idiv divisor:EADDR      ==>     @text1( 0xf7);
  54                                 mod_RM( 7, divisor).
  55
  56 inc dst:REG             ==>     R53( 8, dst->reg).
  57
  58 ... dst:EADDR           ==>     @text1( 0xff);
  59                                 mod_RM( 0, dst).
  60
  61 jb dst:ILB              ==>     @text1( 0x72);
  62                                 @text1( %dist( dst->lab)).
  63
  64 je dst:ILB              ==>     @text1( 0x74);
  65                                 @text1( %dist( dst->lab)).
  66
  67 ... dst:lABEL           ==>     save_op( dst);
  68                                 assemble( "jne 9f");
  69                                 jmp_instr( &saved_op);
  70                                 assemble( "9:").
  71
  72 jg dst:ILB              ==>     @text1( 0x7f);
  73                                 @text1( %dist( dst->lab)).
  74
  75 ... dst:lABEL           ==>     save_op( dst);
  76                                 assemble( "jle 9f");
  77                                 jmp_instr( &saved_op);
  78                                 assemble( "9:").
  79
  80 jge dst:ILB             ==>     @text1( 0x7d);
  81                                 @text1( %dist( dst->lab)).
  82
  83 ... dst:lABEL           ==>     save_op( dst);
  84                                 assemble( "jl 9f");
  85                                 jmp_instr( &saved_op);
  86                                 assemble( "9:").
  87
  88 jl dst:ILB              ==>     @text1( 0x7c);
  89                                 @text1( %dist( dst->lab)).
  90
  91 ... dst:lABEL           ==>     save_op( dst);
  92                                 assemble( "jge 9f");
  93                                 jmp_instr( &saved_op);
  94                                 assemble( "9:").
  95
  96 jle dst:ILB             ==>     @text1( 0x7e);
  97                                 @text1( %dist( dst->lab)).
  98
  99 ... dst:lABEL           ==>     save_op( dst);
 100                                 assemble( "jg 9f");
 101                                 jmp_instr( &saved_op);
 102                                 assemble( "9:").
 103
 104 jmp dst:ILB             ==>     @text1( 0xeb);
 105                                 @text1( %dist( dst->lab)).
 106
 107 ... dst:lABEL           ==>     @text1( 0xe9);
 108                                 @reloc2( %$(dst->lab), %$(dst->off), PC_REL).
 109
 110 jne dst:ILB             ==>     @text1( 0x75);
 111                                 @text1( %dist( dst->lab)).
 112
 113 ... dst:lABEL           ==>     save_op( dst);
 114                                 assemble( "je 9f");
 115                                 jmp_instr( &saved_op);
 116                                 assemble( "9:").
 117
 118 lea dst:REG, src:EADDR  ==>     @text1( 0x8d);
 119                                 mod_RM( dst->reg, src).
 120
 121 loop dst:ILB            ==>     @text1( 0xe2);
 122                                 @text1( %dist( dst->lab)).
 123
 124 mov dst:REG, src:EADDR  ==>     mov_REG_EADDR( dst, src).
 125
 126 ... dst:REG, src:DATA   ==>     R53( 0x17, dst->reg);
 127                                 @text2( %$(src->expr)).
 128
 129 ... dst:REG, src:lABEL  ==>     R53( 0x17, dst->reg);
 130                                 @reloc2( %$(src->lab), %$(src->off), !PC_REL).
 131
 132 ... dst:EADDR, src:REG  ==>     @text1( 0x89);
 133                                 mod_RM( src->reg, dst).
 134
 135 ... dst:EADDR, src:DATA ==>     @text1( 0xc7);
 136                                 mod_RM( 0, dst);
 137                                 @text2( %$(src->expr)).
 138
 139 ... dst:EADDR, src:lABEL ==>    @text1( 0xc7);
 140                                 mod_RM( 0, dst);
 141                                 @reloc2( %$(src->lab), %$(src->off), !PC_REL).
 142
 143 movb dst:REG, src:EADDR ==>     @text1( 0x8a);
 144                                 mod_RM( dst->reg, src).
 145
 146 ... dst:EADDR, src:REG  ==>     @text1( 0x88);
 147                                 mod_RM( src->reg, dst).
 148
 149 mul mplier:EADDR        ==>     @text1( 0xf7);
 150                                 mod_RM( 4, mplier).
 151
 152 neg dst:EADDR           ==>     @text1( 0xf7);
 153                                 mod_RM( 3, dst).
 154
 155 not dst:EADDR           ==>     @text1( 0xf7);
 156                                 mod_RM( 2, dst).
 157
 158 or dst:REG, src:EADDR   ==>     @text1( 0x0b);
 159                                 mod_RM( dst->reg, src).
 160
 161 pop dst:REG             ==>     R53( 0xb, dst->reg).
 162
 163 ... dst:EADDR           ==>     @text1( 0x8f);
 164                                 mod_RM( 0, dst).
 165
 166 POP dst                 ==>     @if ( push_waiting)
 167                                         mov_instr( dst, AX_oper);
 168                                         @assign( push_waiting, FALSE).
 169                                 @else
 170                                         pop_instr( dst).
 171                                 @fi.
 172
 173 push src:REG            ==>     R53( 0xa, src->reg).
 174
 175 ... src:EADDR           ==>     @text1( 0xff);
 176                                 mod_RM( 6, src).
 177
 178 PUSH src                ==>     mov_instr( AX_oper, src);
 179                                 @assign( push_waiting, TRUE).
 180
 181 rcr dst:EADDR, src:CONST1 ==>   @text1( 0xd1);
 182                                 mod_RM( 3, dst).
 183
 184 rep ins:MOVS            ==>     @text1( 0xf3);
 185                                 @text1( 0xa5).  /* Wie zet direction flag? */
 186
 187 ret                     ==>     @text1( 0xc3).  /* Altijd NEAR! */
 188
 189 rol dst:EADDR, src:REG_CL ==>   @text1( 0xd3);
 190                                 mod_RM( 0, dst).
 191
 192 ror dst:EADDR, src:REG_CL ==>   @text1( 0xd3);
 193                                 mod_RM( 1, dst).
 194
 195 sal dst:EADDR, src:REG_CL ==>   @text1( 0xd3);
 196                                 mod_RM( 4, dst).
 197
 198 sar dst:EADDR, src:REG_CL ==>   @text1( 0xd3);
 199                                 mod_RM( 7, dst).
 200
 201 ... dst:EADDR, src:CONST1 ==>   @text1( 0xd1);
 202                                 mod_RM( 7, dst).
 203
 204 sbb dst:REG, src:EADDR  ==>     @text1( 0x1b);
 205                                 mod_RM( dst->reg, src).
 206
 207 ... dst:ACCU, src:DATA  ==>     @text1( 0x1d);
 208                                 @text2( %$(src->expr)).
 209
 210 shl dst, src            ==>     sal_instr( dst, src).
 211
 212 shr dst:EADDR, src:REG_CL ==>   @text1( 0xd3);
 213                                 mod_RM( 5, dst).
 214
 215 ... dst:EADDR, src:CONST1 ==>   @text1( 0xd1);
 216                                 mod_RM( 5, dst).
 217
 218 sub dst:REG, src:EADDR  ==>     @text1( 0x2b);
 219                                 mod_RM( dst->reg, src).
 220
 221 ... dst:EADDR, src:DATA ==>     @text1( 0x81);
 222                                 mod_RM( 5, dst);
 223                                 @text2( %$(src->expr)).
 224
 225 test dst:REG, src:EADDR ==>     @text1( 0x85);
 226                                 mod_RM( dst->reg, src).
 227
 228 xchg dst:EADDR, src:REG ==>     @text1( 0x87);
 229                                 mod_RM( src->reg, dst).
 230
 231 xor dst:REG, src:EADDR  ==>     @text1( 0x33);
 232                                 mod_RM( dst->reg, src).