1 add dst:REG, src:EADDR ==> @text1( 0x3);
2 mod_RM( dst->reg, src).
4 ... dst:ACCU, src:DATA ==> @text1( 0x5);
5 @text4( %$(src->expr)).
7 ... dst:EADDR, src:DATA ==> small_RMconst(0x81, 0, dst, src).
9 and dst:REG, src:EADDR ==> @text1( 0x23);
10 mod_RM( dst->reg, src).
12 ... dst:ACCU, src:DATA ==> @text1( 0x25);
13 @text4( %$(src->expr)).
15 call dst:lABEL ==> @text1( 0xe8);
16 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
18 ... dst:EADDR ==> @text1( 0xff);
23 cmp dst:REG, src:EADDR ==> @text1( 0x3b);
24 mod_RM( dst->reg, src).
26 ... dst:ACCU, src:DATA ==> @text1( 0x3d);
27 @text4( %$(src->expr)).
29 ... dst:EADDR, src:DATA ==> small_RMconst(0x81, 7, dst, src).
31 dec dst:REG ==> R53( 9, dst->reg).
33 ... dst:EADDR ==> @text1( 0xff);
36 div divisor:EADDR ==> @text1( 0xf7);
39 enter nm:DATA, nm1:DATA ==> @text1( 0xc8);
40 @text2( %$(nm->expr));
41 @text1( %$(nm1->expr)).
43 idiv divisor:EADDR ==> @text1( 0xf7);
46 imul mplier:EADDR ==> @text1( 0xf7);
49 inc dst:REG ==> R53( 8, dst->reg).
51 ... dst:EADDR ==> @text1( 0xff);
54 jb dst:ILB ==> @text1( 0x72);
55 @text1( %dist( dst->lab)).
57 ... dst:lABEL ==> @text1(0x0f);
59 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
61 je dst:ILB ==> @text1( 0x74);
62 @text1( %dist( dst->lab)).
64 ... dst:lABEL ==> @text1(0x0f);
66 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
68 jg dst:ILB ==> @text1( 0x7f);
69 @text1( %dist( dst->lab)).
71 ... dst:lABEL ==> @text1(0x0f);
73 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
75 jge dst:ILB ==> @text1( 0x7d);
76 @text1( %dist( dst->lab)).
78 ... dst:lABEL ==> @text1(0x0f);
80 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
82 jl dst:ILB ==> @text1( 0x7c);
83 @text1( %dist( dst->lab)).
85 ... dst:lABEL ==> @text1(0x0f);
87 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
89 jle dst:ILB ==> @text1( 0x7e);
90 @text1( %dist( dst->lab)).
92 ... dst:lABEL ==> @text1(0x0f);
94 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
96 jmp dst:ILB ==> @text1( 0xeb);
97 @text1( %dist( dst->lab)).
99 ... dst:lABEL ==> @text1( 0xe9);
100 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
102 jne dst:ILB ==> @text1( 0x75);
103 @text1( %dist( dst->lab)).
105 ... dst:lABEL ==> @text1(0x0f);
107 @reloc4( %$(dst->lab), %$(dst->off), PC_REL).
109 lea dst:REG, src:EADDR ==> @text1( 0x8d);
110 mod_RM( dst->reg, src).
112 loop dst:ILB ==> @text1( 0xe2);
113 @text1( %dist( dst->lab)).
115 mov dst:REG, src:EADDR ==> mv_RG_EADDR( dst, src).
117 ... dst:REG, src:DATA ==> R53( 0x17, dst->reg);
118 @text4(%$(src->expr)).
120 ... dst:EADDR, src:REG ==> @text1( 0x89);
121 mod_RM( src->reg, dst).
123 ... dst:EADDR, src:DATA ==> @text1( 0xc7);
125 @text4( %$(src->expr)).
127 ... dst:EADDR, src:lABEL ==> @text1( 0xc7);
129 @reloc4( %$(src->lab), %$(src->off), ABSOLUTE).
131 movw dst:EADDR, src:REG ==> @text1( 0x66); /* operand size prefix */
133 mod_RM( src->reg, dst).
135 movb dst:EADDR, src:REG ==> @text1( 0x88);
136 mod_RM( src->reg, dst).
138 movzxb dst:REG, src:EADDR ==> @text1(0x0f);
140 mod_RM(dst->reg, src).
142 movzx dst:REG, src:EADDR ==> @text1(0x0f);
144 mod_RM(dst->reg, src).
146 mul mplier:EADDR ==> @text1( 0xf7);
149 neg dst:EADDR ==> @text1( 0xf7);
152 not dst:EADDR ==> @text1( 0xf7);
155 or dst:REG, src:EADDR ==> @text1( 0x0b);
156 mod_RM( dst->reg, src).
158 pop dst:REG ==> R53( 0xb, dst->reg).
160 ... dst:EADDR ==> @text1( 0x8f);
164 POP dst ==> @if ( push_waiting)
165 mov_instr( dst, AX_oper);
166 @assign( push_waiting, FALSE).
172 push src:REG ==> R53( 0xa, src->reg).
174 ... src:DATA ==> small_const(0x68, src).
176 ... src:lABEL ==> @text1(0x68);
177 @reloc4(%$(src->lab), %$(src->off), ABSOLUTE).
179 ... src:EADDR ==> @text1( 0xff);
183 PUSH src ==> mov_instr( AX_oper, src);
184 @assign( push_waiting, TRUE).
186 ret ==> @text1( 0xc3). /* Always NEAR! */
188 leave ==> @text1( 0xc9). /* Always NEAR! */
190 rol dst:EADDR, src:REG_CL ==> @text1( 0xd3);
193 ror dst:EADDR, src:REG_CL ==> @text1( 0xd3);
196 sal dst:EADDR, src:REG_CL ==> @text1( 0xd3);
199 sar dst:EADDR, src:REG_CL ==> @text1( 0xd3);
202 ... dst:EADDR, src:DATA ==> @text1( 0xc1);
204 @text1(%$(src->expr)).
206 shl dst:EADDR, src:REG_CL ==> @text1(0xd3);
209 shr dst:EADDR, src:REG_CL ==> @text1( 0xd3);
212 sub dst:REG, src:EADDR ==> @text1( 0x2b);
213 mod_RM( dst->reg, src).
215 ... dst:EADDR, src:DATA ==> small_RMconst(0x81, 5, dst, src).
217 test dst:REG, src:EADDR ==> @text1( 0x85);
218 mod_RM( dst->reg, src).
220 xchg dst:EADDR, src:REG ==> @text1( 0x87);
221 mod_RM( src->reg, dst).
223 xor dst:REG, src:EADDR ==> @text1( 0x33);
224 mod_RM( dst->reg, src).