From be227c5f8833cbb7c0e781c24abb25835f09a987 Mon Sep 17 00:00:00 2001 From: ceriel Date: Wed, 16 Sep 1992 16:10:30 +0000 Subject: [PATCH] Several fixes and addition of 80486 instructions --- mach/i386/as/mach2.c | 4 ++++ mach/i386/as/mach3.c | 28 +++++++++++++++++++++++----- mach/i386/as/mach4.c | 21 ++++++++++++++++++++- mach/i386/as/mach5.c | 2 +- 4 files changed, 48 insertions(+), 7 deletions(-) diff --git a/mach/i386/as/mach2.c b/mach/i386/as/mach2.c index 3f899b9d5..394693128 100644 --- a/mach/i386/as/mach2.c +++ b/mach/i386/as/mach2.c @@ -59,4 +59,8 @@ %token FST_ST2 %token ST +/* Intel 80486 tokens */ +%token EXTOPBW +%token BSWAP %type st_i +%type reg diff --git a/mach/i386/as/mach3.c b/mach/i386/as/mach3.c index bf46eb7b2..8850ac016 100644 --- a/mach/i386/as/mach3.c +++ b/mach/i386/as/mach3.c @@ -51,6 +51,9 @@ 0, RSYSDR, 3, "dr3", 0, RSYSDR, 6, "dr6", 0, RSYSDR, 7, "dr7", +0, RSYSTR, 3, "tr3", /* i486 */ +0, RSYSTR, 4, "tr4", /* i486 */ +0, RSYSTR, 5, "tr5", /* i486 */ 0, RSYSTR, 6, "tr6", 0, RSYSTR, 7, "tr7", 0, ADDOP, 000, "addb", @@ -202,9 +205,9 @@ 0, NOOP_1, 057, "das", 0, NOOP_1, 067, "aaa", 0, NOOP_1, 077, "aas", -0, NOOP_2, 017+06<<8, "clts", -0, NOOP_2, 0324+012<<8, "aam", -0, NOOP_2, 0325+012<<8, "aad", +0, NOOP_2, 017+(06<<8), "clts", +0, NOOP_2, 0324+(012<<8), "aam", +0, NOOP_2, 0325+(012<<8), "aad", 0, NOTOP, 020, "notb", 0, NOTOP, 021, "not", 0, NOTOP, 030, "negb", @@ -294,6 +297,7 @@ 0, FNOOP, FESC+1+(0xE0<<8), "fchs", 0, FNOOP, FESC+3+(0xE2<<8), "fclex", 0, FNOOP, FESC+6+(0xD9<<8), "fcompp", +0, FNOOP, FESC+2+(0xE9<<8), "fucompp", 0, FNOOP, FESC+1+(0xF6<<8), "fdecstp", 0, FNOOP, FESC+3+(0xE1<<8), "fdisi", 0, FNOOP, FESC+3+(0xE0<<8), "feni", @@ -312,6 +316,7 @@ 0, FNOOP, FESC+1+(0xFE<<8), "fsin", 0, FNOOP, FESC+1+(0xFB<<8), "fsincos", 0, FNOOP, FESC+1+(0xF8<<8), "fprem", +0, FNOOP, FESC+1+(0xF5<<8), "fprem1", 0, FNOOP, FESC+1+(0xF2<<8), "fptan", 0, FNOOP, FESC+1+(0xFC<<8), "frndint", 0, FNOOP, FESC+1+(0xFD<<8), "fscale", @@ -320,7 +325,7 @@ 0, FNOOP, FESC+1+(0xE5<<8), "fxam", 0, FNOOP, FESC+1+(0xF4<<8), "fxtract", 0, FNOOP, FESC+1+(0xF1<<8), "fyl2x", -0, FNOOP, FESC+1+(0xF9<<8), "fyl2pi", +0, FNOOP, FESC+1+(0xF9<<8), "fyl2xp1", 0, FMEM, FESC+6+(0<<11), "fiadds", 0, FMEM, FESC+2+(0<<11), "fiaddl", @@ -382,10 +387,12 @@ 0, FST_I, FESC+1+(0xC0<<8), "fld", 0, FST_I, FESC+5+(0xD0<<8), "fst", -0, FST_I, FESC+5+(0xC8<<8), "fstp", +0, FST_I, FESC+5+(0xD8<<8), "fstp", 0, FST_I, FESC+1+(0xC8<<8), "fxch", 0, FST_I, FESC+0+(0xD0<<8), "fcom", +0, FST_I, FESC+5+(0xE0<<8), "fucom", 0, FST_I, FESC+0+(0xD8<<8), "fcomp", +0, FST_I, FESC+5+(0xE8<<8), "fucomp", 0, FST_I, FESC+5+(0xC0<<8), "ffree", 0, FST_ST, FESC+0+(0xC0<<8), "fadd", @@ -400,3 +407,14 @@ 0, FST_ST2, FESC+2+(0xE0<<8), "fsubp", 0, FST_ST2, FESC+0+(0xE8<<8), "fsubr", 0, FST_ST2, FESC+2+(0xE8<<8), "fsubrp", + +/* Intel 486 instructions */ +0, EXTOPBW, 0xC0, "xaddb", +0, EXTOPBW, 0xC1, "xadd", +0, EXTOPBW, 0xA6, "cmpxchgb", +0, EXTOPBW, 0xA7, "cmpxchg", +0, BSWAP, 0xC8, "bswap", +0, NOOP_2, 017+(010<<8), "invd", +0, EXTOP1, 071, "invlpg", +0, NOOP_2, 017+(011<<8), "wbinvd", + diff --git a/mach/i386/as/mach4.c b/mach/i386/as/mach4.c index c225b8ea5..7119dad0d 100644 --- a/mach/i386/as/mach4.c +++ b/mach/i386/as/mach4.c @@ -129,7 +129,7 @@ oper : NOOP_1 emit2((int)($2.val)); } | SETCC ea_2 - { emit1(0xF); emit1($1); ea_2(0);} + { emit1(0xF); emit1($1|0x90); ea_2(0);} | XCHG ea_ea { xchg($1);} | TEST ea_ea @@ -172,6 +172,8 @@ oper : NOOP_1 { emit1($1); emit1($1>>8);} | FMEM mem { emit1($1); ea_2(($1>>8)&070);} + | FMEM_AX mem + { emit1($1); ea_2(($1>>8)&070);} | FMEM_AX R32 { if ($2 != 0) { serror("illegal register"); @@ -190,6 +192,13 @@ oper : NOOP_1 { emit1($1|4); emit1((($1>>8)|$2)); } | FST_ST2 st_i ',' ST { emit1($1|4); emit1((($1>>8)|$2)^010); } + /* 486 instructions */ + | BSWAP R32 + { emit1(0xF); emit1($1|$2); } + | EXTOPBW reg ',' ea_2 + { regsize($1); + emit1(0xF); emit1($1); ea_2($2<<3); + } ; st_i : ST '(' absexp ')' @@ -263,6 +272,16 @@ ea_2 : mem RELOMOVE(rel_2, relonami); } ; +reg : R8 { reg_1 = ($1 | IS_R8) | (address_long ? 0 : 0300); + rm_1 = 0; + $$ = $1; + } + | R32 + { reg_1 = ($1 | IS_R32) | (address_long ? 0 : 0310); + rm_1 = 0; + $$ = $1; + } + ; ea_1 : ea_2 { op_1 = op_2; RELOMOVE(rel_1, rel_2); diff --git a/mach/i386/as/mach5.c b/mach/i386/as/mach5.c index 0eadddae1..22a95d649 100644 --- a/mach/i386/as/mach5.c +++ b/mach/i386/as/mach5.c @@ -524,7 +524,7 @@ bittestop(opc) emit1((int)(exp_2.val)); } else if (is_reg(reg_2)) { - emit1(0203 | opc); + emit1(0203 | (opc<<3)); ea_1((reg_2&7)<<3); } else badsyntax(); -- 2.34.1