From 80dedbed021060225d2088270108fcba67a2aba3 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Sat, 8 Sep 2018 21:53:41 +0100 Subject: [PATCH] sbcv2: Get rid of the boot via CP/M hack and make it bootable This needs a little care because it's not well documented and also 1. If you tell ROMWBW your loader is from F200 to F3FF it loads all of memory and goes boom. Tell it F400 and it's ok 2. ROMWBW lacks the notion of an 'I/O bank' so you can't do disk I/O into the low 32K directly. That aside ROMWBW has a nice easy interface so the boot loader is quite trivial. Not quite as trivial as the Microbee but not far off! --- Kernel/platform-sbcv2/Makefile | 20 +++++-- Kernel/platform-sbcv2/boot-romwbw.s | 84 +++++++++++++++++++++++++++++ Kernel/platform-sbcv2/config.h | 5 -- Kernel/platform-sbcv2/crt0.s | 4 +- 4 files changed, 103 insertions(+), 10 deletions(-) create mode 100644 Kernel/platform-sbcv2/boot-romwbw.s diff --git a/Kernel/platform-sbcv2/Makefile b/Kernel/platform-sbcv2/Makefile index e7787f86..d8c2ac7e 100644 --- a/Kernel/platform-sbcv2/Makefile +++ b/Kernel/platform-sbcv2/Makefile @@ -9,8 +9,8 @@ DISCSRCS = discard.c ASRCS = sbcv2.s crt0.s ASRCS += tricks.s commonmem.s -DISCARD_DSRCS = ../dev/devide_discard.c -DSRCS = ../dev/blkdev.c ../dev/devide.c ../dev/mbr.c ../dev/ds1302_discard.c +DISCARD_DSRCS = ../dev/devide_discard.c ../dev/ds1302_discard.c +DSRCS = ../dev/blkdev.c ../dev/devide.c ../dev/mbr.c DSRCS += ../dev/propio2.c ../dev/ds1302.c DSRCS += ../dev/devfd.c ../dev/ppide_rbc.c NSRCS = ../dev/net/net_w5100.c ../dev/net/net_native.c @@ -55,4 +55,18 @@ $(DAOBJS): %.rel: ../dev/%.s clean: rm -f $(OBJS) $(JUNK) core *~ -image: +# +# Attach the kernel to the boot block +# +image: bootblock + cat boot-romwbw.bin ../fuzix.bin >fuzix.romwbw +# +# Compile up the boot block +# +bootblock: + sdasz80 -o boot-romwbw.s + sdldz80 -i boot-romwbw.rel + # This makes us a binary from physical 0 + makebin -s 62464 boot-romwbw.ihx boot-romwbw.tmp + # Chop off the leading 61440 bytes we don't want + dd if=boot-romwbw.tmp of=boot-romwbw.bin bs=512 count=2 skip=120 diff --git a/Kernel/platform-sbcv2/boot-romwbw.s b/Kernel/platform-sbcv2/boot-romwbw.s new file mode 100644 index 00000000..8f9d32a0 --- /dev/null +++ b/Kernel/platform-sbcv2/boot-romwbw.s @@ -0,0 +1,84 @@ +; +; ROMWBW boot block +; +; The provided bootloader is a bit limited. It can only really load +; stuff into upper memory and assumes CP/M is being loaded +; +; Unfortunately this means we have to chain our own loader. +; Fortunately ROMWBW is really quite nice so it's easy to use to do +; the load. What it can't do however is do I/O into the low 32K +; directly - it has no separate I/O target page feature it seems. +; +; We build the lot as if it's a binary at 0xF000 as that's easier than +; fighting the linker and the like +; +; The end must actually be the byte after we need. ROMWBW explodes +; if given F200 F3FF ! +; +.area BOOT (ABS) + .org 0xF000 + + .ds 384 + .byte 0x5A + .byte 0xA5 + .byte 0x00 ; formatting platform + .byte 0x00 ; device + .byte 0x00 ; formatter + .byte 0x00 ; physical drive + .byte 0x00 ; logical unit + .byte 0x00 ; unused + .ds 88 ; move to byte 96 + .byte 0x00 ; write protect + .word 0x00 ; update count + .byte 0 ; major + .byte 0 ; minor + .byte 0 ; update + .byte 0 ; patch + .ascii 'Fuzix WBW Loader' + .byte '$' ; indicate valid label + .word 0 ; no patch + .word 0xF200 ; load target + .word 0xF400 ; end - way more than we need but that's fine + .word 0xF200 ; run from here + +; +; This should be 0xF200. We are entered with the stack somewhere +; in the middle of RAM, HBIOS stubs in the top 2 pages and RAM +; low including our expected RST hooks for HBIOS +; +; We need to go get our device/subunit back from the BIOS because +; it's has RST 8 interfaces for this rather than just passing +; them in a register. +; +bootit: + ld sp, #0xFE00 ; SP as high as we can + ld bc, #0xF8E0 ; Get boot sysinfo into DE + rst 8 + ld b, #0x13 ; ROMWBW disk read request + ld c, d ; Device (same as booted off) + ld hl, #0x8000 ; Loading at 0x8000 for the moment + ld e, #32 ; 32 sectors (16K) + push bc + rst 8 ; Can error but if so wtf do we do ? + ld hl,#0x8000 + ld de,#0x0100 + ld bc,#0x4000 ; We've loaded 0100-40FF + ldir + pop bc + ld hl,#0x8000 + ld e,#32 ; Load the next 16K + push bc + rst 8 + ld hl,#0x8000 ; Move it into place + ld de,#0x4100 + ld bc,#0x4000 + ldir + pop bc + ld hl,#0x8100 ; Now load 8100 up + ld e, #55 ; takes us up to F100. If that's not enough + ; before unpack we have a problem as we + ; will need to move the loader + rst 8 + jp 0x0100 + + \ No newline at end of file diff --git a/Kernel/platform-sbcv2/config.h b/Kernel/platform-sbcv2/config.h index 91e8fe80..27cd2ab3 100644 --- a/Kernel/platform-sbcv2/config.h +++ b/Kernel/platform-sbcv2/config.h @@ -46,11 +46,6 @@ extern unsigned int swap_dev; */ #define swap_map(x) ((uint8_t *)(x)) -/* Set these two for networking - no point right now */ -//#define CONFIG_NET -//#define CONFIG_NET_NATIVE - - /* What is the maximum number of /dev/hd devices we have. In theory right now it's actually 3 - two in the IDE and one on the SD interface */ #define MAX_BLKDEV 4 diff --git a/Kernel/platform-sbcv2/crt0.s b/Kernel/platform-sbcv2/crt0.s index 5f40b436..009f8b41 100644 --- a/Kernel/platform-sbcv2/crt0.s +++ b/Kernel/platform-sbcv2/crt0.s @@ -37,8 +37,8 @@ .area _CODE ; Load at 0x0100 - ; We are executed as a CP/M task so live in bank 14/15 - ; with CP/M under us and the HBIOS proxy at FE00 + ; We are executed from ROMWBW so we live in bank 14/15 + ; with the HBIOS proxy at FE00 start: di ld sp, #kstack_top -- 2.34.1