From 6e62cd46714d7e288a38e254f6292dbc3662696c Mon Sep 17 00:00:00 2001 From: Neal Andrew Crook Date: Fri, 29 Jul 2016 23:31:09 +0100 Subject: [PATCH] First sighting of life from drivewire. --- Kernel/platform-multicomp09/README | 10 +- Kernel/platform-multicomp09/devtty.c | 43 ++- Kernel/platform-multicomp09/drivewire.s | 4 +- Kernel/platform-multicomp09/dwread.s | 342 +++--------------------- Kernel/platform-multicomp09/dwwrite.s | 180 +------------ 5 files changed, 84 insertions(+), 495 deletions(-) diff --git a/Kernel/platform-multicomp09/README b/Kernel/platform-multicomp09/README index d6edb0f4..d0466a5b 100644 --- a/Kernel/platform-multicomp09/README +++ b/Kernel/platform-multicomp09/README @@ -19,10 +19,16 @@ provides the following: - I/O space from 0xffd0-0xffdf - 50Hz Timer interrupt - Hardware single-step + - NMI is devoted to this function. See source code of "Buggy" for + details. - SD controller in hw state-machines - Virtual 6850-like UART interfacing to an 80x25 colour ANSI terminal on a VGA display with PS/2 keyboard input -- Upto 2 6850-like serial UARTs with RS232 or virtual-RS232/USB interfaces +- 2 6850-like serial UARTs with RS232 or virtual-RS232/USB interfaces. + The baud rate is hard-wired (in Microcomputer.vhd) to 115,200 which + suits DriveWire perfectly. +- Jumper to swap (in hardware) addresses of Virtual UART and actual + UART, allowing the boot device to be swapped. - coco-style memory mapping unit (2 contexts, 8K banks) - upto 1MByte physical RAM - RTC through DS1302 bit-banged on GPIO port. @@ -127,7 +133,7 @@ DEVICES (so far) node major minor description /dev/tty1 2 1 VGA/PS2 console <-+-- swappable by VDUFFD0 /dev/tty2 2 2 RS232 port <-+ jumper -/dev/tty3 2 3 USB virtual RS232 port +/dev/tty3 2 3 RS232 port for Drivewire transport to server /dev/tty4 2 4 Drivewire Virtual Window #0 (coming soon..) /dev/dw? 8 0-256 Drivewire Block Drives (coming soon..) diff --git a/Kernel/platform-multicomp09/devtty.c b/Kernel/platform-multicomp09/devtty.c index 0d68e420..247c4a05 100644 --- a/Kernel/platform-multicomp09/devtty.c +++ b/Kernel/platform-multicomp09/devtty.c @@ -24,13 +24,13 @@ Port 0 and Port 1 mappings can be swapped through a jumper on the PCB. Port 2 is a serial port. - Port 0 is used for tty1, Port 1 for tty2. + Port 0 is used for tty1, Port 1 for tty2. Port2 is dedicated to DriveWire. */ static uint8_t *uart[] = { 0, 0, /* Unused */ (uint8_t *)0xFFD1, (uint8_t *)0xFFD0, /* Virtual UART Data, Status port0, tty1 */ (uint8_t *)0xFFD3, (uint8_t *)0xFFD2, /* UART Data, Status port1, tty2 */ - (uint8_t *)0xFFD5, (uint8_t *)0xFFD4, /* UART Data, Status port2, tty3 */ + (uint8_t *)0xFFD5, (uint8_t *)0xFFD4, /* UART Data, Status port2, dw */ }; #ifdef MC09_VIRTUAL_IN @@ -58,15 +58,14 @@ uint8_t vtattr_cap; uint8_t tbuf1[TTYSIZ]; /* virtual serial port 0: console */ uint8_t tbuf2[TTYSIZ]; /* serial port 1: UART */ -uint8_t tbuf3[TTYSIZ]; /* serial port 2: UART */ -uint8_t tbuf4[TTYSIZ]; /* drivewire VSER 0 */ -uint8_t tbuf5[TTYSIZ]; /* drivewire VSER 1 */ -uint8_t tbuf6[TTYSIZ]; /* drivewire VSER 2 */ -uint8_t tbuf7[TTYSIZ]; /* drivewire VSER 3 */ -uint8_t tbuf8[TTYSIZ]; /* drivewire VWIN 0 */ -uint8_t tbuf9[TTYSIZ]; /* drivewire VWIN 1 */ -uint8_t tbufa[TTYSIZ]; /* drivewire VWIN 2 */ -uint8_t tbufb[TTYSIZ]; /* drivewire VWIN 3 */ +uint8_t tbuf3[TTYSIZ]; /* drivewire VSER 0 */ +uint8_t tbuf4[TTYSIZ]; /* drivewire VSER 1 */ +uint8_t tbuf5[TTYSIZ]; /* drivewire VSER 2 */ +uint8_t tbuf6[TTYSIZ]; /* drivewire VSER 3 */ +uint8_t tbuf7[TTYSIZ]; /* drivewire VWIN 0 */ +uint8_t tbuf8[TTYSIZ]; /* drivewire VWIN 1 */ +uint8_t tbuf9[TTYSIZ]; /* drivewire VWIN 2 */ +uint8_t tbufa[TTYSIZ]; /* drivewire VWIN 3 */ struct s_queue ttyinq[NUM_DEV_TTY + 1] = { @@ -75,17 +74,16 @@ struct s_queue ttyinq[NUM_DEV_TTY + 1] = { /* Virtual UART/Real UART Consoles */ {tbuf1, tbuf1, tbuf1, TTYSIZ, 0, TTYSIZ / 2}, {tbuf2, tbuf2, tbuf2, TTYSIZ, 0, TTYSIZ / 2}, - {tbuf3, tbuf3, tbuf3, TTYSIZ, 0, TTYSIZ / 2}, /* Drivewire Virtual Serial Ports */ + {tbuf3, tbuf3, tbuf3, TTYSIZ, 0, TTYSIZ / 2}, {tbuf4, tbuf4, tbuf4, TTYSIZ, 0, TTYSIZ / 2}, {tbuf5, tbuf5, tbuf5, TTYSIZ, 0, TTYSIZ / 2}, {tbuf6, tbuf6, tbuf6, TTYSIZ, 0, TTYSIZ / 2}, - {tbuf7, tbuf7, tbuf7, TTYSIZ, 0, TTYSIZ / 2}, /* Drivewire Virtual Window Ports */ + {tbuf7, tbuf7, tbuf7, TTYSIZ, 0, TTYSIZ / 2}, {tbuf8, tbuf8, tbuf8, TTYSIZ, 0, TTYSIZ / 2}, {tbuf9, tbuf9, tbuf9, TTYSIZ, 0, TTYSIZ / 2}, {tbufa, tbufa, tbufa, TTYSIZ, 0, TTYSIZ / 2}, - {tbufb, tbufa, tbufa, TTYSIZ, 0, TTYSIZ / 2}, }; @@ -93,7 +91,7 @@ struct s_queue ttyinq[NUM_DEV_TTY + 1] = { /* A wrapper for tty_close that closes the DW port properly */ int my_tty_close(uint8_t minor) { - if (minor > 3 && ttydata[minor].users == 1) + if (minor > 2 && ttydata[minor].users == 1) dw_vclose(minor); return (tty_close(minor)); } @@ -121,8 +119,9 @@ void kputchar(char c) ttyready_t tty_writeready(uint8_t minor) { + // [NAC HACK 2016Jul27] do I need to wait for the DW uart? Maybe I do.. uint8_t c; - if ((minor < 1) || (minor > 3)) { + if ((minor < 1) || (minor > 2)) { return TTY_READY_NOW; } c = *(uart[minor*2 + 1]); /* 2 entries per UART, +1 to get STATUS */ @@ -131,10 +130,10 @@ ttyready_t tty_writeready(uint8_t minor) void tty_putc(uint8_t minor, unsigned char c) { - if ((minor > 0) && (minor < 4)) { + if ((minor > 0) && (minor < 3)) { *(uart[minor*2]) = c; /* UART Data */ } - if (minor > 3 ) { + if (minor > 2 ) { dw_putc(minor, c); } } @@ -147,7 +146,7 @@ void tty_sleeping(uint8_t minor) void tty_setup(uint8_t minor) { - if (minor > 3) { + if (minor > 2) { dw_vopen(minor); return; } @@ -191,9 +190,7 @@ void platform_interrupt(void) c = *(uart[1*2 + 1]); if (c & 0x01) { tty_inproc(1, *(uart[1*2])); } /* c = *(uart[2*2 + 1]); - if (c & 0x01) { tty_inproc(2, *(uart[2*2])); } - c = *(uart[3*2 + 1]); - if (c & 0x01) { tty_inproc(3, *(uart[3*2])); } */ + if (c & 0x01) { tty_inproc(2, *(uart[2*2])); } */ #endif c = timer_reg; @@ -202,7 +199,7 @@ void platform_interrupt(void) timer_interrupt(); /* tell the OS it happened */ } - // dw_vpoll(); + dw_vpoll(); } diff --git a/Kernel/platform-multicomp09/drivewire.s b/Kernel/platform-multicomp09/drivewire.s index 214d4686..e8c1d601 100644 --- a/Kernel/platform-multicomp09/drivewire.s +++ b/Kernel/platform-multicomp09/drivewire.s @@ -160,11 +160,11 @@ ReadEx puls d,x,y,pc ; Used by DWRead and DWWrite IntMasks equ $50 -NOINTMASK equ 1 +NOINTMASK equ 0 ; Hardcode these for now so that we can use below files unmodified H6309 equ 0 -BECKER equ 1 +BECKER equ 0 ARDUINO equ 0 JMCPBCK equ 0 BAUD38400 equ 0 diff --git a/Kernel/platform-multicomp09/dwread.s b/Kernel/platform-multicomp09/dwread.s index 1b4c587b..77d39aa6 100644 --- a/Kernel/platform-multicomp09/dwread.s +++ b/Kernel/platform-multicomp09/dwread.s @@ -1,341 +1,83 @@ ******************************************************* * -* Copied from HDB-DOS from toolshed.sf.net +* Derived from HDB-DOS from toolshed.sf.net * The original code is public domain * * DWRead * Receive a response from the DriveWire server. * Times out if serial port goes idle for more than 1.4 (0.7) seconds. * Serial data format: 1-8-N-1 -* 4/12/2009 by Darren Atkinson +* 28Jul2106 by Neal Crook for Multicomp UART * * Entry: * X = starting address where data is to be stored * Y = number of bytes expected * * Exit: -* CC = carry set on framing error, Z set if all bytes received +* CC = Carry set on framing error, Z set if all bytes received * X = starting address of data received * Y = checksum * U is preserved. All accumulators are clobbered * +* [NAC HACK 2016Jul29] assume: timeout indicated by C=0, Z=0 +* + include "platform.def" ; makes ports available to dwread, dwwrite - IFNE ARDUINO -* Note: this is an optimistic routine. It presumes that the server will always be there, and -* has NO timeout fallback. It is also very short and quick. -DWRead clra ; clear Carry (no framing error) - pshs u,x,cc ; preserve registers - leau ,x - ldx #$0000 -loop@ tst $FF51 ; check for CA1 bit (1=Arduino has byte ready) - bpl loop@ ; loop if not set - ldb $FF50 ; clear CA1 bit in status register - stb ,u+ ; save off acquired byte - abx ; update checksum - leay ,-y - bne loop@ - - leay ,x ; return checksum in Y - puls cc,x,u,pc ; restore registers and return - - ELSE - - IFNE JMCPBCK -* NOTE: There is no timeout currently on here... -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - leau ,x - ldx #$0000 - IFEQ NOINTMASK - orcc #IntMasks - ENDC -loop@ ldb $FF4C - bitb #$02 - beq loop@ - ldb $FF44 - stb ,u+ - abx - leay ,-y - bne loop@ - - tfr x,y - ldb #0 - lda #3 - leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - ELSE - IFNE BECKER - IFNDEF BCKSTAT -BCKSTAT equ $FF41 - ENDC - IFNDEF BCKPORT -BCKPORT equ $FF42 - ENDC -* NOTE: There is no timeout currently on here... -DWRead clra ; clear Carry (no framing error) - deca ; clear Z flag, A = timeout msb ($ff) - tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - leau ,x - ldx #$0000 - IFEQ NOINTMASK - orcc #IntMasks - ENDC -loop@ ldb BCKSTAT - bitb #$02 - beq loop@ - ldb BCKPORT - stb ,u+ - abx - leay ,-y - bne loop@ - tfr x,y - ldb #0 - lda #3 -timeout leas 1,s ; remove timeout msb from stack - inca ; A = status to be returned in C and Z - ora ,s ; place status information into the.. - sta ,s ; ..C and Z bits of the preserved CC - leay ,x ; return checksum in Y - puls cc,dp,x,u,pc ; restore registers and return - ENDC - ENDC - ENDC - - IFEQ BECKER+JMCPBCK+ARDUINO - IFNE BAUD38400 ******************************************************* -* 38400 bps using 6809 code and timimg +* 57600 (115200) bps using 6809 code and hw UART ******************************************************* DWRead clra ; clear Carry (no framing error) deca ; clear Z flag, A = timeout msb ($ff) tfr cc,b - pshs u,x,dp,b,a ; preserve registers, push timeout msb - IFEQ NOINTMASK - orcc #IntMasks ; mask interrupts - ENDC - tfr a,dp ; set direct page to $FFxx - setdp $ff - leau ,x ; U = storage ptr - ldx #0 ; initialize checksum - adda #2 ; A = $01 (serial in mask), set Carry + pshs u,x,b,a ; preserve registers, push timeout msb -* Wait for a start bit or timeout -rx0010 bcc rxExit ; exit if timeout expired - ldb #$ff ; init timeout lsb -rx0020 bita