From 177af75c934eead71dc61eae2796610c49153c3e Mon Sep 17 00:00:00 2001 From: keie Date: Mon, 13 May 1985 11:19:24 +0000 Subject: [PATCH] *** empty log message *** --- mach/6500/as/Makefile | 20 +- mach/6800/as/Makefile | 20 +- mach/6805/as/Makefile | 20 +- mach/6809/as/Makefile | 20 +- mach/arm/as/Makefile | 20 +- mach/i386/as/Makefile | 20 +- mach/i80/as/Makefile | 20 +- mach/i86/as/Makefile | 20 +- mach/m68020/as/Makefile | 20 +- mach/m68k2/as/Makefile | 20 +- mach/m68k2/as/mach0.c | 28 ++ mach/m68k2/as/mach1.c | 58 ++++ mach/m68k2/as/mach2.c | 42 +++ mach/m68k2/as/mach3.c | 171 ++++++++++++ mach/m68k2/as/mach4.c | 196 +++++++++++++ mach/m68k2/as/mach5.c | 460 ++++++++++++++++++++++++++++++ mach/ns/as/Makefile | 20 +- mach/pdp/as/Makefile | 20 +- mach/proto/as/Makefile | 20 +- mach/s2650/as/Makefile | 20 +- mach/vax4/as/Makefile | 20 +- mach/z80/as/Makefile | 20 +- mach/z8000/as/Makefile | 20 +- util/led/READ_ME | 600 ++++++++++++++++++++++++++++++++++++++++ util/led/WRONG | 72 +++++ util/led/makedepend | 23 ++ 26 files changed, 1922 insertions(+), 68 deletions(-) create mode 100644 mach/m68k2/as/mach0.c create mode 100644 mach/m68k2/as/mach1.c create mode 100644 mach/m68k2/as/mach2.c create mode 100644 mach/m68k2/as/mach3.c create mode 100644 mach/m68k2/as/mach4.c create mode 100644 mach/m68k2/as/mach5.c create mode 100644 util/led/READ_ME create mode 100644 util/led/WRONG create mode 100755 util/led/makedepend diff --git a/mach/6500/as/Makefile b/mach/6500/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/6500/as/Makefile +++ b/mach/6500/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/6800/as/Makefile b/mach/6800/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/6800/as/Makefile +++ b/mach/6800/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/6805/as/Makefile b/mach/6805/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/6805/as/Makefile +++ b/mach/6805/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/6809/as/Makefile b/mach/6809/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/6809/as/Makefile +++ b/mach/6809/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/arm/as/Makefile b/mach/arm/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/arm/as/Makefile +++ b/mach/arm/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/i386/as/Makefile b/mach/i386/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/i386/as/Makefile +++ b/mach/i386/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/i80/as/Makefile b/mach/i80/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/i80/as/Makefile +++ b/mach/i80/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/i86/as/Makefile b/mach/i86/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/i86/as/Makefile +++ b/mach/i86/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/m68020/as/Makefile b/mach/m68020/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/m68020/as/Makefile +++ b/mach/m68020/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/m68k2/as/Makefile b/mach/m68k2/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/m68k2/as/Makefile +++ b/mach/m68k2/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/m68k2/as/mach0.c b/mach/m68k2/as/mach0.c new file mode 100644 index 000000000..76d1a7a06 --- /dev/null +++ b/mach/m68k2/as/mach0.c @@ -0,0 +1,28 @@ +#define DUK +/* @(#)mach0.c 1.5 */ +/* + * Motorola 68000/68010 options + */ +#undef BITMAX +#define BITMAX 8000 + +#define THREE_PASS /* branch and offset optimization */ +#define BYTES_REVERSED /* high order byte has lowest address */ +#define WORDS_REVERSED /* high order word has lowest address */ +#define LISTING /* enable listing facilities */ +#define RELOCATION /* generate relocatable code */ + +#undef valu_t +#define valu_t long +#undef addr_t +#define addr_t long + +#undef ALIGNWORD +#define ALIGNWORD 2 +#undef ALIGNSECT +#define ALIGNSECT 2 + +#undef VALWIDTH +#define VALWIDTH 8 + +#define NOLD /* Added by Duk Bekema. */ diff --git a/mach/m68k2/as/mach1.c b/mach/m68k2/as/mach1.c new file mode 100644 index 000000000..175eca0c4 --- /dev/null +++ b/mach/m68k2/as/mach1.c @@ -0,0 +1,58 @@ +/* @(#)mach1.c 1.8 */ +/* + * Motorola 68000/68010 dependent C declarations + */ + +#define low3(z) ((short)(z) & 07) +#define low4(z) ((short)(z) & 017) + +#define fit3(z) ((((z)-1) & ~07) == 0) +#define fit4(z) (((z) & ~017) == 0) +#define fit8(z) (((z) & ~0xFF) == 0) +#define fit16(z) (((z) & ~0xFFFF) == 0) + +#define SIZE_B 0000 +#define SIZE_W 0100 +#define SIZE_L 0200 +#define SIZE_NON 0300 +#define SIZE_DEF SIZE_W + +extern int mrg_1,mrg_2; +extern expr_t exp_1,exp_2; +#ifndef ASLD +extern valu_t rel_1,rel_2; +#endif +extern int model; /* 68000/68010 */ + +/* addressing mode bits */ +#define DTA 0x01 +#define MEM 0x02 +#define CTR 0x04 +#define ALT 0x08 +#define FITB 0x10 +#define FITW 0x20 +#define PUTW 0x40 +#define PUTL 0x80 + +#ifndef extern +extern short eamode[]; +#else +short eamode[] = { +/* 00A */ DTA |ALT, +/* 01A */ ALT, +/* 02A */ DTA|MEM|CTR|ALT, +/* 03A */ DTA|MEM |ALT, +/* 04A */ DTA|MEM |ALT, +/* 05A */ DTA|MEM|CTR|ALT|FITW|PUTW | (RELO2 )<<8, +/* 06A */ DTA|MEM|CTR|ALT |PUTW | (RELO1 )<<8, +/* 07x */ 0, +/* 070 */ DTA|MEM|CTR|ALT|FITW|PUTW | (RELO2 )<<8, +/* 071 */ DTA|MEM|CTR|ALT |PUTL | (RELO4 )<<8, +/* 072 */ DTA|MEM|CTR |FITW|PUTW | (RELO2|RELPC)<<8, +/* 073 */ DTA|MEM|CTR |PUTW | (RELO1|RELPC)<<8, +/* 074x */ 0, +/* 074B */ DTA|MEM |FITB|PUTW | (RELO1 )<<8, +/* 074W */ DTA|MEM |FITW|PUTW | (RELO2 )<<8, +/* 074L */ DTA|MEM |PUTL | (RELO4 )<<8, +}; +#endif diff --git a/mach/m68k2/as/mach2.c b/mach/m68k2/as/mach2.c new file mode 100644 index 000000000..1274e860e --- /dev/null +++ b/mach/m68k2/as/mach2.c @@ -0,0 +1,42 @@ +/* @(#)mach2.c 1.5 */ +/* + * Motorola 68000/68010 tokens + */ + +%token SIZE +%token DREG +%token AREG +%token PC +%token CREG +%token SPEC +%token ABCD +%token ADDX +%token ADD +%token AND +%token BITOP +%token SHIFT +%token SZ_EA +%token OP_EA +%token OP_NOOP +%token OP_EA_D +%token LEA +%token DBR +%token BR +%token CMP +%token MOVE +%token MOVEP +%token MOVEM +%token MOVEC +%token MOVES +%token SWAP +%token LINK +%token UNLK +%token TRAP +%token STOP +%token EXG +%token OP_EXT +%token RTD +%token MODEL + +%type bcdx op_ea regs rrange +%type reg sizedef sizenon creg diff --git a/mach/m68k2/as/mach3.c b/mach/m68k2/as/mach3.c new file mode 100644 index 000000000..363aae76a --- /dev/null +++ b/mach/m68k2/as/mach3.c @@ -0,0 +1,171 @@ +/* @(#)mach3.c 1.4 */ +/* + * Motorola 68000/68010 keywords + */ + +0, SIZE, SIZE_B, ".b", +0, SIZE, SIZE_W, ".w", +0, SIZE, SIZE_L, ".l", + +0, DREG, 00, "d0", +0, DREG, 01, "d1", +0, DREG, 02, "d2", +0, DREG, 03, "d3", +0, DREG, 04, "d4", +0, DREG, 05, "d5", +0, DREG, 06, "d6", +0, DREG, 07, "d7", + +0, AREG, 00, "a0", +0, AREG, 01, "a1", +0, AREG, 02, "a2", +0, AREG, 03, "a3", +0, AREG, 04, "a4", +0, AREG, 05, "a5", +0, AREG, 06, "a6", +0, AREG, 07, "a7", +0, AREG, 07, "sp", + +0, PC, 8, "pc", + +0, MODEL, 0, ".68000", +0, MODEL, 1, ".68010", + +0, CREG, 04001, "vbr", +0, CREG, 0, "sfc", +0, CREG, 00001, "dfc", + +0, SPEC, 075, "usp", +0, SPEC, 076, "ccr", +0, SPEC, 077, "sr", + +0, ABCD, 0140400, "abcd", +0, ABCD, 0100400, "sbcd", + +0, ADDX, 0150400, "addx", +0, ADDX, 0110400, "subx", + +0, ADD, 0153300, "add", +0, ADD, 0112700, "sub", + +0, AND, 0141000, "and", +0, AND, 0135000, "eor", +0, AND, 0100000, "or", + +0, BITOP, 0000, "btst", +0, BITOP, 0100, "bchg", +0, BITOP, 0200, "bclr", +0, BITOP, 0300, "bset", + +0, SHIFT, 0160340, "asr", +0, SHIFT, 0160740, "asl", +0, SHIFT, 0161350, "lsr", +0, SHIFT, 0161750, "lsl", +0, SHIFT, 0162360, "roxr", +0, SHIFT, 0162760, "roxl", +0, SHIFT, 0163370, "ror", +0, SHIFT, 0163770, "rol", + +0, SZ_EA, 041000|DTA|ALT, "clr", +0, SZ_EA, 042000|DTA|ALT, "neg", +0, SZ_EA, 040000|DTA|ALT, "negx", +0, SZ_EA, 043000|DTA|ALT, "not", +0, SZ_EA, 045000|DTA|ALT, "tst", + +0, OP_EA, 044000|DTA|ALT, "nbcd", +0, OP_EA, 045300|DTA|ALT, "tas", +0, OP_EA, 047200|CTR, "jsr", +0, OP_EA, 047300|CTR, "jmp", +0, OP_EA, 044100|CTR, "pea", + +0, OP_EA, 050300, "st", +0, OP_EA, 050700, "sf", +0, OP_EA, 051300, "shi", +0, OP_EA, 051700, "sls", +0, OP_EA, 052300, "scc", +0, OP_EA, 052700, "scs", +0, OP_EA, 053300, "sne", +0, OP_EA, 053700, "seq", +0, OP_EA, 054300, "svc", +0, OP_EA, 054700, "svs", +0, OP_EA, 055300, "spl", +0, OP_EA, 055700, "smi", +0, OP_EA, 056300, "sge", +0, OP_EA, 056700, "slt", +0, OP_EA, 057300, "sgt", +0, OP_EA, 057700, "sle", + +0, OP_NOOP, 047160, "reset", +0, OP_NOOP, 047161, "nop", +0, OP_NOOP, 047163, "rte", +0, OP_NOOP, 047165, "rts", +0, OP_NOOP, 047166, "trapv", +0, OP_NOOP, 047167, "rtr", +0, OP_NOOP, 045374, "illegal", + +0, OP_EA_D, 040600, "chk", +0, OP_EA_D, 0100300, "divu", +0, OP_EA_D, 0100700, "divs", +0, OP_EA_D, 0140300, "mulu", +0, OP_EA_D, 0140700, "muls", + +0, BR, 060000, "bra", +0, BR, 060400, "bsr", +0, BR, 061000, "bhi", +0, BR, 061400, "bls", +0, BR, 062000, "bcc", +0, BR, 062400, "bcs", +0, BR, 063000, "bne", +0, BR, 063400, "beq", +0, BR, 064000, "bvc", +0, BR, 064400, "bvs", +0, BR, 065000, "bpl", +0, BR, 065400, "bmi", +0, BR, 066000, "bge", +0, BR, 066400, "blt", +0, BR, 067000, "bgt", +0, BR, 067400, "ble", + +0, DBR, 050310, "dbt", +0, DBR, 050710, "dbf", +0, DBR, 050710, "dbra", +0, DBR, 051310, "dbhi", +0, DBR, 051710, "dbls", +0, DBR, 052310, "dbcc", +0, DBR, 052710, "dbcs", +0, DBR, 053310, "dbne", +0, DBR, 053710, "dbeq", +0, DBR, 054310, "dbvc", +0, DBR, 054710, "dbvs", +0, DBR, 055310, "dbpl", +0, DBR, 055710, "dbmi", +0, DBR, 056310, "dbge", +0, DBR, 056710, "dblt", +0, DBR, 057310, "dbgt", +0, DBR, 057710, "dble", + +0, CMP, 0, "cmp", + +0, MOVE, 0, "move", +0, MOVEP, 0, "movep", +0, MOVEM, 0, "movem", +0, MOVES, 0, "moves", +0, MOVEC, 0, "movec", + +0, SWAP, 0, "swap", + +0, LINK, 0, "link", + +0, UNLK, 0, "unlk", + +0, TRAP, 0, "trap", + +0, STOP, 047162, "stop", + +0, EXG, 0, "exg", + +0, OP_EXT, 0, "ext", + +0, LEA, 0, "lea", + +0, RTD, 0, "rtd", diff --git a/mach/m68k2/as/mach4.c b/mach/m68k2/as/mach4.c new file mode 100644 index 000000000..070a09be2 --- /dev/null +++ b/mach/m68k2/as/mach4.c @@ -0,0 +1,196 @@ +/* @(#)mach4.c 1.11 */ +/* + * Motorola 68000/68010 syntax rules + */ + +operation + : bcdx DREG ',' DREG + { emit2($1 | $2 | $4<<9);} + | bcdx '-' '(' AREG ')' ',' '-' '(' AREG ')' + { emit2($1 | $4 | $9<<9 | 010);} + | ADD sizedef ea_ea + { add($1, $2);} + | AND sizenon ea_ea + { and($1, $2);} + | SHIFT sizedef ea_ea + { shift_op($1, $2);} + | BR expr + { branch($1, $2);} + | DBR DREG ',' expr + { $4.val -= (DOTVAL+2); + fit(fitw($4.val)); + emit2($1 | $2); +#ifdef RELOCATION +#ifdef DUK + newrelo($4.typ, RELPC|RELO2|RELBR|RELWR); +#else DUK + newrelo($4.typ, RELPC|RELO2); +#endif DUK +#endif + emit2(loww($4.val)); + } + | BITOP ea_ea + { bitop($1);} + | OP_EA_D ea ',' DREG + { emit2($1 | mrg_2 | $4<<9); + ea_2(SIZE_W, DTA); + } + | LEA ea ',' AREG + { emit2(040700 | mrg_2 | $4<<9); + ea_2(SIZE_L, CTR); + } + | op_ea ea + { emit2(($1&0177700) | mrg_2); + ea_2($1&0300, $1&017); + } + | OP_NOOP + { emit2($1);} + | CMP sizedef ea_ea + { cmp($2);} + | MOVE sizenon ea_ea + { move($2);} + | MOVEP sizedef ea_ea + { movep($2);} + | MOVEM sizedef regs ',' notimmreg + { movem(0, $2, $3);} + | MOVEM sizedef notimmreg ',' regs + { movem(1, $2, $5);} + | MOVES sizedef ea_ea + { test68010(); + if (mrg_1 <= 017) { + emit2(007000 | $2 | mrg_2); + emit2(mrg_1 << 12 | 04000); + ea_2($2,ALT|MEM); + } else if (mrg_2 <= 017) { + emit2(007000 | $2 | mrg_1); + emit2(mrg_2 << 12); + ea_1($2,ALT|MEM); + } else + badoperand(); + } + | MOVEC creg ',' reg + { test68010(); + emit2(047172); emit2($2 | $4<<12); + } + | MOVEC reg ',' creg + { test68010(); + emit2(047173); emit2($4 | $2<<12); + } + | EXG reg ',' reg + { if (($2 & 010) == 0) + emit2( + (0140500|$4|$2<<9) + + + (($4&010)<<3) + ); + else + emit2( + (0140600|$2|($4&07)<<9) + - + (($4&010)<<3) + ); + } + | OP_EXT sizedef DREG + { checksize($2, 2|4); emit2(044000 | $2+0100 | $3);} + | SWAP DREG + { emit2(044100 | $2);} + | STOP imm + { emit2($1); ea_2(SIZE_W, 0);} + | LINK AREG ',' imm + { emit2(047120 | $2); ea_2(SIZE_W, 0);} + | UNLK AREG + { emit2(047130 | $2);} + | TRAP '#' absexp + { fit(fit4($3)); emit2(047100|low4($3));} + | RTD imm + { test68010(); + emit2(047164); + ea_2(SIZE_W, 0); + } + | MODEL + { model = $1;} + ; +bcdx : ABCD + | ADDX sizedef + { $$ = $1 | $2;} + ; +creg : CREG + | SPEC { if ($1 != 075) badoperand(); $$ = 04000;} + ; +op_ea : OP_EA + | SZ_EA sizedef + { $$ = $1 | $2;} + ; +regs : rrange + | regs '/' rrange + { $$ = $1 | $3;} + ; +rrange : reg + { $$ = 1<<$1;} + | reg '-' reg + { if ($1 > $3) + badoperand(); + for ($$ = 0; $1 <= $3; $1++) + $$ |= (1<<$1); + } + ; +ea : DREG + { mrg_2 = $1;} + | AREG + { mrg_2 = 010 | $1;} + | SPEC + { mrg_2 = $1;} + | notimmreg + | imm + ; +notimmreg + : '(' AREG ')' + { mrg_2 = 020 | $2;} + | '(' AREG ')' '+' + { mrg_2 = 030 | $2;} + | '-' '(' AREG ')' + { mrg_2 = 040 | $3;} + | expr sizenon + { exp_2 = $1; ea707172($2); + RELOMOVE(rel_2, relonami); + } + | expr '(' reg sizenon ')' + { exp_2 = $1; ea5x73($3, $4); + RELOMOVE(rel_2, relonami); + } + | expr '(' AREG ',' reg sizedef ')' + { exp_2 = $1; ea6x($3, $5, $6); + RELOMOVE(rel_2, relonami); + } + | expr '(' PC ')' + { exp_2 = $1; ea72(); + RELOMOVE(rel_2, relonami); + } + | expr '(' PC ',' reg sizedef ')' + { exp_2 = $1; ea73($5, $6); + RELOMOVE(rel_2, relonami); + } + ; +imm : '#' expr + { mrg_2 = 074; exp_2 = $2; + RELOMOVE(rel_2, relonami); + } + ; +reg : DREG + | AREG + { $$ = $1 | 010;} + ; +sizedef : /* empty */ + { $$ = SIZE_DEF;} + | SIZE + ; +sizenon : /* empty */ + { $$ = SIZE_NON;} + | SIZE + ; +ea_ea : ea ',' + { mrg_1 = mrg_2; exp_1 = exp_2; + RELOMOVE(rel_1, rel_2); + } + ea + ; diff --git a/mach/m68k2/as/mach5.c b/mach/m68k2/as/mach5.c new file mode 100644 index 000000000..bec9624a3 --- /dev/null +++ b/mach/m68k2/as/mach5.c @@ -0,0 +1,460 @@ +/* @(#)mach5.c 1.16 */ +/* + * Motorola 68000/68010 auxiliary functions + */ + +ea_1(sz, bits) +{ + register flag; + + if (mrg_1 > 074) + serror("no specials"); + if ((flag = eamode[mrg_1>>3]) == 0) + if ((flag = eamode[010 + (mrg_1&07)]) == 0) + flag = eamode[015 + (sz>>6)]; + if ((mrg_1 & 070) == 010) + checksize(sz, 2|4); + bits &= ~flag; + if (bits) + serror("bad addressing categorie"); + if (flag & FITW) + if ( + ! fitw(exp_1.val) + && + (mrg_1 != 074 || ! fit16(exp_1.val)) + ) + nofit(); + if (flag & FITB) { + if ( + ! fitb(exp_1.val) + && + (mrg_1 != 074 || ! fit8(exp_1.val)) + ) + nofit(); + if (mrg_1 == 074) + exp_1.val &= 0xFF; + } +#ifdef RELOCATION + RELOMOVE(relonami, rel_1); + if (flag & ~0xFF) +#ifdef DUK + newrelo(exp_1.typ, (flag>>8) | RELBR | RELWR); +#else DUK + newrelo(exp_1.typ, flag>>8); +#endif DUK +#endif + if (flag & PUTL) + emit4(exp_1.val); + if (flag & PUTW) + emit2(loww(exp_1.val)); +} + +ea_2(sz, bits) +{ + mrg_1 = mrg_2; + exp_1 = exp_2; + RELOMOVE(rel_1, rel_2); + ea_1(sz, bits); +} + +index(hibyte) +{ + fit(fitb(exp_2.val)); + exp_2.val = hibyte | lowb(exp_2.val); +} + +checksize(sz, bits) +{ + if ((bits & (1 << (sz>>6))) == 0) + serror("bad size"); +} + +test68010() +{ + if (model != 1) + warning("68010 instruction"); +} + +badoperand() +{ + serror("bad operands"); +} + +shift_op(opc, sz) +{ + if (mrg_1 < 010 && mrg_2 < 010) { + emit2((opc&0170470) | sz | mrg_1<<9 | mrg_2); + return; + } + if (exp_1.typ != S_ABS || mrg_1 != 074) { + badoperand(); + return; + } + if (mrg_2 < 010) { + fit(fit3(exp_1.val)); + emit2((opc&0170430) | sz | low3(exp_1.val)<<9 | mrg_2); + return; + } + checksize(sz, 2); + fit(exp_1.val == 1); + emit2((opc&0177700) | mrg_2); + ea_2(SIZE_W, MEM|ALT); +} + +bitop(opc) +{ + register bits; + + bits = DTA|ALT; + if (opc == 0 && (mrg_1 < 010 || mrg_2 != 074)) + bits = DTA; + if (mrg_1 < 010) { + emit2(opc | 0400 | mrg_1<<9 | mrg_2); + ea_2(0, bits); + return; + } + if (mrg_1 == 074) { + emit2(opc | 04000 | mrg_2); + ea_1(SIZE_W, 0); + ea_2(0, bits); + return; + } + badoperand(); +} + +add(opc, sz) +{ + if ((mrg_2 & 070) == 010) + checksize(sz, 2|4); + if ( + mrg_1 == 074 + && + small( + exp_1.typ==S_ABS && fit3(exp_1.val), + sz==SIZE_L ? 4 : 2 + ) + ) { + emit2((opc&0400) | 050000 | low3(exp_1.val)<<9 | sz | mrg_2); + ea_2(sz, ALT); + return; + } + if (mrg_1 == 074 && (mrg_2 & 070) != 010) { + emit2((opc&03000) | sz | mrg_2); + ea_1(sz, 0); + ea_2(sz, DTA|ALT); + return; + } + if ((mrg_2 & 070) == 010) { + emit2((opc&0170300) | (mrg_2&7)<<9 | sz<<1 | mrg_1); + ea_1(sz, 0); + return; + } + if (to_dreg(opc, sz, 0)) + return; + if (from_dreg(opc, sz, ALT|MEM)) + return; + badoperand(); +} + +and(opc, sz) +{ + if (mrg_1 == 074 && mrg_2 >= 076) { /* ccr or sr */ + if (sz != SIZE_NON) + checksize(sz, mrg_2==076 ? 1 : 2); + else + sz = (mrg_2==076 ? SIZE_B : SIZE_W); + emit2((opc&07400) | sz | 074); + ea_1(sz, 0); + return; + } + if (sz == SIZE_NON) + sz = SIZE_DEF; + if (mrg_1 == 074) { + emit2((opc&07400) | sz | mrg_2); + ea_1(sz, 0); + ea_2(sz, DTA|ALT); + return; + } + if ((opc & 010000) == 0 && to_dreg(opc, sz, DTA)) + return; + if (from_dreg(opc, sz, (opc & 010000) ? DTA|ALT : ALT|MEM)) + return; + badoperand(); +} + +to_dreg(opc, sz, bits) +{ + if ((mrg_2 & 070) != 000) + return(0); + emit2((opc & 0170000) | sz | (mrg_2&7)<<9 | mrg_1); + ea_1(sz, bits); + return(1); +} + +from_dreg(opc, sz, bits) +{ + if ((mrg_1 & 070) != 000) + return(0); + emit2((opc & 0170000) | sz | (mrg_1&7)<<9 | 0400 | mrg_2); + ea_2(sz, bits); + return(1); +} + +cmp(sz) +{ + register opc; + + if ((mrg_1&070) == 030 && (mrg_2&070) == 030) { + emit2(0130410 | sz | (mrg_1&7) | (mrg_2&7)<<9); + return; + } + if (mrg_1 == 074 && (mrg_2 & 070) != 010) { + emit2(06000 | sz | mrg_2); + ea_1(sz, 0); + ea_2(sz, DTA|ALT); + return; + } + if (mrg_2 < 020) { + if (mrg_2 >= 010) { + checksize(sz, 2|4); + opc = 0130300 | sz<<1; + mrg_2 &= 7; + } else + opc = 0130000 | sz; + emit2(opc | mrg_2<<9 | mrg_1); + ea_1(sz, 0); + return; + } + badoperand(); +} + +move(sz) +{ + register opc; + + if (mrg_1 > 074 || mrg_2 > 074) { + move_special(sz); + return; + } + if (sz == SIZE_NON) + sz = SIZE_DEF; + if ( + mrg_2<010 + && + mrg_1==074 + && + sz==SIZE_L + && + small(exp_1.typ==S_ABS && fitb(exp_1.val), 4) + ) { + emit2(070000 | mrg_2<<9 | lowb(exp_1.val)); + return; + } + switch (sz) { + case SIZE_B: opc = 010000; break; + case SIZE_W: opc = 030000; break; + case SIZE_L: opc = 020000; break; + } + emit2(opc | mrg_1 | (mrg_2&7)<<9 | (mrg_2&070)<<3); + ea_1(sz, 0); + ea_2(sz, ALT); +} + +move_special(sz) +{ + if (mrg_2 >= 076) { + if (sz != SIZE_NON) + checksize(sz, 2); + emit2(042300 | (mrg_2==076?0:01000) | mrg_1); + ea_1(SIZE_W, DTA); + return; + } + if (mrg_1 >= 076) { + if (mrg_1 == 076) + test68010(); + if (sz != SIZE_NON) + checksize(sz, 2); + emit2(040300 | (mrg_1==076?01000:0) | mrg_2); + ea_2(SIZE_W, DTA|ALT); + return; + } + if (sz != SIZE_NON) + checksize(sz, 4); + if (mrg_1==075 && (mrg_2&070)==010) { + emit2(047150 | (mrg_2&7)); + return; + } + if (mrg_2==075 && (mrg_1&070)==010) { + emit2(047140 | (mrg_1&7)); + return; + } + badoperand(); +} + +movem(dr, sz, regs) +{ + register i; + register r; + + if ((mrg_2>>3) == 04) { + r = regs; regs = 0; + for (i = 0; i < 16; i++) { + regs <<= 1; + if (r & 1) + regs++; + r >>= 1; + } + } + checksize(sz, 2|4); + if ((mrg_2>>3)-3 == dr) + badoperand(); + emit2(044200 | dr<<10 | (sz & 0200) >> 1 | mrg_2); + emit2(regs); + i = CTR; + if (dr == 0 && (mrg_2&070) == 040) + i = MEM; + if (dr != 0 && (mrg_2&070) == 030) + i = MEM; + if (dr == 0) + i |= ALT; + ea_2(sz, i); +} + +movep(sz) +{ + checksize(sz, 2|4); + if (mrg_1<010 && (mrg_2&070)==050) { + emit2(0610 | (sz & 0200)>>1 | mrg_1<<9 | (mrg_2&7)); + ea_2(sz, 0); + return; + } + if (mrg_2<010 && (mrg_1&070)==050) { + emit2(0410 | (sz & 0200)>>1 | mrg_2<<9 | (mrg_1&7)); + ea_1(sz, 0); + return; + } + badoperand(); +} + +branch(opc, exp) +expr_t exp; +{ + register sm; + + exp.val -= (DOTVAL + 2); + if ((pass == PASS_2) + && + (exp.val > 0) + && + ((exp.typ & S_DOT) == 0) + ) + exp.val -= DOTGAIN; + sm = fitb(exp.val); + if ((exp.typ & ~S_DOT) != DOTTYP) + sm = 0; + if (small(sm,2)) { + if (exp.val == 0) + emit2(047161); /* NOP */ + else + emit2(opc | lowb(exp.val)); + } else { + fit(fitw(exp.val)); + emit2(opc); +#ifdef RELOCATION +#ifdef DUK + newrelo(exp.typ, RELPC|RELO2|RELBR|RELWR); +#else DUK + newrelo(exp.typ, RELPC|RELO2); +#endif DUK +#endif + emit2(loww(exp.val)); + } +} + +ea5x73(rg, sz) +{ + if ((exp_2.typ & ~S_DOT) == DOTTYP) { + /* pc relative with index */ + if (sz == SIZE_NON) + sz = SIZE_DEF; + exp_2.val -= (DOTVAL + 2); + mrg_2 = 073; + checksize(sz, 2|4); + index(rg<<12 | (sz&0200)<<4); + return; + } + /* displacement */ + mrg_2 = 050 | rg; + if (pass == PASS_1) /* tricky, maybe 073 in next passes */ + return; + if ((rg & 010) == 0 || sz != SIZE_NON) + badoperand(); +} + +ea707172(sz) +{ + register sm; + + mrg_2 = 071; + switch (sz) { + case SIZE_B: + badoperand(); + case SIZE_W: + mrg_2 = 070; + case SIZE_L: + return; + case SIZE_NON: + break; + } + if (pass == PASS_1) { + /* + * reserve a bit in the bittable + * in the following passes one call to small() + * will be done, but we don't know which one + * since exp_2.typ cannot be trusted + */ + small(0, 2); + return; + } + if ((exp_2.typ & ~S_DOT) == DOTTYP) { + sm = fitw(exp_2.val-(DOTVAL+2)); + sm = small(sm, 2); + if (sm) { /* pc relative */ + exp_2.val -= (DOTVAL+2); + mrg_2 = 072; + } + } else { + sm = fitw(exp_2.val); +#ifdef ASLD + if (exp_2.typ & S_VAR) + sm = 0; +#else + if (exp_2.typ != S_ABS) + sm = 0; +#endif ASLD + sm = small(sm, 2); + if (sm) + mrg_2 = 070; + } +} + +ea6x(rg, ir, sz) +{ + mrg_2 = 060 | rg; + checksize(sz, 2|4); + index(ir<<12 | (sz&0200)<<4); +} + +ea72() +{ + mrg_2 = 072; + exp_2.val -= (DOTVAL + 2); +} + +ea73(ri, sz) +{ + mrg_2 = 073; + exp_2.val -= (DOTVAL + 2); + checksize(sz, 2|4); + index(ri<<12 | (sz&0200)<<4); +} diff --git a/mach/ns/as/Makefile b/mach/ns/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/ns/as/Makefile +++ b/mach/ns/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/pdp/as/Makefile b/mach/pdp/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/pdp/as/Makefile +++ b/mach/pdp/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/proto/as/Makefile b/mach/proto/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/proto/as/Makefile +++ b/mach/proto/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/s2650/as/Makefile b/mach/s2650/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/s2650/as/Makefile +++ b/mach/s2650/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/vax4/as/Makefile b/mach/vax4/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/vax4/as/Makefile +++ b/mach/vax4/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/z80/as/Makefile b/mach/z80/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/z80/as/Makefile +++ b/mach/z80/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/mach/z8000/as/Makefile b/mach/z8000/as/Makefile index 012b03822..695d2b20e 100644 --- a/mach/z8000/as/Makefile +++ b/mach/z8000/as/Makefile @@ -6,14 +6,14 @@ CPP = $(EM)/lib/cpp DEF = FFLAG = -CFLAGS = $(FFLAG) -O -I$h $(DEF) +CFLAGS = $(FFLAG) -O -I. -I$h $(DEF) YFLAGS = -d LDFLAGS = $(FFLAG) -i CSRC = $(CDIR)/comm3.c $(CDIR)/comm4.c $(CDIR)/comm5.c \ $(CDIR)/comm6.c $(CDIR)/comm7.c $(CDIR)/comm8.c -COBJ = $(CDIR)/comm3.o $(CDIR)/comm4.o $(CDIR)/comm5.o \ - $(CDIR)/comm6.o $(CDIR)/comm7.o $(CDIR)/comm8.o +COBJ = comm3.o comm4.o comm5.o \ + comm6.o comm7.o comm8.o MACH = mach0.c mach1.c mach2.c mach3.c mach4.c mach5.c COMM = $(CDIR)/comm0.h $(CDIR)/comm1.h $(CDIR)/comm2.y $(CSRC) @@ -37,7 +37,7 @@ as: $(COBJ) as.o $(CC) $(LDFLAGS) $(COBJ) as.o -o as as.y: $(CDIR)/comm2.y - $(CPP) -P -I$h $(DEF) $(CDIR)/comm2.y >as.y + $(CPP) -P -I. -I$h $(DEF) $(CDIR)/comm2.y >as.y @echo "expect 1 shift/reduce conflict" lint: $(CSRC) as.c @@ -51,3 +51,15 @@ as.y: mach2.c comm3.o: mach3.c as.y: mach4.c comm8.o: mach5.c +comm3.o: $(CDIR)/comm3.c + $(CC) -c $(CFLAGS) $(CDIR)/comm3.c +comm4.o: $(CDIR)/comm4.c + $(CC) -c $(CFLAGS) $(CDIR)/comm4.c +comm5.o: $(CDIR)/comm5.c + $(CC) -c $(CFLAGS) $(CDIR)/comm5.c +comm6.o: $(CDIR)/comm6.c + $(CC) -c $(CFLAGS) $(CDIR)/comm6.c +comm7.o: $(CDIR)/comm7.c + $(CC) -c $(CFLAGS) $(CDIR)/comm7.c +comm8.o: $(CDIR)/comm8.c + $(CC) -c $(CFLAGS) $(CDIR)/comm8.c diff --git a/util/led/READ_ME b/util/led/READ_ME new file mode 100644 index 000000000..e612fa34b --- /dev/null +++ b/util/led/READ_ME @@ -0,0 +1,600 @@ +You may want to change mach.c in this directory. + +Archives MUST have a table of contents. Arch in subdirectory arch +automatically makes one when you change an archive. + +Several changes in the assembler were needed to have it generate the +necessary output. +A contextual diff follows. You can apply them as follows: +patch -d /usr/em/philips/mach/68000/as < READ_ME + +*** comm0.h.old Thu Dec 6 16:18:39 1984 +--- comm0.h Thu Dec 6 17:49:51 1984 +*************** +*** 213,218 + + /* + * extra type bits out of S_ETC, internal use only + * S_COM: + * - symbols declared by .comm + * S_VAR: + +--- 213,219 ----- + + /* + * extra type bits out of S_ETC, internal use only ++ #ifndef DUK + * S_COM: + * - symbols declared by .comm + #endif DUK +*************** +*** 215,220 + * extra type bits out of S_ETC, internal use only + * S_COM: + * - symbols declared by .comm + * S_VAR: + * - type not known at end of PASS_1 (S_VAR|S_UND) + * - value not known at end of PASS_2 (S_VAR|S_ABS) + +--- 216,222 ----- + #ifndef DUK + * S_COM: + * - symbols declared by .comm ++ #endif DUK + * S_VAR: + * - type not known at end of PASS_1 (S_VAR|S_UND) + * - value not known at end of PASS_2 (S_VAR|S_ABS) +*************** +*** 221,226 + * S_DOT: + * - dot expression + */ + #define S_COM 0x0100 + #define S_VAR 0x0200 + #define S_DOT 0x0400 + +--- 223,229 ----- + * S_DOT: + * - dot expression + */ ++ #ifndef DUK + #define S_COM 0x0100 + #endif DUK + #define S_VAR 0x0200 +*************** +*** 222,227 + * - dot expression + */ + #define S_COM 0x0100 + #define S_VAR 0x0200 + #define S_DOT 0x0400 + /* should be tested by preprocessor + +--- 225,231 ----- + */ + #ifndef DUK + #define S_COM 0x0100 ++ #endif DUK + #define S_VAR 0x0200 + #define S_DOT 0x0400 + /* should be tested by preprocessor +*** comm2.y.old Thu Dec 6 16:19:07 1984 +--- comm2.y Thu Dec 6 16:02:19 1984 +*************** +*** 229,234 + { + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($1.typ, (int)$0); + #endif + emitx($1.val, (int)$0); + +--- 229,239 ----- + { + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) ++ #ifdef DUK ++ newrelo($1.typ, ++ (int)$0 | RELBR | RELWR ++ ); ++ #else DUK + newrelo($1.typ, (int)$0); + #endif DUK + #endif +*************** +*** 230,235 + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($1.typ, (int)$0); + #endif + emitx($1.val, (int)$0); + } + +--- 235,241 ----- + ); + #else DUK + newrelo($1.typ, (int)$0); ++ #endif DUK + #endif + emitx($1.val, (int)$0); + } +*************** +*** 237,242 + { + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($3.typ, (int)$0); + #endif + emitx($3.val, (int)$0); + +--- 243,253 ----- + { + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) ++ #ifdef DUK ++ newrelo($3.typ, ++ (int)$0 | RELBR | RELWR ++ ); ++ #else DUK + newrelo($3.typ, (int)$0); + #endif DUK + #endif +*************** +*** 238,243 + #ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($3.typ, (int)$0); + #endif + emitx($3.val, (int)$0); + } + +--- 249,255 ----- + ); + #else DUK + newrelo($3.typ, (int)$0); ++ #endif DUK + #endif + emitx($3.val, (int)$0); + } +*** comm3.c.old Wed Jul 11 09:22:24 1984 +--- comm3.c Fri Dec 7 13:06:26 1984 +*************** +*** 11,16 + + struct outhead outhead = { + O_MAGIC, O_STAMP, 0 + #ifdef BYTES_REVERSED + | HF_BREV + #endif + +--- 11,17 ----- + + struct outhead outhead = { + O_MAGIC, O_STAMP, 0 ++ #ifndef DUK + #ifdef BYTES_REVERSED + | HF_BREV + #endif +*************** +*** 17,22 + #ifdef WORDS_REVERSED + | HF_WREV + #endif + }; + + #include "y.tab.h" + +--- 18,24 ----- + #ifdef WORDS_REVERSED + | HF_WREV + #endif ++ #endif DUK + }; + + #include "y.tab.h" +*** comm5.c.old Thu Dec 6 16:19:40 1984 +--- comm5.c Thu Oct 11 14:03:27 1984 +*************** +*** 162,167 + #endif + case STRING: + p = stringbuf; + *p++ = n = getc(tempfile); break; + case OP_EQ: + case OP_NE: + +--- 162,172 ----- + #endif + case STRING: + p = stringbuf; ++ #ifdef DUK ++ *p++ = n = getc(tempfile); ++ p[n] = '\0'; ++ break; ++ #else DUK + *p++ = n = getc(tempfile); break; + #endif DUK + case OP_EQ: +*************** +*** 163,168 + case STRING: + p = stringbuf; + *p++ = n = getc(tempfile); break; + case OP_EQ: + case OP_NE: + case OP_LE: + +--- 168,174 ----- + break; + #else DUK + *p++ = n = getc(tempfile); break; ++ #endif DUK + case OP_EQ: + case OP_NE: + case OP_LE: +*************** +*** 354,359 + break; + if (c == '\\') + c = inescape(); + if (p >= &stringbuf[STRINGMAX]) + fatal("string buffer overflow"); + *p++ = c; + +--- 360,368 ----- + break; + if (c == '\\') + c = inescape(); ++ #ifdef DUK ++ if (p >= &stringbuf[STRINGMAX - 1]) ++ #else DUK + if (p >= &stringbuf[STRINGMAX]) + #endif DUK + fatal("string buffer overflow"); +*************** +*** 355,360 + if (c == '\\') + c = inescape(); + if (p >= &stringbuf[STRINGMAX]) + fatal("string buffer overflow"); + *p++ = c; + } + +--- 364,370 ----- + if (p >= &stringbuf[STRINGMAX - 1]) + #else DUK + if (p >= &stringbuf[STRINGMAX]) ++ #endif DUK + fatal("string buffer overflow"); + *p++ = c; + } +*************** +*** 359,364 + *p++ = c; + } + stringbuf[0] = p - stringbuf - 1; + return(STRING); + } + + +--- 369,377 ----- + *p++ = c; + } + stringbuf[0] = p - stringbuf - 1; ++ #ifdef DUK ++ *p = '\0'; ++ #endif DUK + return(STRING); + } + +*** comm6.c.old Thu Dec 6 16:20:22 1984 +--- comm6.c Wed Oct 3 15:59:31 1984 +*************** +*** 106,111 + sp = §[typ - S_MIN]; + sp->s_item = ip; + sp->s_lign = ALIGNSECT; + ip->i_type = typ | S_EXT; + ip->i_valu = 0; + } else if (typ >= S_MIN) { + +--- 106,114 ----- + sp = §[typ - S_MIN]; + sp->s_item = ip; + sp->s_lign = ALIGNSECT; ++ #ifdef DUK ++ ip->i_type = typ; ++ #else DUK + ip->i_type = typ | S_EXT; + #endif DUK + ip->i_valu = 0; +*************** +*** 107,112 + sp->s_item = ip; + sp->s_lign = ALIGNSECT; + ip->i_type = typ | S_EXT; + ip->i_valu = 0; + } else if (typ >= S_MIN) { + sp = §[typ - S_MIN]; + +--- 110,116 ----- + ip->i_type = typ; + #else DUK + ip->i_type = typ | S_EXT; ++ #endif DUK + ip->i_valu = 0; + } else if (typ >= S_MIN) { + sp = §[typ - S_MIN]; +*************** +*** 180,185 + * for possible relocation + */ + ip->i_valu = outhead.oh_nname; + newsymb(ip->i_name, S_EXT|DOTTYP, (short)0, val); + #endif + } + +--- 184,192 ----- + * for possible relocation + */ + ip->i_valu = outhead.oh_nname; ++ #ifdef DUK ++ newsymb(ip->i_name, S_COM|S_EXT|DOTTYP, (short)0, val); ++ #else DUK + newsymb(ip->i_name, S_EXT|DOTTYP, (short)0, val); + #endif DUK + #endif +*************** +*** 181,186 + */ + ip->i_valu = outhead.oh_nname; + newsymb(ip->i_name, S_EXT|DOTTYP, (short)0, val); + #endif + } + + +--- 188,194 ----- + newsymb(ip->i_name, S_COM|S_EXT|DOTTYP, (short)0, val); + #else DUK + newsymb(ip->i_name, S_EXT|DOTTYP, (short)0, val); ++ #endif DUK + #endif + } + +*************** +*** 255,260 + short s; + { + struct outrelo outrelo; + + if (rflag == 0) + return; + +--- 263,271 ----- + short s; + { + struct outrelo outrelo; ++ #ifdef DUK ++ int iscomm; ++ #endif DUK + + if (rflag == 0) + return; +*************** +*** 272,277 + * b=a + * a: .data2 0 + */ + s &= ~S_COM; + if ((n & RELPC) == 0 && s == S_ABS) + return; + +--- 283,291 ----- + * b=a + * a: .data2 0 + */ ++ #ifdef DUK ++ iscomm = s & S_COM; ++ #endif DUK + s &= ~S_COM; + if ((n & RELPC) == 0 && s == S_ABS) + return; +*************** +*** 285,290 + outrelo.or_type = (char)n; + outrelo.or_sect = (char)DOTTYP; + #ifndef ASLD + if (s == S_UND) { + assert(relonami != 0); + outrelo.or_nami = relonami-1; + +--- 299,307 ----- + outrelo.or_type = (char)n; + outrelo.or_sect = (char)DOTTYP; + #ifndef ASLD ++ #ifdef DUK ++ if (s == S_UND || iscomm) { ++ #else DUK + if (s == S_UND) { + #endif DUK + assert(relonami != 0); +*************** +*** 286,291 + outrelo.or_sect = (char)DOTTYP; + #ifndef ASLD + if (s == S_UND) { + assert(relonami != 0); + outrelo.or_nami = relonami-1; + relonami = 0; + +--- 303,309 ----- + if (s == S_UND || iscomm) { + #else DUK + if (s == S_UND) { ++ #endif DUK + assert(relonami != 0); + outrelo.or_nami = relonami-1; + relonami = 0; +*** comm7.c.old Thu Dec 6 16:20:50 1984 +--- comm7.c Wed Oct 3 16:35:31 1984 +*************** +*** 19,24 + return(ip->i_valu); + return(ip->i_valu + sect[typ].s_base); + #else + if ((ip->i_type & S_TYP) == S_UND) { + if (pass == PASS_3) { + if (relonami != 0) + +--- 19,27 ----- + return(ip->i_valu); + return(ip->i_valu + sect[typ].s_base); + #else ++ #ifdef DUK ++ if ((ip->i_type & S_TYP) == S_UND || (ip->i_type & S_COM)) { ++ #else DUK + if ((ip->i_type & S_TYP) == S_UND) { + #endif DUK + if (pass == PASS_3) { +*************** +*** 20,25 + return(ip->i_valu + sect[typ].s_base); + #else + if ((ip->i_type & S_TYP) == S_UND) { + if (pass == PASS_3) { + if (relonami != 0) + serror("relocation error"); + +--- 23,29 ----- + if ((ip->i_type & S_TYP) == S_UND || (ip->i_type & S_COM)) { + #else DUK + if ((ip->i_type & S_TYP) == S_UND) { ++ #endif DUK + if (pass == PASS_3) { + if (relonami != 0) + serror("relocation error"); +*** mach0.c.old Thu Dec 6 16:21:11 1984 +--- mach0.c Fri Sep 14 14:15:54 1984 +*************** +*** 1,3 + /* @(#)mach0.c 1.5 */ + /* + * Motorola 68000/68010 options + +--- 1,4 ----- ++ #define DUK + /* @(#)mach0.c 1.5 */ + /* + * Motorola 68000/68010 options +*** mach4.c.old Thu Dec 6 16:21:30 1984 +--- mach4.c Thu Dec 6 16:05:00 1984 +*************** +*** 21,26 + fit(fitw($4.val)); + emit2($1 | $2); + #ifdef RELOCATION + newrelo($4.typ, RELPC|RELO2); + #endif + emit2(loww($4.val)); + +--- 21,29 ----- + fit(fitw($4.val)); + emit2($1 | $2); + #ifdef RELOCATION ++ #ifdef DUK ++ newrelo($4.typ, RELPC|RELO2|RELBR|RELWR); ++ #else DUK + newrelo($4.typ, RELPC|RELO2); + #endif DUK + #endif +*************** +*** 22,27 + emit2($1 | $2); + #ifdef RELOCATION + newrelo($4.typ, RELPC|RELO2); + #endif + emit2(loww($4.val)); + } + +--- 25,31 ----- + newrelo($4.typ, RELPC|RELO2|RELBR|RELWR); + #else DUK + newrelo($4.typ, RELPC|RELO2); ++ #endif DUK + #endif + emit2(loww($4.val)); + } +*** mach5.c.old Thu Dec 6 16:21:54 1984 +--- mach5.c Thu Dec 6 16:07:05 1984 +*************** +*** 37,42 + #ifdef RELOCATION + RELOMOVE(relonami, rel_1); + if (flag & ~0xFF) + newrelo(exp_1.typ, flag>>8); + #endif + if (flag & PUTL) + +--- 37,45 ----- + #ifdef RELOCATION + RELOMOVE(relonami, rel_1); + if (flag & ~0xFF) ++ #ifdef DUK ++ newrelo(exp_1.typ, (flag>>8) | RELBR | RELWR); ++ #else DUK + newrelo(exp_1.typ, flag>>8); + #endif DUK + #endif +*************** +*** 38,43 + RELOMOVE(relonami, rel_1); + if (flag & ~0xFF) + newrelo(exp_1.typ, flag>>8); + #endif + if (flag & PUTL) + emit4(exp_1.val); + +--- 41,47 ----- + newrelo(exp_1.typ, (flag>>8) | RELBR | RELWR); + #else DUK + newrelo(exp_1.typ, flag>>8); ++ #endif DUK + #endif + if (flag & PUTL) + emit4(exp_1.val); +*************** +*** 357,362 + fit(fitw(exp.val)); + emit2(opc); + #ifdef RELOCATION + newrelo(exp.typ, RELPC|RELO2); + #endif + emit2(loww(exp.val)); + +--- 361,369 ----- + fit(fitw(exp.val)); + emit2(opc); + #ifdef RELOCATION ++ #ifdef DUK ++ newrelo(exp.typ, RELPC|RELO2|RELBR|RELWR); ++ #else DUK + newrelo(exp.typ, RELPC|RELO2); + #endif DUK + #endif +*************** +*** 358,363 + emit2(opc); + #ifdef RELOCATION + newrelo(exp.typ, RELPC|RELO2); + #endif + emit2(loww(exp.val)); + } + +--- 365,371 ----- + newrelo(exp.typ, RELPC|RELO2|RELBR|RELWR); + #else DUK + newrelo(exp.typ, RELPC|RELO2); ++ #endif DUK + #endif + emit2(loww(exp.val)); + } diff --git a/util/led/WRONG b/util/led/WRONG new file mode 100644 index 000000000..1c3a17b4f --- /dev/null +++ b/util/led/WRONG @@ -0,0 +1,72 @@ +This file contains a summary of the bugs/features/inconsistencies +Robbert and Ed found while making the linker usable for the 68000 and amoeba. + +There is something wrong with the way the combination of +assembler and linker handle bss. +In the original (Duk's) the assembler translated .space and, worse, .align +to a sequence of zero's. If this sequence was at the end of a segment +within a module the assembler didn't put zero in the segment but sets +os_flen to the amount of space initialized before the zero space +and os_size to the segements size. (os_size - os_flen) is then the +size of the space filled by zeroes. +For the sake of clarity, let us call 0...os_flen-1 initialized space +and os_flen..os_size-1 uninitialized space. +Now the linker, it does a nasty trick. It gathers the uninitialized space +of all modules within a segment and puts it consequtively at the end +of the segment. I think that I understand the reason: This way you can keep +your resultant a.out smaller and you don't need a special bss segment +(a la unix). But it is incorrect, the net effect is that the .align's +at the end of segments within a module do have the desired effect, +the space thus allocated is removed to 'higher spheres' thereby +leaving the first items of that segment in the inmediatly following +modules at unaligned boundaries. +What should be done is that the linker leaves the initialized and +the unitialized code alone and regards the whole a a chunk that can be +relocated. Only producing a difference of os_size and os_flen for +the zeroes at the very end of the segment. Thereby collapsing all +.space (and .align) commands into zero space only if they +are in consequtive modules at the end of the segment, with modules +NOT containing any initialized data. +I already, ad-hoc, changed the code of the assembler to producing 'hard' +zeroes when aligning. The trick could also be done for .space +but is a bit harder here. +The reason: .space is also used to allocate space in the BSS segment +if that produced zeroes in the a.out file (0..bss_size) we would +have a.out files that are far too large. +This feature of the linker also caused weird effects for names that +are defined as the very last in a section within a module, without +any data (initialized or uninitialezed) after it. +The names a regarded as pointing into the uninitialized space and +thus relocated to the end of the section. +The sequence + .sect .data +begdata: + .sect .... +in an head_em.s resulted in the relocation of begdata to the END +of the .data segment. + +Another problem form the commons: +1 - Local commons are not handled by led and not produced by as. + using .comm for unitialized data is not correct because (from C) + two uninitialized static declarations for the same name in + different modules will be handled as external commons and thus + be overlayed. +2 - The commons are allocated at the very end of the first pass, after the + initialezed data has been allocated in the segments. The order on which + the commons are allocated seems to be random. That way it is impossible + to produce a label that is guaranteed to point to the last byte (+1) + of a segment containing commons. + The currently used trick is to declare an extra segment after the + segment containing the commons. The first bytre in this segment + inmediatly follows the commons and can be used as _end or endbss. + +The archiver (aal) with the automatic ranlib is buggy. +The only thing that seems to work at the moment is creation of a fresh +archive. +replacing/adding/deleting modules is likely to produce libraries +with incorrect ranlib entries. +The major troublemaker seems to be the extra padding byte at the end +of odd sized modules. + +Led should return a non-zero value when it has found Undefined symbols +or has another reason for not being able to produce a correct output file. diff --git a/util/led/makedepend b/util/led/makedepend new file mode 100755 index 000000000..3726c27b3 --- /dev/null +++ b/util/led/makedepend @@ -0,0 +1,23 @@ +: 'Without arguments, this program clears the dependencies between' +: '.o files and included files in Makefile.' +: 'With arguments, it replaces the dependencies between the .o files' +: 'resulting from the argument files, and the included files in Makefile.' +: 'Makefile must contain a line with on it the pattern AUTOAUTOAUTO.' +: 'WARNING: a temporary file is created in the current directory.' +: 'It is however rather unlikely that this file already exists' +grep -s AUTOAUTOAUTO Makefile || { + echo "Makefile has wrong format." 1>&2 + exit 1 +} +for file do + ofile=`echo $file | sed 's/.$/o/'` + grep '^# *include.*"' $file | sed "s/.*\"\(.*\)\".*/$ofile: \1/" +done | sort -u > @@**##$$ +echo "Non-empty line." >> Makefile +ed - Makefile <<'!' +/AUTOAUTOAUTO/+,$d +w +q +! +cat @@**##$$ >> Makefile +rm -f @@**##$$ -- 2.34.1