From 05113a424129dc808ae21aae947b9b237e31d17f Mon Sep 17 00:00:00 2001 From: Neal Andrew Crook Date: Sun, 10 Jul 2016 18:21:22 +0100 Subject: [PATCH] rework setup so that delay loop can be removed. Good riddance. --- Kernel/platform-multicomp09/devsdc.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/Kernel/platform-multicomp09/devsdc.c b/Kernel/platform-multicomp09/devsdc.c index 29dd59fc..a330277a 100644 --- a/Kernel/platform-multicomp09/devsdc.c +++ b/Kernel/platform-multicomp09/devsdc.c @@ -69,22 +69,18 @@ uint8_t devsd_transfer_sector(void) while (sd_reg_ctl != SD_IDLE_STAT) { } - /* [NAC HACK 2016May11] should not need this but real hardware seems - to need something here even tho CUBIX FORTH NITROS9 FLEX all work - without it and with seemingly equivalent code - */ - for (i=0; i<1000; i++) { - tmp = sd_reg_ctl; - } - /* load up block address. It's stored as a 32-bit value but we ignore the MS byte because the SD controller only has a - 24-bit address range + 24-bit address range. + The hardware seems a bit fussy about having the addresses sent + in this order (lba0..lba2). With them send lba2 first, a + delay loop was needed between the sr_reg_ctl poll and the lba2 + write in order to work on real hardware. */ ptr=((uint8_t *)(&blk_op.lba))+1; - sd_reg_lba2 = ptr[0]; /* MS byte of 24-bit block address */ - sd_reg_lba1 = ptr[1]; sd_reg_lba0 = ptr[2]; + sd_reg_lba1 = ptr[1]; + sd_reg_lba2 = ptr[0]; /* MS byte of 24-bit block address */ /* send the command and set up the subroutine pointer */ -- 2.34.1