David Given [Mon, 31 Oct 2016 22:21:33 +0000 (23:21 +0100)]
Correctly mangle labels used in initialisers.
David Given [Mon, 31 Oct 2016 22:16:02 +0000 (23:16 +0100)]
Typo fix.
David Given [Mon, 31 Oct 2016 21:36:54 +0000 (22:36 +0100)]
Add, I hope, patterns for fmsub, fnmadd, and fnmsub (also float versions).
David Given [Mon, 31 Oct 2016 18:55:16 +0000 (19:55 +0100)]
Also use fmadd for single-precision floats.
David Given [Mon, 31 Oct 2016 18:52:17 +0000 (19:52 +0100)]
Use fmadd for multiply-and-add instructions.
David Given [Sun, 30 Oct 2016 15:51:06 +0000 (16:51 +0100)]
Fix a few c11isms.
David Given [Sun, 30 Oct 2016 14:59:44 +0000 (15:59 +0100)]
Merge from default.
David Given [Sun, 30 Oct 2016 14:59:04 +0000 (15:59 +0100)]
Merge pull request #7 from davidgiven/travis
Use built-in Lua rather than relying on a system one
David Given [Sun, 30 Oct 2016 14:53:26 +0000 (15:53 +0100)]
Merge from default.
David Given [Sun, 30 Oct 2016 14:49:39 +0000 (15:49 +0100)]
Don't allow parallel builds in the top-level makefile.
David Given [Sun, 30 Oct 2016 13:28:08 +0000 (14:28 +0100)]
Old versions of make don't support -r.
David Given [Sat, 29 Oct 2016 21:52:17 +0000 (23:52 +0200)]
Properly export symbols.
David Given [Sat, 29 Oct 2016 21:37:11 +0000 (23:37 +0200)]
Get top working with the PowerPC; use it to eliminate useless branches and
moves.
David Given [Sat, 29 Oct 2016 20:40:40 +0000 (22:40 +0200)]
Merge from default (merging in George Koehler's PowerPC changes).
David Given [Sat, 29 Oct 2016 18:22:44 +0000 (20:22 +0200)]
Add support for preserved registers.
David Given [Sat, 29 Oct 2016 11:32:09 +0000 (13:32 +0200)]
More opcodes.
David Given [Sat, 29 Oct 2016 10:55:34 +0000 (12:55 +0200)]
More opcodes.
David Given [Sat, 29 Oct 2016 10:55:21 +0000 (12:55 +0200)]
Emit negative constants correctly.
David Given [Sat, 29 Oct 2016 10:48:05 +0000 (12:48 +0200)]
More opcodes. sti can now cope with non-standard sizes (really need a better
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
David Given [Sat, 29 Oct 2016 10:00:33 +0000 (12:00 +0200)]
Actually, the locals need to go above the spills and saved regs, so fp == lb.
David Given [Sat, 29 Oct 2016 09:57:56 +0000 (11:57 +0200)]
Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
David Given [Sat, 29 Oct 2016 08:55:48 +0000 (10:55 +0200)]
Don't generate phis if unnecessary (because this breaks the
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
David Given [Thu, 27 Oct 2016 21:17:16 +0000 (23:17 +0200)]
Mangle label names (turns out that the ACK assembler can't really cope with
labels that are the same name as instructions...).
David Given [Thu, 27 Oct 2016 19:50:58 +0000 (21:50 +0200)]
Swaps work (at least for registers). More opcodes. Rearrange the stack layout
so we can always trivially find fp, which lets CHAINFP work.
David Given [Thu, 27 Oct 2016 19:48:46 +0000 (21:48 +0200)]
Allow emission of strings containing ".
David Given [Thu, 27 Oct 2016 19:40:25 +0000 (21:40 +0200)]
Fix bug where some phis weren't being inserted when a given variable definition
needed more than one phi (due to the dominance frontier containing more than
one basic block).
David Given [Tue, 25 Oct 2016 21:04:20 +0000 (23:04 +0200)]
Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
David Given [Mon, 24 Oct 2016 20:14:08 +0000 (22:14 +0200)]
Phi copies are now inserted as part of type inference. More opcodes.
David Given [Mon, 24 Oct 2016 18:15:22 +0000 (20:15 +0200)]
More opcodes.
David Given [Mon, 24 Oct 2016 10:08:40 +0000 (12:08 +0200)]
More opcodes.
David Given [Sun, 23 Oct 2016 20:24:08 +0000 (22:24 +0200)]
More opcodes, including the difficult and fairly stupid los/sts.
David Given [Sun, 23 Oct 2016 19:54:14 +0000 (21:54 +0200)]
Massive change to how IR types are handled; we use the type code for matching
rather than the size. Much cleaner and simpler.
David Given [Sat, 22 Oct 2016 21:04:13 +0000 (23:04 +0200)]
Re-re-add the type inference layer, now I know more about how things work.
Remove that terrible float promotion code.
David Given [Sat, 22 Oct 2016 18:32:51 +0000 (20:32 +0200)]
More opcodes.
David Given [Sat, 22 Oct 2016 10:13:57 +0000 (12:13 +0200)]
Remove GETRET; values are now returned directly by CALL. Fix a bug in
convertstackops which was resulting in duplicate IR groups.
David Given [Sat, 22 Oct 2016 09:26:28 +0000 (11:26 +0200)]
More opcodes.
David Given [Sat, 22 Oct 2016 08:48:22 +0000 (10:48 +0200)]
Hacky workaround the way the Modula-2 compiler generates non-standard sized
loads and saves. More opcodes; simplified table using macros.
David Given [Fri, 21 Oct 2016 22:48:55 +0000 (00:48 +0200)]
Typo fix.
David Given [Fri, 21 Oct 2016 22:48:26 +0000 (00:48 +0200)]
Better (and more correct) floating point conversions; fif; various new opcodes.
David Given [Fri, 21 Oct 2016 22:02:15 +0000 (00:02 +0200)]
fef4 and fef8 is now cleaner, albeit slower; add some more register alias
stuff.
David Given [Fri, 21 Oct 2016 21:31:00 +0000 (23:31 +0200)]
Add (pretty crummy) support for register aliases and static pairs of registers.
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
David Given [Thu, 20 Oct 2016 19:47:28 +0000 (21:47 +0200)]
Add parsing support for register aliases.
David Given [Wed, 19 Oct 2016 21:29:05 +0000 (23:29 +0200)]
Lots more opcodes; better eviction behaviour; better register moves. Lots more
PowerPC stuff (some working).
David Given [Wed, 19 Oct 2016 21:27:53 +0000 (23:27 +0200)]
Floating point promotion is less buggy.
David Given [Wed, 19 Oct 2016 18:39:10 +0000 (20:39 +0200)]
Merge pull request #6 from kernigh/pr-linuxppc
PowerPC fixes
George Koehler [Wed, 19 Oct 2016 01:16:47 +0000 (21:16 -0400)]
Remove f14 to f31 from FREG and FSREG.
This would have happened later, if f14 to f31 became regvar (like r13
to r31 are now). I am doing it now because ncg is too slow for rules
"with FREG FREG uses FREG". We use such rules for adf 8 and other EM
instructions that operate on 2 floats. Like my last commit
cfbc537,
this commit speeds ncg by removing choices for register allocation.
David Given [Tue, 18 Oct 2016 21:58:03 +0000 (23:58 +0200)]
Promote values accessed via NOP.
David Given [Tue, 18 Oct 2016 20:32:09 +0000 (22:32 +0200)]
'!' tracing is now always emitted; tracing goes to stderr.
David Given [Tue, 18 Oct 2016 20:29:42 +0000 (22:29 +0200)]
Add support for floating point constants.
George Koehler [Tue, 18 Oct 2016 00:31:59 +0000 (20:31 -0400)]
In powerpc ncg, add a speed hack for sti 8.
ncg is too slow with this many registers. A stack pattern "with GPR
GPR GPR" or "with REG REG REG" takes too long to pick registers,
causing ncg 8 to take about 2 seconds on each sti 8. I introduce
REG_PAIR and there are only 4 such pairs.
For programs that use sti 8 (including C programs that copy 8-byte
structs), this speed hack improves the ncg run from several seconds to
almost instantaneous.
Also add a few COMMENT(...) lines in stacking rules.
David Given [Mon, 17 Oct 2016 22:31:26 +0000 (00:31 +0200)]
Lots more opcodes.
David Given [Mon, 17 Oct 2016 22:21:32 +0000 (00:21 +0200)]
Add li and mr pseudoinstructions.
George Koehler [Mon, 17 Oct 2016 18:57:21 +0000 (14:57 -0400)]
Add costs to powerpc instructions.
Also show how andi., andis., or., set condition codes.
George Koehler [Mon, 17 Oct 2016 04:39:59 +0000 (00:39 -0400)]
Rewrite .fif8 to avoid powerpc64 fctid
This fixes the SIGILL (illegal instruction) in startrek when firing
phasers. The 32-bit processors in my PowerPC Mac and in QEMU don't
have fctid, a 64-bit instruction.
I got the idea from mach/proto/fp/fif8.c to extract the exponent,
clear some bits to get an integer, then subtract the integer from
the original value to get the fraction.
George Koehler [Sun, 16 Oct 2016 22:13:39 +0000 (18:13 -0400)]
Add "kills MEMORY" to powerpc sti rules.
Adjust some of the loi rules (and associated moves) so we can identify
the tokens that must be in MEMORY.
With this commit, I can navigate the Enterprise even if I comment out
my work-around from
e22c888.
David Given [Sun, 16 Oct 2016 22:06:06 +0000 (00:06 +0200)]
Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating
*some* code.
David Given [Sun, 16 Oct 2016 20:38:27 +0000 (22:38 +0200)]
Merge in the unfinished PowerPC branch.
David Given [Sun, 16 Oct 2016 20:37:42 +0000 (22:37 +0200)]
Implement saving of dirty registers onto the stack.
George Koehler [Sun, 16 Oct 2016 20:33:24 +0000 (16:33 -0400)]
Remove IND_LABEL_W and IND_LABEL_D
Because li32 always loads a label into a GPR, it is sufficient to
coerce LABEL to REG, then use IND_RC_W or IND_RC_D for indirection
through the label.
George Koehler [Sun, 16 Oct 2016 20:02:25 +0000 (16:02 -0400)]
Simplify moves to and from IND_RC_*
Now that SUM_RC always has a signed 16-bit constant, it happens that
the various IND_RC_* tokens also have a signed 16-bit constant, so
we no longer need to touch the scratch register.
David Given [Sun, 16 Oct 2016 18:10:24 +0000 (20:10 +0200)]
Don't need Lua any more.
David Given [Sun, 16 Oct 2016 18:09:52 +0000 (20:09 +0200)]
Remember to create the build directory when bootstrapping.
David Given [Sun, 16 Oct 2016 18:07:54 +0000 (20:07 +0200)]
Use a self-hosted Lua instead of the system one.
George Koehler [Sun, 16 Oct 2016 17:58:54 +0000 (13:58 -0400)]
Refactor how powerpc ncg pushes constants.
When loc (load constant) pushes a constant, it now checks the value of
the constant and pushes any of 7 tokens. These tokens allow stack
patterns to recognize 16-bit signed integers (CONST2), 16-bit unsigned
integers (UCONST2), multiples of 0x10000 (CONST_HZ), and other
interesting forms of constants.
Use the new constant tokens in the rules for adi, sbi, and, ior, xor.
Adjust a few other rules to understand the new tokens.
Require that SUM_RC has a signed 16-bit constant, and OR_RC and XOR_RC
each have an unsigned 16-bit constant. The moves from SUM_RC, OR_RC,
XOR_RC to GPR no longer touch the scratch register, because the
constant is not too big.
David Given [Sun, 16 Oct 2016 16:16:30 +0000 (18:16 +0200)]
Experiments with declarative apt and OSX.
David Given [Sun, 16 Oct 2016 15:58:01 +0000 (17:58 +0200)]
Add missing header that was causing builds to fail on Travis.
George Koehler [Sun, 16 Oct 2016 00:00:48 +0000 (20:00 -0400)]
Remove unused parts of mach/powerpc/ncg/table
Remove unused tokens GPRINDIRECTLO, HILABEL, LOLABEL, LABELI. Also
remove an #if 0 ... #endif group of patterns.
David Given [Sat, 15 Oct 2016 22:06:14 +0000 (00:06 +0200)]
Merge from trunk.
David Given [Sat, 15 Oct 2016 21:39:38 +0000 (23:39 +0200)]
Various bits of cleanup; we should almost be ready to try sending this to the
assembler soon...
David Given [Sat, 15 Oct 2016 21:34:54 +0000 (23:34 +0200)]
Oops, forgot to add the output option spec to the string!
David Given [Sat, 15 Oct 2016 21:33:30 +0000 (23:33 +0200)]
References to the stack frame are now rendered properly.
David Given [Sat, 15 Oct 2016 21:19:44 +0000 (23:19 +0200)]
Stop passing proc around, and use a global instead --- much cleaner.
David Given [Sat, 15 Oct 2016 20:53:56 +0000 (22:53 +0200)]
Register spilling to the stack frame works, more or less.
David Given [Sat, 15 Oct 2016 17:14:25 +0000 (19:14 +0200)]
Fix yet another bug to do with IR register outputs.
David Given [Sat, 15 Oct 2016 16:38:46 +0000 (18:38 +0200)]
Function termination gets routed through an exit block; we now have prologues
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
David Given [Sat, 15 Oct 2016 11:07:59 +0000 (13:07 +0200)]
Add a pile of new instructions used by Pascal; I'm going to need to think about
how locals and the local base are handled.
David Given [Sat, 15 Oct 2016 10:11:40 +0000 (12:11 +0200)]
Bytes were sometimes failing to be sign extended correctly.
David Given [Sat, 15 Oct 2016 09:42:47 +0000 (11:42 +0200)]
Allow asm names for registers which are different from the friendly names shown
in the tracing (because PowerPC register names are just numbers).
David Given [Sat, 15 Oct 2016 09:22:40 +0000 (11:22 +0200)]
Some more opcodes.
George Koehler [Sat, 15 Oct 2016 03:59:26 +0000 (23:59 -0400)]
In powerpc table, fix macros los() and his().
Change the operator in his() from a - minus to a + plus. When los(n)
becomes negative, then his(n) needs to add 0x10000, not subtract it.
Also change los(n) to do the sign extension, because smalls(los(n))
should be true, not false.
Also change hi(n) and lo(n) to wrap n in parentheses, as (n), because
these are macros and n might still contain operators.
David Given [Fri, 14 Oct 2016 23:15:08 +0000 (01:15 +0200)]
You can now mark a register as corrupting a certain register class; calls work,
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
David Given [Fri, 14 Oct 2016 21:19:25 +0000 (23:19 +0200)]
Log empty hops.
David Given [Fri, 14 Oct 2016 21:19:02 +0000 (23:19 +0200)]
Reworked loads and stores; it's now *different*, maybe not better.
David Given [Fri, 14 Oct 2016 21:17:06 +0000 (23:17 +0200)]
Factor out the register allocation routines to make them easier to deal with.
David Given [Fri, 14 Oct 2016 21:12:29 +0000 (23:12 +0200)]
Fix stupid issue where hop output registers were being overwritten, leading to
invalid SSA form.
David Given [Fri, 14 Oct 2016 20:17:02 +0000 (22:17 +0200)]
Output register equality constraints work.
David Given [Wed, 12 Oct 2016 21:12:53 +0000 (23:12 +0200)]
Make loads and stores in the table nicer; fix a place where it looked like it
was working but only accidentally.
David Given [Wed, 12 Oct 2016 20:58:46 +0000 (22:58 +0200)]
Keep track of register types as well as attributes --- the type being how we
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
David Given [Wed, 12 Oct 2016 19:50:12 +0000 (21:50 +0200)]
Add code to remove unused phis, converting to pruned SSA form, to avoid
confusing the register allocator later.
David Given [Tue, 11 Oct 2016 22:45:36 +0000 (00:45 +0200)]
Don't allow the same IR to be added to the sequence list more than once
(sometimes happens because op_dup, but makes no sense).
David Given [Tue, 11 Oct 2016 21:17:30 +0000 (23:17 +0200)]
Clean up the allocator a bit, in preparation for making it lots more
complicated; no semantic changes.
David Given [Mon, 10 Oct 2016 22:29:18 +0000 (00:29 +0200)]
A few more opcodes.
David Given [Mon, 10 Oct 2016 22:23:35 +0000 (00:23 +0200)]
A little fiddling with store instructions. The PowerPC is not friendly to
iburg.
David Given [Mon, 10 Oct 2016 22:12:11 +0000 (00:12 +0200)]
Refactored the way hops are rendered; add support for emitting code (although
with no prologue or epilogue yet).
David Given [Mon, 10 Oct 2016 21:19:46 +0000 (23:19 +0200)]
Register allocator now gets all the way through all of my test file without
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
David Given [Mon, 10 Oct 2016 21:18:37 +0000 (23:18 +0200)]
D'oh, need multiple passes over the edge splitter in order to properly find all
cases.
David Given [Sun, 9 Oct 2016 20:04:20 +0000 (22:04 +0200)]
Calculate phi congruency groups; use them to solve the
importing-hreg-from-the-future problem (probably poorly).
David Given [Sun, 9 Oct 2016 20:03:44 +0000 (22:03 +0200)]
Add pmap_remove().
David Given [Sun, 9 Oct 2016 13:09:34 +0000 (15:09 +0200)]
The register allocator now makes a spirited attempt to honour register
attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
David Given [Sun, 9 Oct 2016 13:08:03 +0000 (15:08 +0200)]
Floating point promotion was broken since the IR float change. Fix.