David Given [Sat, 29 Oct 2016 10:55:34 +0000 (12:55 +0200)]
More opcodes.
David Given [Sat, 29 Oct 2016 10:55:21 +0000 (12:55 +0200)]
Emit negative constants correctly.
David Given [Sat, 29 Oct 2016 10:48:05 +0000 (12:48 +0200)]
More opcodes. sti can now cope with non-standard sizes (really need a better
fix for this). Hack in crude support for mismatched stack pushes and pops (ints
vs longs).
David Given [Sat, 29 Oct 2016 10:00:33 +0000 (12:00 +0200)]
Actually, the locals need to go above the spills and saved regs, so fp == lb.
David Given [Sat, 29 Oct 2016 09:57:56 +0000 (11:57 +0200)]
Lots more opcodes. Rearrange the stack layout so that fp->ab is a fixed value
(needed for CHAINFP and FPTOAB). Wire up lfrs to calls via a phi when
necessary, to allow call-bra-lfr chains.
David Given [Sat, 29 Oct 2016 08:55:48 +0000 (10:55 +0200)]
Don't generate phis if unnecessary (because this breaks the
critical-edge-splitting guarantee and causes insertion of phi copies to fail).
David Given [Thu, 27 Oct 2016 21:17:16 +0000 (23:17 +0200)]
Mangle label names (turns out that the ACK assembler can't really cope with
labels that are the same name as instructions...).
David Given [Thu, 27 Oct 2016 19:50:58 +0000 (21:50 +0200)]
Swaps work (at least for registers). More opcodes. Rearrange the stack layout
so we can always trivially find fp, which lets CHAINFP work.
David Given [Thu, 27 Oct 2016 19:48:46 +0000 (21:48 +0200)]
Allow emission of strings containing ".
David Given [Thu, 27 Oct 2016 19:40:25 +0000 (21:40 +0200)]
Fix bug where some phis weren't being inserted when a given variable definition
needed more than one phi (due to the dominance frontier containing more than
one basic block).
David Given [Tue, 25 Oct 2016 21:04:20 +0000 (23:04 +0200)]
Remove the bytes1, bytes2, bytes4, bytes8 attributes; remove the concept of a
register 'type'; now use int/float/long/double throughout to identify
registers. Lots of register allocator tweaks and table bugfixes --- we now get
through the dreading Mathlib.mod!
David Given [Mon, 24 Oct 2016 20:14:08 +0000 (22:14 +0200)]
Phi copies are now inserted as part of type inference. More opcodes.
David Given [Mon, 24 Oct 2016 18:15:22 +0000 (20:15 +0200)]
More opcodes.
David Given [Mon, 24 Oct 2016 10:08:40 +0000 (12:08 +0200)]
More opcodes.
David Given [Sun, 23 Oct 2016 20:24:08 +0000 (22:24 +0200)]
More opcodes, including the difficult and fairly stupid los/sts.
David Given [Sun, 23 Oct 2016 19:54:14 +0000 (21:54 +0200)]
Massive change to how IR types are handled; we use the type code for matching
rather than the size. Much cleaner and simpler.
David Given [Sat, 22 Oct 2016 21:04:13 +0000 (23:04 +0200)]
Re-re-add the type inference layer, now I know more about how things work.
Remove that terrible float promotion code.
David Given [Sat, 22 Oct 2016 18:32:51 +0000 (20:32 +0200)]
More opcodes.
David Given [Sat, 22 Oct 2016 10:13:57 +0000 (12:13 +0200)]
Remove GETRET; values are now returned directly by CALL. Fix a bug in
convertstackops which was resulting in duplicate IR groups.
David Given [Sat, 22 Oct 2016 09:26:28 +0000 (11:26 +0200)]
More opcodes.
David Given [Sat, 22 Oct 2016 08:48:22 +0000 (10:48 +0200)]
Hacky workaround the way the Modula-2 compiler generates non-standard sized
loads and saves. More opcodes; simplified table using macros.
David Given [Fri, 21 Oct 2016 22:48:55 +0000 (00:48 +0200)]
Typo fix.
David Given [Fri, 21 Oct 2016 22:48:26 +0000 (00:48 +0200)]
Better (and more correct) floating point conversions; fif; various new opcodes.
David Given [Fri, 21 Oct 2016 22:02:15 +0000 (00:02 +0200)]
fef4 and fef8 is now cleaner, albeit slower; add some more register alias
stuff.
David Given [Fri, 21 Oct 2016 21:31:00 +0000 (23:31 +0200)]
Add (pretty crummy) support for register aliases and static pairs of registers.
We should have enough functionality now for rather buggy 8-bit ints and
doubles. Rework the table and the platform.c to match.
David Given [Thu, 20 Oct 2016 19:47:28 +0000 (21:47 +0200)]
Add parsing support for register aliases.
David Given [Wed, 19 Oct 2016 21:29:05 +0000 (23:29 +0200)]
Lots more opcodes; better eviction behaviour; better register moves. Lots more
PowerPC stuff (some working).
David Given [Wed, 19 Oct 2016 21:27:53 +0000 (23:27 +0200)]
Floating point promotion is less buggy.
David Given [Tue, 18 Oct 2016 21:58:03 +0000 (23:58 +0200)]
Promote values accessed via NOP.
David Given [Tue, 18 Oct 2016 20:32:09 +0000 (22:32 +0200)]
'!' tracing is now always emitted; tracing goes to stderr.
David Given [Tue, 18 Oct 2016 20:29:42 +0000 (22:29 +0200)]
Add support for floating point constants.
David Given [Mon, 17 Oct 2016 22:31:26 +0000 (00:31 +0200)]
Lots more opcodes.
David Given [Mon, 17 Oct 2016 22:21:32 +0000 (00:21 +0200)]
Add li and mr pseudoinstructions.
David Given [Sun, 16 Oct 2016 22:06:06 +0000 (00:06 +0200)]
Bolt mcg into the PowerPC backend. It doesn't build yet, but it is generating
*some* code.
David Given [Sun, 16 Oct 2016 20:38:27 +0000 (22:38 +0200)]
Merge in the unfinished PowerPC branch.
David Given [Sun, 16 Oct 2016 20:37:42 +0000 (22:37 +0200)]
Implement saving of dirty registers onto the stack.
David Given [Sun, 16 Oct 2016 15:58:01 +0000 (17:58 +0200)]
Add missing header that was causing builds to fail on Travis.
David Given [Sat, 15 Oct 2016 22:06:14 +0000 (00:06 +0200)]
Merge from trunk.
David Given [Sat, 15 Oct 2016 21:39:38 +0000 (23:39 +0200)]
Various bits of cleanup; we should almost be ready to try sending this to the
assembler soon...
David Given [Sat, 15 Oct 2016 21:34:54 +0000 (23:34 +0200)]
Oops, forgot to add the output option spec to the string!
David Given [Sat, 15 Oct 2016 21:33:30 +0000 (23:33 +0200)]
References to the stack frame are now rendered properly.
David Given [Sat, 15 Oct 2016 21:19:44 +0000 (23:19 +0200)]
Stop passing proc around, and use a global instead --- much cleaner.
David Given [Sat, 15 Oct 2016 20:53:56 +0000 (22:53 +0200)]
Register spilling to the stack frame works, more or less.
David Given [Sat, 15 Oct 2016 17:14:25 +0000 (19:14 +0200)]
Fix yet another bug to do with IR register outputs.
David Given [Sat, 15 Oct 2016 16:38:46 +0000 (18:38 +0200)]
Function termination gets routed through an exit block; we now have prologues
and epilogues. mcgg now exports some useful data as headers. Start factoring
out some of the architecture-specific bits into an architecture-specific file.
David Given [Sat, 15 Oct 2016 11:07:59 +0000 (13:07 +0200)]
Add a pile of new instructions used by Pascal; I'm going to need to think about
how locals and the local base are handled.
David Given [Sat, 15 Oct 2016 10:11:40 +0000 (12:11 +0200)]
Bytes were sometimes failing to be sign extended correctly.
David Given [Sat, 15 Oct 2016 09:42:47 +0000 (11:42 +0200)]
Allow asm names for registers which are different from the friendly names shown
in the tracing (because PowerPC register names are just numbers).
David Given [Sat, 15 Oct 2016 09:22:40 +0000 (11:22 +0200)]
Some more opcodes.
David Given [Fri, 14 Oct 2016 23:15:08 +0000 (01:15 +0200)]
You can now mark a register as corrupting a certain register class; calls work,
or at least look like they work. The bad news is that the register allocator
has a rare talent for putting things in the wrong register.
David Given [Fri, 14 Oct 2016 21:19:25 +0000 (23:19 +0200)]
Log empty hops.
David Given [Fri, 14 Oct 2016 21:19:02 +0000 (23:19 +0200)]
Reworked loads and stores; it's now *different*, maybe not better.
David Given [Fri, 14 Oct 2016 21:17:06 +0000 (23:17 +0200)]
Factor out the register allocation routines to make them easier to deal with.
David Given [Fri, 14 Oct 2016 21:12:29 +0000 (23:12 +0200)]
Fix stupid issue where hop output registers were being overwritten, leading to
invalid SSA form.
David Given [Fri, 14 Oct 2016 20:17:02 +0000 (22:17 +0200)]
Output register equality constraints work.
David Given [Wed, 12 Oct 2016 21:12:53 +0000 (23:12 +0200)]
Make loads and stores in the table nicer; fix a place where it looked like it
was working but only accidentally.
David Given [Wed, 12 Oct 2016 20:58:46 +0000 (22:58 +0200)]
Keep track of register types as well as attributes --- the type being how we
find new registers when evicting values. Input constraints work (they were
being ignored before). Various bug fixing so they actually work.
David Given [Wed, 12 Oct 2016 19:50:12 +0000 (21:50 +0200)]
Add code to remove unused phis, converting to pruned SSA form, to avoid
confusing the register allocator later.
David Given [Tue, 11 Oct 2016 22:45:36 +0000 (00:45 +0200)]
Don't allow the same IR to be added to the sequence list more than once
(sometimes happens because op_dup, but makes no sense).
David Given [Tue, 11 Oct 2016 21:17:30 +0000 (23:17 +0200)]
Clean up the allocator a bit, in preparation for making it lots more
complicated; no semantic changes.
David Given [Mon, 10 Oct 2016 22:29:18 +0000 (00:29 +0200)]
A few more opcodes.
David Given [Mon, 10 Oct 2016 22:23:35 +0000 (00:23 +0200)]
A little fiddling with store instructions. The PowerPC is not friendly to
iburg.
David Given [Mon, 10 Oct 2016 22:12:11 +0000 (00:12 +0200)]
Refactored the way hops are rendered; add support for emitting code (although
with no prologue or epilogue yet).
David Given [Mon, 10 Oct 2016 21:19:46 +0000 (23:19 +0200)]
Register allocator now gets all the way through all of my test file without
crashing (albeit with register moves and swaps stubbed out). Correct code? Who
knows.
David Given [Mon, 10 Oct 2016 21:18:37 +0000 (23:18 +0200)]
D'oh, need multiple passes over the edge splitter in order to properly find all
cases.
David Given [Sun, 9 Oct 2016 20:04:20 +0000 (22:04 +0200)]
Calculate phi congruency groups; use them to solve the
importing-hreg-from-the-future problem (probably poorly).
David Given [Sun, 9 Oct 2016 20:03:44 +0000 (22:03 +0200)]
Add pmap_remove().
David Given [Sun, 9 Oct 2016 13:09:34 +0000 (15:09 +0200)]
The register allocator now makes a spirited attempt to honour register
attributes when allocating. Unfortunately, backward edges don't work (because
the limited def-use chain stuff doesn't work across basic blocks). Needs more
thought.
David Given [Sun, 9 Oct 2016 13:08:03 +0000 (15:08 +0200)]
Floating point promotion was broken since the IR float change. Fix.
David Given [Sun, 9 Oct 2016 12:45:13 +0000 (14:45 +0200)]
Add some more opcodes; rearrange the registers to be more PowerPC-friendly.
David Given [Sun, 9 Oct 2016 10:32:36 +0000 (12:32 +0200)]
Predicates can now take numeric arguments. The PowerPC predicates have been
turned into generic ones (as they'll be useful everywhere). Node arguments for
predicates require the '%' prefix for consistency. Hex numbers are permitted.
David Given [Sat, 8 Oct 2016 21:32:54 +0000 (23:32 +0200)]
Basic register allocation works!
David Given [Sat, 8 Oct 2016 21:32:13 +0000 (23:32 +0200)]
Replace pmap_get() with pmap_findleft() and pmap_findright(), to allow lookups
in both directions.
David Given [Sat, 8 Oct 2016 10:15:21 +0000 (12:15 +0200)]
Only allocate an output vreg if the instruction actually wants one.
David Given [Sat, 8 Oct 2016 09:35:33 +0000 (11:35 +0200)]
Instruction predicates work now.
David Given [Sat, 8 Oct 2016 09:07:28 +0000 (11:07 +0200)]
Minor cleanup.
David Given [Sat, 8 Oct 2016 08:21:24 +0000 (10:21 +0200)]
Fix bug where pushes were being placed in the wrong blocks.
David Given [Fri, 7 Oct 2016 22:21:23 +0000 (00:21 +0200)]
Overhaul of everything phi related; critical edge splitting now happens before
anything SSA happens; liveness calculations now look like they might be
working.
David Given [Fri, 7 Oct 2016 22:20:26 +0000 (00:20 +0200)]
Add array_{appendall,removeall,appendallu}.
David Given [Thu, 6 Oct 2016 19:34:21 +0000 (21:34 +0200)]
Refactor the cfg and dominance stuff to make it a lot nicer.
David Given [Thu, 6 Oct 2016 19:33:43 +0000 (21:33 +0200)]
We're not using 'allocates' any more; clean up.
David Given [Wed, 5 Oct 2016 21:55:38 +0000 (23:55 +0200)]
The register allocator is really a pass, so arrange the code like one.
David Given [Wed, 5 Oct 2016 21:55:04 +0000 (23:55 +0200)]
Warning fix.
David Given [Wed, 5 Oct 2016 21:52:54 +0000 (23:52 +0200)]
No, dammit, for register allocation I need to walk the blocks in *dominance*
order. Since the dominance tree has changed when I fiddled with the graph, I
need to recompute it, so factor it out of the SSA pass. Code is uglier than I'd
like but at least the RET statement goes last in the generated code now.
David Given [Wed, 5 Oct 2016 21:24:29 +0000 (23:24 +0200)]
Allowing an input filename on the command line makes debuggers happy. (Then we
don't need to redirect stdin.)
David Given [Wed, 5 Oct 2016 20:56:25 +0000 (22:56 +0200)]
Better constraint syntax; mcgg now passes register usage information up to mcg;
mcg can track individual hop inputs and outputs (needed for live range
analysis!); the register allocator now puts the basic blocks into the right
order in preparation for live range analysis.
David Given [Wed, 5 Oct 2016 19:07:29 +0000 (21:07 +0200)]
Made sure that all files end in vim magic.
David Given [Wed, 5 Oct 2016 19:00:28 +0000 (21:00 +0200)]
Better management of register data. Add struct hreg.
David Given [Tue, 4 Oct 2016 21:42:00 +0000 (23:42 +0200)]
Add a pass to do critical edge splitting.
David Given [Tue, 4 Oct 2016 21:28:16 +0000 (23:28 +0200)]
Added support for the op_bXX conditional branch instructions.
David Given [Tue, 4 Oct 2016 20:36:01 +0000 (22:36 +0200)]
Fix the horror of the startup code; now uses getopt and stuff and the debug
flags can be set as an option.
David Given [Tue, 4 Oct 2016 20:35:08 +0000 (22:35 +0200)]
Remove unused variable (reduce memory usage by 1/10).
David Given [Tue, 4 Oct 2016 19:58:31 +0000 (21:58 +0200)]
Bodge in enough phi support to let the instruction generator complete on basic
programs.
David Given [Tue, 4 Oct 2016 19:32:28 +0000 (21:32 +0200)]
Oops --- hadn't updated the nts array for the new child order.
David Given [Tue, 4 Oct 2016 19:29:03 +0000 (21:29 +0200)]
Don't allocate new vregs for REG and NOP --- a bit hacky, but suppresses stray
movs very effectively.
David Given [Mon, 3 Oct 2016 22:16:06 +0000 (00:16 +0200)]
Massive rewrite of how emitters and the instruction selector works, after I
realised that the existing approach wasn't working. Now, hopefully, tracks the
instruction trees generated during selection properly.
David Given [Mon, 3 Oct 2016 18:52:36 +0000 (20:52 +0200)]
Instruction selection now happens on a shadow tree, rather than on the IR tree
itself. Currently it's semantically the same but the implementation is cleaner.
David Given [Sun, 2 Oct 2016 21:25:54 +0000 (23:25 +0200)]
Get quite a long way towards basic output-register equality constraints (needed
to make special nodes like NOP work properly). Realise that the way I'm dealing
with the instruction selector is all wrong; I need to physically copy chunks of
tree to give to burg (so I can terminate them correctly).
David Given [Sun, 2 Oct 2016 19:51:25 +0000 (21:51 +0200)]
Come up with a syntax for register constraints.
David Given [Sun, 2 Oct 2016 15:50:34 +0000 (17:50 +0200)]
Perform SSA conversion of locals. Much, *much* better code now, at least
inasmuch as it looks better before register allocation. Basic blocks now know
their own successors and predecessors (after a certain point in the IR
processing).