From: Alan Cox <alan@linux.intel.com>
Date: Mon, 12 Jan 2015 21:09:21 +0000 (+0000)
Subject: tgl6502: Make it possible to split out discard, also enable new compiler flags
X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=f4ffeb7bfaca6c17a0d5ed14af6fe9f6db28e6bd;p=FUZIX.git

tgl6502: Make it possible to split out discard, also enable new compiler flags

You'll need the patch I just posted to the cc65 list to use --all-fastcall but
if you take it out all should be well with the current git snapshots
---

diff --git a/Kernel/Makefile b/Kernel/Makefile
index 0fa31c5d..0cb99b33 100644
--- a/Kernel/Makefile
+++ b/Kernel/Makefile
@@ -42,7 +42,8 @@ else ifeq ($(CPU),6502)
 export CROSS_AS=ca65
 export CROSS_LD=cl65
 export CROSS_CC=cl65
-export CROSS_CCOPTS=-c -Or -t none -I$(ROOT_DIR)/cpu-6502 -I$(ROOT_DIR)/platform-$(TARGET) -I$(ROOT_DIR)/include
+export CROSS_CCOPTS=--all-fastcall -c -Or -t none -I$(ROOT_DIR)/cpu-6502 -I$(ROOT_DIR)/platform-$(TARGET) -I$(ROOT_DIR)/include
+export CROSS_CC_SEGDISC=--code-name DISCARD --rodata-name DISCARDDATA
 export BINEXT = .o
 else
 export CROSS_AS=m6809-unknown-as
diff --git a/Kernel/platform-tgl6502/ld65.cfg b/Kernel/platform-tgl6502/ld65.cfg
index 6957a5dd..a18cf93b 100644
--- a/Kernel/platform-tgl6502/ld65.cfg
+++ b/Kernel/platform-tgl6502/ld65.cfg
@@ -9,6 +9,8 @@ SEGMENTS {
 	ZEROPAGE: load = RAMZ, type = zp, define = yes;
 	CODE:	load = ROM0, type = ro;
 	RODATA:	load = ROM0, type = ro;
+	DISCARD: load = ROM0, type = ro;
+	DISCARDDATA: load = ROM0, type = ro;
 	DATA:	load = ROM0, run = RAM1, type = rw, define = yes;
 	BSS:	load = RAM1, type = bss, define=yes;
 	COMMONDATA: load = RAM0, type= bss;