From: Alan Cox Date: Tue, 21 Jul 2015 22:04:28 +0000 (+0100) Subject: 68hc11: small updates X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=f337e95f89a8a7549b03031f7c5e47e48f02e92c;p=FUZIX.git 68hc11: small updates --- diff --git a/Kernel/cpu-68hc11/rules.mk b/Kernel/cpu-68hc11/rules.mk index 2ea2583b..028afcf4 100644 --- a/Kernel/cpu-68hc11/rules.mk +++ b/Kernel/cpu-68hc11/rules.mk @@ -1,7 +1,7 @@ export CROSS_AS=m6811-elf-as export CROSS_LD= m6811-elf-ld export CROSS_CC = m6811-elf-gcc -export CROSS_CCOPTS=-mshort -c -Wall -Os -I$(ROOT_DIR)/cpu-68hc11 -I$(ROOT_DIR)/platform-$(TARGET) -I$(ROOT_DIR)/include +export CROSS_CCOPTS=-fomit-frame-pointer -mrelax -mshort -c -Wall -Os -I$(ROOT_DIR)/cpu-68hc11 -I$(ROOT_DIR)/platform-$(TARGET) -I$(ROOT_DIR)/include export CROSS_CC_SEG1= export CROSS_CC_SEG2= export CROSS_CC_SEG3= diff --git a/Kernel/platform-68hc11test/Makefile b/Kernel/platform-68hc11test/Makefile index dc3f59cb..d8d58e6b 100644 --- a/Kernel/platform-68hc11test/Makefile +++ b/Kernel/platform-68hc11test/Makefile @@ -24,6 +24,7 @@ clean: image: $(CROSS_LD) -o ../fuzix.bin -M >../fuzix.map \ + --script=memory.x \ crt0.o commonmem.o \ p68hc11.o ../start.o ../version.o ../lowlevel-68hc11.o \ tricks.o main.o ../timer.o ../kdata.o devrd.o devices.o \ diff --git a/Kernel/platform-68hc11test/crt0.s b/Kernel/platform-68hc11test/crt0.s index 58fa1498..20c4f2b1 100644 --- a/Kernel/platform-68hc11test/crt0.s +++ b/Kernel/platform-68hc11test/crt0.s @@ -7,15 +7,22 @@ .globl init_early .globl init_hardware .globl kstack_top + .globl _start ; startup code @0 .sect .start +_start: jmp start .sect .text start: sei lds #kstack_top + ldx #edata +wipe: clr ,x + inx + cmpx #_end + bne wipe ; ; FIXME: any set up needed ? ; @@ -30,6 +37,8 @@ stop: bra stop ; Zeropage compiler goo ; + .sect .page0 + .globl _.frame .globl _.tmp .globl _.d0 @@ -50,4 +59,4 @@ stop: bra stop .equ _.d4,0x4C .equ _.d5,0x4E .equ _.xy,0x50 -.equ _.z,0x52 \ No newline at end of file +.equ _.z,0x52 diff --git a/Kernel/platform-68hc11test/memory.x b/Kernel/platform-68hc11test/memory.x new file mode 100644 index 00000000..c4a7bba5 --- /dev/null +++ b/Kernel/platform-68hc11test/memory.x @@ -0,0 +1,294 @@ +/* Modified from the linker script, for normal executables */ +/* Copyright (C) 2014 Free Software Foundation, Inc. + Copying and distribution of this script, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. */ +/* Linker script for Alan's 68HC811E2 */ +OUTPUT_FORMAT("elf32-m68hc11", "elf32-m68hc11", + "elf32-m68hc11") +OUTPUT_ARCH(m68hc11) +ENTRY(_start) +SEARCH_DIR("/usr/local/m6811-elf/lib"); +/* 68HC811 memory configuration. Right now we are putting I/O at 0 and + thus the RAM starts at 0x0040 for 0x00C0 for page (plenty of room) */ +MEMORY +{ + ports (rw) : ORIGIN = 0x00000, LENGTH = 0x0040 + page0 (rwx) : ORIGIN = 0x00040, LENGTH = 0x00C0 + ram (rwx) : ORIGIN = 0x00200, LENGTH = 0xF600 + eeprom : ORIGIN = 0x0F800, LENGTH = 0x0800 +} + +SECTIONS +{ + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.text : + { + *(.rel.text) + *(.rel.text.*) + *(.rel.gnu.linkonce.t.*) + } + .rela.text : + { + *(.rela.text) + *(.rela.text.*) + *(.rela.gnu.linkonce.t.*) + } + .rel.data : + { + *(.rel.data) + *(.rel.data.*) + *(.rel.gnu.linkonce.d.*) + } + .rela.data : + { + *(.rela.data) + *(.rela.data.*) + *(.rela.gnu.linkonce.d.*) + } + .rel.rodata : + { + *(.rel.rodata) + *(.rel.rodata.*) + *(.rel.gnu.linkonce.r.*) + } + .rela.rodata : + { + *(.rela.rodata) + *(.rela.rodata.*) + *(.rela.gnu.linkonce.r.*) + } + .rel.sdata : + { + *(.rel.sdata) + *(.rel.sdata.*) + *(.rel.gnu.linkonce.s.*) + } + .rela.sdata : + { + *(.rela.sdata) + *(.rela.sdata.*) + *(.rela.gnu.linkonce.s.*) + } + .rel.sbss : + { + *(.rel.sbss) + *(.rel.sbss.*) + *(.rel.gnu.linkonce.sb.*) + } + .rela.sbss : + { + *(.rela.sbss) + *(.rela.sbss.*) + *(.rel.gnu.linkonce.sb.*) + } + .rel.bss : + { + *(.rel.bss) + *(.rel.bss.*) + *(.rel.gnu.linkonce.b.*) + } + .rela.bss : + { + *(.rela.bss) + *(.rela.bss.*) + *(.rela.gnu.linkonce.b.*) + } + .rel.stext : { *(.rel.stest) } + .rela.stext : { *(.rela.stest) } + .rel.etext : { *(.rel.etest) } + .rela.etext : { *(.rela.etest) } + .rel.sdata : { *(.rel.sdata) } + .rela.sdata : { *(.rela.sdata) } + .rel.edata : { *(.rel.edata) } + .rela.edata : { *(.rela.edata) } + .rel.eit_v : { *(.rel.eit_v) } + .rela.eit_v : { *(.rela.eit_v) } + .rel.ebss : { *(.rel.ebss) } + .rela.ebss : { *(.rela.ebss) } + .rel.srodata : { *(.rel.srodata) } + .rela.srodata : { *(.rela.srodata) } + .rel.erodata : { *(.rel.erodata) } + .rela.erodata : { *(.rela.erodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + /* Concatenate .page0 sections. Put them in the page0 memory bank + unless we are creating a relocatable file. */ + .page0 : + { + *(.page0) + *(.softregs) + } > page0 + /* Start of text section. */ + .stext : + { + *(.stext) + } > ram + .init : + { + *(.init) + } =0 + .text : + { + /* Put startup code at beginning so that _start keeps same address. */ + /* Startup code. */ + KEEP (*(.install0)) /* Section should setup the stack pointer. */ + KEEP (*(.install1)) /* Place holder for applications. */ + KEEP (*(.install2)) /* Optional installation of data sections in RAM. */ + KEEP (*(.install3)) /* Place holder for applications. */ + KEEP (*(.install4)) /* Section that calls the main. */ + *(.init) + *(.text) + *(.text.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t.*) + *(.tramp) + *(.tramp.*) + /* Finish code. */ + KEEP (*(.fini0)) /* Beginning of finish code (_exit symbol). */ + KEEP (*(.fini1)) /* Place holder for applications. */ + KEEP (*(.fini2)) /* C++ destructors. */ + KEEP (*(.fini3)) /* Place holder for applications. */ + KEEP (*(.fini4)) /* Runtime exit. */ + _etext = .; + PROVIDE (etext = .); + } > ram + .eh_frame : + { + KEEP (*(.eh_frame)) + } > ram + .gcc_except_table : + { + *(.gcc_except_table) + } > ram + .rodata : + { + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r*) + } > ram + .rodata1 : + { + *(.rodata1) + } > ram + /* Constructor and destructor tables are in text. */ + .ctors : + { + PROVIDE (__CTOR_LIST__ = .); + KEEP (*(.ctors)) + PROVIDE(__CTOR_END__ = .); + } > ram + .dtors : + { + PROVIDE(__DTOR_LIST__ = .); + KEEP (*(.dtors)) + PROVIDE(__DTOR_END__ = .); + } > ram + .jcr : + { + KEEP (*(.jcr)) + } > ram + /* Start of the data section image in ROM. */ + .data : + { + *(.sdata) + *(.data) + *(.data.*) + *(.data1) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = .; + PROVIDE (edata = .); + } > ram + /* Relocation for some bss and data sections. */ + .bss : + { + __bss_start = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + PROVIDE (_end = .); + } > ram + __bss_size = SIZEOF(.bss); + PROVIDE (__bss_size = SIZEOF(.bss)); + .eeprom : + { + *(.eeprom) + *(.eeprom.*) + } > eeprom + /* If the 'vectors_addr' symbol is defined, it indicates the start address + of interrupt vectors. This depends on the 68HC11 operating mode: + Addr + Single chip 0xffc0 + Extended mode 0xffc0 + Bootstrap 0x00c0 + Test 0xbfc0 + In general, the vectors address is 0xffc0. This can be overriden + with the '-defsym vectors_addr=0xbfc0' ld option. + Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but + they are redirected to 0x00c0 by the internal PROM. Application's vectors + must also consist of jump instructions (see Motorola's manual). */ + PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0); + .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 : + { + KEEP (*(.vectors)) + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } +}