From: Will Sowerbutts <will@sowerbutts.com>
Date: Sun, 10 May 2015 14:07:02 +0000 (+0100)
Subject: zeta-v2: Fix boot from kernel in ROM. Do not change tty1 UART parameters unless booti... 
X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=ebf1150ab629a20276138ff0effd844873c4b1df;p=FUZIX.git

zeta-v2: Fix boot from kernel in ROM. Do not change tty1 UART parameters unless booting from ROM.
---

diff --git a/Kernel/platform-zeta-v2/Makefile b/Kernel/platform-zeta-v2/Makefile
index 00aa8265..27e9609c 100644
--- a/Kernel/platform-zeta-v2/Makefile
+++ b/Kernel/platform-zeta-v2/Makefile
@@ -51,6 +51,6 @@ diskboot.bin:	diskboot.s
 image:
 	sdasz80 -o bootrom.s
 	sdldz80 -m -i bootrom.rel
-	makebin -s 256 bootrom.ihx > bootrom.bin
-	cat bootrom.bin ../fuzix.bin > fuzix.rom
+	makebin -s 136 bootrom.ihx > bootrom.bin
+	cat bootrom.bin ../fuzix.bin | dd conv=sync bs=65536 count=1 of=fuzix.rom
 	../cpm-loader/makecpmloader ../cpm-loader/cpmload.bin ../fuzix.bin 0x88 fuzix.com
diff --git a/Kernel/platform-zeta-v2/bootrom.s b/Kernel/platform-zeta-v2/bootrom.s
index 4b1b2628..4086a787 100644
--- a/Kernel/platform-zeta-v2/bootrom.s
+++ b/Kernel/platform-zeta-v2/bootrom.s
@@ -53,6 +53,7 @@ ramdisk_copy:
 		out (MPGSEL_2),a
 		inc a			; map page 35 (RAM+48K) to bank 3
 		out (MPGSEL_3),a
-		jp 0x100		; jump to crt0.s
+
+		jp 0x8B                 ; jump to init_from_rom in crt0
 ; pad
 		.ds	(0x88-(.-start))
diff --git a/Kernel/platform-zeta-v2/config.h b/Kernel/platform-zeta-v2/config.h
index 22e808cf..6c9d5f60 100644
--- a/Kernel/platform-zeta-v2/config.h
+++ b/Kernel/platform-zeta-v2/config.h
@@ -110,7 +110,7 @@
 
 	/* UART0 as the console */
 	#define BOOT_TTY (512 + 1)
-	#define TTY_INIT_BAUD B115200
+	#define TTY_INIT_BAUD B38400
 #endif
 
 #define TTYDEV   BOOT_TTY /* Device used by kernel for messages, panics */
diff --git a/Kernel/platform-zeta-v2/crt0.s b/Kernel/platform-zeta-v2/crt0.s
index a618496c..42b513d6 100644
--- a/Kernel/platform-zeta-v2/crt0.s
+++ b/Kernel/platform-zeta-v2/crt0.s
@@ -24,6 +24,11 @@
         .area _DISCARD
         .area _COMMONMEM
 
+        ; exported symbols
+        .globl init
+        .globl init_from_rom
+        .globl _boot_from_rom
+
         ; imported symbols
         .globl _fuzix_main
         .globl init_early
@@ -41,7 +46,13 @@
 
         ; startup code
         .area _CODE
-init:
+init:                       ; must be at 0x88 -- warm boot methods enter here
+        xor a
+        jr init_common
+init_from_rom:              ; must be at 0x8B -- bootrom.s enters here
+        ld a, #1
+        ; fall through
+init_common:
         di
         ld sp, #kstack_top
         ; move the common memory where it belongs    
@@ -59,6 +70,9 @@ init:
         ld bc, #l__DATA - 1
         ld (hl), #0
         ldir
+        
+        ; save ROM boot flag
+        ld (_boot_from_rom), a
 
 	; setup the rest of the memory paging
 	call init_early
@@ -73,3 +87,6 @@ init:
         di
 stop:   halt
         jr stop
+
+        .area _DATA
+_boot_from_rom: .ds 1
diff --git a/Kernel/platform-zeta-v2/devtty.c b/Kernel/platform-zeta-v2/devtty.c
index c652f065..b69c4d8a 100644
--- a/Kernel/platform-zeta-v2/devtty.c
+++ b/Kernel/platform-zeta-v2/devtty.c
@@ -37,7 +37,7 @@ void tty_setup(uint8_t minor)
 	uint8_t lcr = 0;
 	if (minor == 1) {
 		b = ttydata[minor].termios.c_cflag & CBAUD;
-		if (b > 0 && b < 16) {
+		if (boot_from_rom && b > 0 && b < 16) {
 			UART0_LCR = 0x80;	/* LCR = DLAB ON */
 			UART0_DLL = divisor_table[b] & 0xFF;
 			UART0_DLH = divisor_table[b] >> 8;
diff --git a/Kernel/platform-zeta-v2/kernel.def b/Kernel/platform-zeta-v2/kernel.def
index 5ab67dc6..ae762f1b 100644
--- a/Kernel/platform-zeta-v2/kernel.def
+++ b/Kernel/platform-zeta-v2/kernel.def
@@ -12,7 +12,7 @@ PROGLOAD		.equ	0x0100
 
 ; Zeta SBC V2 mnemonics for I/O ports etc
 
-CONSOLE_RATE		.equ	115200
+CONSOLE_RATE		.equ	38400
 
 CPU_CLOCK_KHZ		.equ	20000
 
diff --git a/Kernel/platform-zeta-v2/zeta-v2.h b/Kernel/platform-zeta-v2/zeta-v2.h
index dd719141..437fa90c 100644
--- a/Kernel/platform-zeta-v2/zeta-v2.h
+++ b/Kernel/platform-zeta-v2/zeta-v2.h
@@ -17,4 +17,6 @@ __sfr __at (UART0_BASE + 7) UART0_SCR;	/* Scratch register */
 __sfr __at (UART0_BASE + 0) UART0_DLL;	/* Divisor latch - low byte */
 __sfr __at (UART0_BASE + 1) UART0_DLH;	/* Divisor latch - high byte */
 
+extern bool boot_from_rom;
+
 #endif
diff --git a/Kernel/platform-zeta-v2/zeta-v2.s b/Kernel/platform-zeta-v2/zeta-v2.s
index b6873376..e889729e 100644
--- a/Kernel/platform-zeta-v2/zeta-v2.s
+++ b/Kernel/platform-zeta-v2/zeta-v2.s
@@ -27,6 +27,7 @@
 	.globl unix_syscall_entry
 	.globl nmi_handler
 	.globl null_handler
+        .globl _boot_from_rom
 
 	; exported debugging tools
 	.globl inchar
@@ -135,14 +136,19 @@ init_hardware:
         ld (_procmem), hl
 
 	; initialize UART0
+        ld a, (_boot_from_rom)          ; do not set the baud rate and other
+        or a                            ; serial line parameters if the BIOS
+        jr z, init_partial_uart         ; already set them for us.
 	ld a,#0x80			; LCR = DLAB ON
 	out (UART0_LCR),a		; set LCR
 	ld a,#CONSOLE_DIVISOR_LOW	; baud rate divisor - low byte
 	out (UART0_DLL),a		; set low byte of divisor
 	ld a,#CONSOLE_DIVISOR_HIGH	; baud rate divisor - high byte
 	out (UART0_DLH),a		; set high byte of divisor
-	ld a,#0x03				; value for LCR and MCR
+	ld a,#0x03			; value for LCR
 	out (UART0_LCR),a		; 8 bit data, 1 stop, no parity
+init_partial_uart:
+	ld a,#0x03			; value for MCR
 	out (UART0_MCR),a		; DTR ON, RTS ON
 	ld a,#0x06			; disable and clear FIFOs
 	out (UART0_FCR),a