From: bal Date: Wed, 17 Apr 1985 14:51:31 +0000 (+0000) Subject: Bug fixed in pattern sti $1 > 4 (ADDREG -> ADDSCR) X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=9b263f927b0264a2e3fd29abfb6ee64f68a6f446;p=ack.git Bug fixed in pattern sti $1 > 4 (ADDREG -> ADDSCR) Definition of EM_BSIZE removed. --HG-- branch : unlabeled-2.1.1 --- diff --git a/mach/m68k2/cg/table b/mach/m68k2/cg/table index f016161de..56d5d6443 100644 --- a/mach/m68k2/cg/table +++ b/mach/m68k2/cg/table @@ -33,7 +33,6 @@ EM_WSIZE = 2 EM_PSIZE = 4 -EM_BSIZE = 8 @@ -444,7 +443,7 @@ sti $1 == 2 | ADDREG ANY | remove(MEM_ALL) move(%[2],{IADDREG,%[1]}) | | | sti $1 == 4 | ADDREG ANY4 | remove(MEM_ALL) move(%[2],{IADDREG4,%[1]}) | | | -sti $1 > 4 | ADDREG | remove(ALL) +sti $1 > 4 | ADDSCR | remove(ALL) allocate(DATAREG4={IMMEDIATE4,$1/2-1}) "1:" "move.w (sp)+,(%[1])+"