From: Alan Cox <alan@linux.intel.com>
Date: Wed, 13 Dec 2017 20:36:30 +0000 (+0000)
Subject: 65c816: signal fixes
X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=35e0c0183c1141310857e56951f9e3dcbc24fddc;p=FUZIX.git

65c816: signal fixes

With this we seem to have working signals
---

diff --git a/Kernel/lowlevel-65c816.s b/Kernel/lowlevel-65c816.s
index 286d4e52..117b3a16 100644
--- a/Kernel/lowlevel-65c816.s
+++ b/Kernel/lowlevel-65c816.s
@@ -693,13 +693,13 @@ signal_exit:
 	;
 	; Right now it looks like this
 	;
-	;		Bank
-	;		PC high
-	;		PC low
-	;		P
-	;		A16
-	;		X16
-	;		Y16
+	;		Bank		10
+	;		PC high		9
+	;		PC low		8
+	;		P		7
+	;		A16		5,6
+	;		X16		3,4
+	;		Y16		1,2
 	;	SP
 	;
 	; We want it to look like
@@ -716,12 +716,25 @@ signal_exit:
 	.i16
 	.a16
 
+	;
+	;	We unwind this with an RTS but we created it with an RTI
+	;	so we need to decrement the saved PC.
+	;
+
+	lda 8,s
+	dec
+	sta 8,s
+
 	tsc			; stack to accumulator
 	clc
 	adc	#10		; top of block to change
 	tax
 	tay
 	dex			; source one below dest
+
+	;
+	;	Y now points at bank, X points at PC high
+	;
 	lda	#8		; copy 9 bytes
 	mvp	0,0
 	;
diff --git a/Kernel/platform-micropack/crt0.s b/Kernel/platform-micropack/crt0.s
index 71f12d40..b5356dbc 100644
--- a/Kernel/platform-micropack/crt0.s
+++ b/Kernel/platform-micropack/crt0.s
@@ -17,6 +17,7 @@
         .area _GSINIT
         .area _GSFINAL
 
+	.area _BANK
 	.area _DISCARD
 	.area _UDATA
 
diff --git a/Kernel/platform-micropack/fuzix.lnk b/Kernel/platform-micropack/fuzix.lnk
index 173af2dd..8d87894b 100644
--- a/Kernel/platform-micropack/fuzix.lnk
+++ b/Kernel/platform-micropack/fuzix.lnk
@@ -1,9 +1,10 @@
 -mwxuy
 -i fuzix.ihx
--b _INITIALIZER=0x1000
+-b _INITIALIZER=0x2000
 -b _DISCARD=0x5000
--b _UDATA=0x6D00
--b _CODE=0x7000
+-b _BANK=0x1000
+-b _UDATA=0x7D00
+-b _CODE=0x8000
 -l z80
 platform-micropack/crt0.rel
 platform-micropack/commonmem.rel
diff --git a/Kernel/platform-micropack/rules.mk b/Kernel/platform-micropack/rules.mk
index 990c36a8..191b0ac1 100644
--- a/Kernel/platform-micropack/rules.mk
+++ b/Kernel/platform-micropack/rules.mk
@@ -4,6 +4,6 @@
 CROSS_CCOPTS += --peep-file $(ROOT_DIR)/cpu-z80/rst8.peep
 #export CROSS_CC_SYS1=--codeseg CODE3
 #export CROSS_CC_SYS2=--codeseg CODE4
-#export CROSS_CC_SYS3=--codeseg CODE5
-#export CROSS_CC_SYS4=--codeseg CODE6
-#export CROSS_CC_SYS5=--codeseg CODE7
+export CROSS_CC_SYS3=--codeseg BANK
+export CROSS_CC_SYS4=--codeseg BANK
+export CROSS_CC_SYS5=--codeseg BANK