From: ceriel Date: Mon, 26 Mar 1990 14:47:26 +0000 (+0000) Subject: fix: still sometimes assumed that a move to address register sets condition codes X-Git-Tag: release-5-5~1769 X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=3553a28b787db565333c1a754e5245cc067c671c;p=ack.git fix: still sometimes assumed that a move to address register sets condition codes --- diff --git a/mach/m68020/ncg/table b/mach/m68020/ncg/table index 674ec9dee..96fd8062a 100644 --- a/mach/m68020/ncg/table +++ b/mach/m68020/ncg/table @@ -532,7 +532,7 @@ lsr "lsr #1," memalt2:rw:cc cost(2,4). address register! */ move_l "move.l" any4:ro, A_REG+areg:wo cost(2,2). -move_l "move.l" any4:ro, alterable4+dreg4:wo:cc cost(2,2). +move_l "move.l" any4:ro, alterable4+dreg4-(areg+A_REG):wo:cc cost(2,2). move_w "move.w" any2:ro, alterable2+dreg4:wo:cc cost(2,2). move_b "move.b" any1:ro, alterable1+dreg4:wo:cc cost(2,2). neg_b "neg.b" D_REG:rw:cc cost(2,3). @@ -666,10 +666,10 @@ from t_regAcon to A_REG+areg from address - ext_addr to A_REG+areg gen lea %1, %2 -from any4 to alterable4 +from any4 to areg+A_REG gen move_l %1, %2 -from any4 to areg +from any4 to alterable4-(areg+A_REG) gen move_l %1, %2 from any2 to alterable2 diff --git a/mach/m68k2/ncg/table b/mach/m68k2/ncg/table index 674ec9dee..96fd8062a 100644 --- a/mach/m68k2/ncg/table +++ b/mach/m68k2/ncg/table @@ -532,7 +532,7 @@ lsr "lsr #1," memalt2:rw:cc cost(2,4). address register! */ move_l "move.l" any4:ro, A_REG+areg:wo cost(2,2). -move_l "move.l" any4:ro, alterable4+dreg4:wo:cc cost(2,2). +move_l "move.l" any4:ro, alterable4+dreg4-(areg+A_REG):wo:cc cost(2,2). move_w "move.w" any2:ro, alterable2+dreg4:wo:cc cost(2,2). move_b "move.b" any1:ro, alterable1+dreg4:wo:cc cost(2,2). neg_b "neg.b" D_REG:rw:cc cost(2,3). @@ -666,10 +666,10 @@ from t_regAcon to A_REG+areg from address - ext_addr to A_REG+areg gen lea %1, %2 -from any4 to alterable4 +from any4 to areg+A_REG gen move_l %1, %2 -from any4 to areg +from any4 to alterable4-(areg+A_REG) gen move_l %1, %2 from any2 to alterable2 diff --git a/mach/m68k4/ncg/table b/mach/m68k4/ncg/table index 674ec9dee..96fd8062a 100644 --- a/mach/m68k4/ncg/table +++ b/mach/m68k4/ncg/table @@ -532,7 +532,7 @@ lsr "lsr #1," memalt2:rw:cc cost(2,4). address register! */ move_l "move.l" any4:ro, A_REG+areg:wo cost(2,2). -move_l "move.l" any4:ro, alterable4+dreg4:wo:cc cost(2,2). +move_l "move.l" any4:ro, alterable4+dreg4-(areg+A_REG):wo:cc cost(2,2). move_w "move.w" any2:ro, alterable2+dreg4:wo:cc cost(2,2). move_b "move.b" any1:ro, alterable1+dreg4:wo:cc cost(2,2). neg_b "neg.b" D_REG:rw:cc cost(2,3). @@ -666,10 +666,10 @@ from t_regAcon to A_REG+areg from address - ext_addr to A_REG+areg gen lea %1, %2 -from any4 to alterable4 +from any4 to areg+A_REG gen move_l %1, %2 -from any4 to areg +from any4 to alterable4-(areg+A_REG) gen move_l %1, %2 from any2 to alterable2 diff --git a/mach/moon3/ncg/table b/mach/moon3/ncg/table index 674ec9dee..96fd8062a 100644 --- a/mach/moon3/ncg/table +++ b/mach/moon3/ncg/table @@ -532,7 +532,7 @@ lsr "lsr #1," memalt2:rw:cc cost(2,4). address register! */ move_l "move.l" any4:ro, A_REG+areg:wo cost(2,2). -move_l "move.l" any4:ro, alterable4+dreg4:wo:cc cost(2,2). +move_l "move.l" any4:ro, alterable4+dreg4-(areg+A_REG):wo:cc cost(2,2). move_w "move.w" any2:ro, alterable2+dreg4:wo:cc cost(2,2). move_b "move.b" any1:ro, alterable1+dreg4:wo:cc cost(2,2). neg_b "neg.b" D_REG:rw:cc cost(2,3). @@ -666,10 +666,10 @@ from t_regAcon to A_REG+areg from address - ext_addr to A_REG+areg gen lea %1, %2 -from any4 to alterable4 +from any4 to areg+A_REG gen move_l %1, %2 -from any4 to areg +from any4 to alterable4-(areg+A_REG) gen move_l %1, %2 from any2 to alterable2