From: Alan Cox <alan@linux.intel.com>
Date: Sun, 18 Jan 2015 16:30:21 +0000 (+0000)
Subject: 6502: Move the C runtime into common
X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=2a4aba4ac66557c5ee945d37110b93e3a661658d;p=FUZIX.git

6502: Move the C runtime into common

As its threaded code we really don't want to be bankswitching calls into the
runtime!
---

diff --git a/Kernel/Makefile b/Kernel/Makefile
index b61310dd..c1893efd 100644
--- a/Kernel/Makefile
+++ b/Kernel/Makefile
@@ -43,6 +43,13 @@ export CROSS_AS=ca65
 export CROSS_LD=cl65
 export CROSS_CC=cl65
 export CROSS_CCOPTS=--all-fastcall -c -O -t none -I$(ROOT_DIR)/cpu-6502 -I$(ROOT_DIR)/platform-$(TARGET) -I$(ROOT_DIR)/include
+#
+# The 6502 compiler produces what is mostly threadcode and is quite determined
+# that the runtime lives in the code segment. As we want the runtime in common
+# memory we use SEG1/SEG2 names for all the kernel code.
+#
+export CROSS_CC_SEG1=--code-name SEG1
+export CROSS_CC_SEG2=--code-name SEG2
 export CROSS_CC_SEGDISC=--code-name DISCARD --rodata-name DISCARDDATA
 export BINEXT = .o
 else
diff --git a/Kernel/platform-tgl6502/crt0.s b/Kernel/platform-tgl6502/crt0.s
index 78ac7110..d65f0830 100644
--- a/Kernel/platform-tgl6502/crt0.s
+++ b/Kernel/platform-tgl6502/crt0.s
@@ -11,16 +11,20 @@
 		.import nmi_handler
 
 		.import  __BSS_RUN__, __BSS_SIZE__
+		.import	 __CODE_LOAD__, __CODE_RUN__, __CODE_SIZE__
 		.import	 __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
 		.import	 __COMMONMEM_LOAD__, __COMMONMEM_RUN__, __COMMONMEM_SIZE__
 		.import	 __STUBS_LOAD__, __STUBS_RUN__, __STUBS_SIZE__
 		.importzp	ptr1, ptr2, tmp1
 
 	        ; startup code @0
-	        .code
 		.include "zeropage.inc"
 
 ;
+;	So we end up first in the ROM
+;
+	        .segment "START"
+;
 ;	We are entered in ROM 8K bank $40, at virtual address $C000
 ;
 		lda #'F'
@@ -112,11 +116,26 @@ gogogo:
 	        sta     ptr2+1
 
 	        ldx     #<~__DATA_SIZE__
-	        lda     #>~__DATA_SIZE__        ; Use -(__DATASIZE__+1)
+	        lda     #>~__DATA_SIZE__        ; Use -(__DATA_SIZE__+1)
 	        sta     tmp1
 
 		jsr	copyloop
 
+	        lda     #<__CODE_LOAD__         ; Source pointer
+	        sta     ptr1
+	        lda     #>__CODE_LOAD__
+	        sta     ptr1+1
+
+	        lda     #<__CODE_RUN__          ; Target pointer
+	        sta     ptr2
+	        lda     #>__CODE_RUN__
+	        sta     ptr2+1
+
+	        ldx     #<~__CODE_SIZE__
+	        lda     #>~__CODE_SIZE__        ; Use -(__CODE_SIZE__+1)
+	        sta     tmp1
+
+		jsr	copyloop
 	        lda     #<__STUBS_LOAD__         ; Source pointer
 	        sta     ptr1
 	        lda     #>__STUBS_LOAD__
diff --git a/Kernel/platform-tgl6502/ld65.cfg b/Kernel/platform-tgl6502/ld65.cfg
index 8d806317..b0695ad2 100644
--- a/Kernel/platform-tgl6502/ld65.cfg
+++ b/Kernel/platform-tgl6502/ld65.cfg
@@ -2,13 +2,13 @@ MEMORY {
 	RAMZ:	start = $0000, size = $0100, type = rw, define = yes;
 	RAM0:	start = $0200, size = $1E00, type = rw, define = yes;
 	RAM1:	start = $2000, size = $2000, type = rw, define = yes;
-	ROM0:	start = $4000, size = $B000, fill = yes;
-	ROM1:	start = $F000, size = $1000, fill = yes;
+	ROM0:	start = $4000, size = $A000, fill = yes;
+	ROM1:	start = $E000, size = $2000, fill = yes;
 }
 
 SEGMENTS {
 	ZEROPAGE: load = RAMZ, type = zp, define = yes;
-	CODE:	load = ROM0, type = ro;
+	START: load = ROM0, type = ro;
 	RODATA:	load = ROM0, type = ro;
 	DISCARD: load = ROM1, type = ro;
 	DISCARDDATA: load = ROM1, type = ro;
@@ -16,6 +16,9 @@ SEGMENTS {
 	BSS:	load = RAM1, type = bss, define=yes;
 	COMMONDATA: load = RAM0, type= bss;
 	COMMONMEM: load = ROM1, run = RAM0, type = rw, define = yes;
+	CODE:	load = ROM1, run = RAM0, type = ro, define = yes;
+	SEG1:	load = ROM0, type = ro;
+	SEG2:	load = ROM0, type = ro;
 	STUBS:   load = ROM1, run = RAM0, type = ro, define = yes;
 	VECTORS: load = ROM1, type = ro, start = $FFFA;
 }