From: Alan Cox Date: Tue, 30 Jan 2018 00:24:50 +0000 (+0000) Subject: ubee: Updates X-Git-Url: https://git.ndcode.org/public/gitweb.cgi?a=commitdiff_plain;h=227364f60990def088c253185ccd02212dfb20a9;p=FUZIX.git ubee: Updates This gets us to the point we prompt for a keyboard response and have IRQ events running. The 256TC keyboard half works (shift and control seem busted and we've yet to work out what to do with alt anyway). Next stop disk drivers --- diff --git a/Kernel/platform-ubee/devtty.c b/Kernel/platform-ubee/devtty.c index d5bb8c9c..3cf7a712 100644 --- a/Kernel/platform-ubee/devtty.c +++ b/Kernel/platform-ubee/devtty.c @@ -226,14 +226,12 @@ static void keymap_up(uint8_t c) /* 256TC */ void kbd_interrupt(void) { - uint8_t x = tc256_kstat; - if (x & 1) { - x = tc256_kcode; - if (x & 0x80) - keymap_down(x & 0x7F); - else - keymap_up(x & 0x7F); - if (keysdown < 3) - keydecode_tc(); - } + uint8_t x = tc256_kcode; + newkey = 0; + if (x & 0x80) + keymap_down(x & 0x7F); + else + keymap_up(x & 0x7F); + if (keysdown < 3 && newkey) + keydecode_tc(); } diff --git a/Kernel/platform-ubee/fuzix.lnk b/Kernel/platform-ubee/fuzix.lnk index e14e4be4..c3f864de 100644 --- a/Kernel/platform-ubee/fuzix.lnk +++ b/Kernel/platform-ubee/fuzix.lnk @@ -1,7 +1,7 @@ -mwxuy -i fuzix.ihx -b _CODE=0x0200 --b _DISCARD=0xDB00 +-b _DISCARD=0xDC00 -b _COMMONMEM=0xE400 -l z80 platform-ubee/crt0.rel diff --git a/Kernel/platform-ubee/main.c b/Kernel/platform-ubee/main.c index e4d68e5b..dc73c822 100644 --- a/Kernel/platform-ubee/main.c +++ b/Kernel/platform-ubee/main.c @@ -18,10 +18,46 @@ void do_beep(void) { } +static uint8_t has_rtc; + +__sfr __at 0x02 pia0b; +__sfr __at 0x04 cmos_reg; +__sfr __at 0x07 cmos_read; + +uint8_t rtc_secs(void) +{ + cmos_reg = 0x00; + return cmos_read; +} + +void has_cmos_rtc(void) +{ + /* See if the week looks valid - probably want a stronger check */ + cmos_reg = 0x06; + if (cmos_read == 0 || cmos_read > 7) + panic("RTC required"); +} + void platform_interrupt(void) { - kbd_interrupt(); - timer_interrupt(); + static uint8_t icount; + uint8_t r = pia0b; + /* TODO: printer interrupt */ + /* Need to check if TC */ + if (r & 0x02) + kbd_interrupt(); + if (r & 0x80) { + cmos_reg = 0x0C; + if (cmos_read & 0x40) { + icount++; + timer_interrupt(); + /* Turn 8Hz into 10Hz */ + if (icount == 4) { + timer_interrupt(); + icount = 0; + } + } + } } void map_init(void) @@ -54,19 +90,13 @@ void pagemap_init(void) { uint8_t i; uint8_t nbank = procmem / 32; - for (i = 1; i < nbank; i++) - pagemap_add(map_mod(i)); -} + /* Just a handy spot to run it early */ + has_cmos_rtc(); -/* FIXME: check RTC is not an option on supported devices, if so probe it */ -__sfr __at 0x04 rtc_c; -__sfr __at 0x06 rtc_d; + for (i = 1; i < nbank; i++) + pagemap_add(map_mod(i)); -uint8_t rtc_secs(void) -{ - rtc_c = 0x00; - return rtc_d; } uint8_t platform_param(char *p) diff --git a/Kernel/platform-ubee/ubee.s b/Kernel/platform-ubee/ubee.s index 90f6b846..b02deafe 100644 --- a/Kernel/platform-ubee/ubee.s +++ b/Kernel/platform-ubee/ubee.s @@ -1,5 +1,5 @@ ; -; TRS 80 hardware support +; Microbee 128K and 256TC hardware support ; .module ubee @@ -112,6 +112,8 @@ page_codes: ; ----------------------------------------------------------------------------- .area _CODE +; FIXME: most of this belongs in discard + ; These two must be below 32K and not use the stack until they hit ROM ; space. ; @@ -132,13 +134,13 @@ to_reboot: ; This setting list comes from the Microbee 256TC documentation ; and is the quoted table for 80x25 mode ; -_ctc6845: ; registers in reverse order +_ctc6545: ; registers in reverse order .db 0x00, 0x00, 0x00, 0x20, 0x0A, 0x09, 0x0A, 0x48 .db 0x1a, 0x19, 0x05, 0x1B, 0x37, 0x58, 0x50, 0x6B init_early: - ; load the 6845 parameters - ld hl, #_ctc6845 + ; load the 6545 parameters + ld hl, #_ctc6545 ld bc, #0x0F0C ctcloop: out (c), b ; register ld a, (hl) @@ -180,21 +182,98 @@ is_tc: call _program_vectors pop hl + ld a,(_ubee_model) + cp #2 + ld hl,#pio_setup + jr nz, not_t256 + ld hl,#pio_setup_t256 +not_t256: + call init_ports + call init_ports ; ; set up the RTC driven periodic timer. The PIA should already ; have been configured for us ; - ; FIXME: RTC is an option - use vblank instead (pio bit 7) + ; we don't necessarily have one in which case we have a + ; (arguably far more useful) vblank timer. In which case this + ; routine will pee into the void and do no harm whatsoever ; - ld a, #0x0A ; PIR timer - out (0x04), a - ld a, #0x1001 ; 64 ints/second + ld bc,#0x0A04 + out (c), b ; select register A + ld a,#0x70 ; reset divier + out (0x06), a + ld a,#0x2D ; and select 32KHz operation + out (0x06), a ; with an 8Hz interrupt + ld a,#0x40 + inc b + out (c),b + ld a,#0x46 ; PIE, binary, 24 hour out (0x06), a + inc b + out (c),b + in a,(0x07) ; Clear pending interrupt im 1 ; set CPU interrupt mode ret +; +; This nifty routine is c/o Stewart Kay's CP/M 3 for the Microbee +; - slightly tweaked to make it re-callable for series of tables +; +init_ports: + ld b,(hl) + inc hl + ld c,(hl) + inc hl + otir + ld a,(hl) + or a + jr nz,init_ports + inc hl + ret + +pio_setup: + .byte 0x04 + .byte 0x01 + ; vector, mode 0 (output), int control off, on + .byte 0x00,0x0F,0x03,0x83 + .byte 0 + ; and port B + .byte 0x06 + .byte 0x03 + ; vector 0, mode 3, 7/4/3/0 are input + ; interrupt enable, or, high, mask follows + ; interrupt on 7/4 + ; int control on + .byte 0x00, 0xCF, 0x99, 0xB7, 0x6F, 0x83 + .byte 0x01 + .byte 0x02 + ; and set the data lines so the rs232 looks sane (not that + ; we care right now). + .byte 0x24 + .byte 0x00 + +pio_setup_t256: + .byte 0x04 + .byte 0x01 + ; vector, mode 0 (output), int control off, on + .byte 0x00,0x0F,0x03,0x83 + .byte 0 + ; and port B + .byte 0x06 + .byte 0x03 + ; vector 0, mode 3, 7/4/3/1/0 are input + ; interrupt enable, or, high, mask follows + ; interrupt on 7/4/1 + ; int control on + .byte 0x00, 0xCF, 0x9B, 0xB7, 0x6D, 0x83 + .byte 0x01 + .byte 0x02 + ; and set the data lines so the rs232 looks sane (not that + ; we care right now). + .byte 0x24 + .byte 0x00 ;------------------------------------------------------------------------------ ; COMMON MEMORY PROCEDURES FOLLOW