--- /dev/null
+ .area _COMMONMEM
+
+ ; IRQ helpers, in common as they may get used by common C
+ ; code (and are tiny)
+
+_di: ld a, i
+ push af
+ pop hl
+ di
+ ret
+
+_irqrestore: pop hl ; sdcc needs to get register arg passing
+ pop af ; so badly
+ jp po, was_di
+ ei
+ jr irqres_out
+was_di: di
+irqres_out: push af
+ jp (hl)
+
--- /dev/null
+ .area _COMMONMEM
+
+_di: xor a ; NMOS Z80 bug work around as per CPU manual
+ push af
+ pop af ; clear byte on stack below our usage
+ ld a, i
+ jp pe, was_ei ; P is now IFF2, if irqs on return is safe
+ dec sp ; the CPU may have lied due to an erratum
+ dec sp
+ pop af ; see if anyone pushed a return address
+ and a
+ jr nz, was_ei ; someone did - IRQs were enabled then
+ scf ; disabled
+was_ei: push af
+ pop hl
+ ret
+
+_irqrestore: pop hl
+ pop af
+ jr c, was_di
+ ei
+ jr irqres_out
+was_di: di
+irqres_out: push af
+ jp (hl)
+
.area _COMMONMEM
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-
- ; IRQ helpers, in common as they may get used by common C
- ; code (and are tiny)
-
-_di: ld a, i
- push af
- pop hl
- di
- ret
-
-_irqrestore: pop hl ; sdcc needs to get register arg passing
- pop af ; so badly
- jp po, was_di
- ei
- jr irqres_out
-was_di: di
-irqres_out: push af
- jp (hl)
-
-
-
; outstring: Print the string at (HL) until 0 byte is found
; destroys: AF HL
call outchar
ret
+;
+; Pull in the CPU specific workarounds
+;
+
+ .if NMOS_Z80
+ .include "lowlevel-z80-nmos.s"
+ .else
+ .include "lowlevel-z80-cmos.s"
+ .endif