Some modifications to reduce the number of terminals (for Ultrix)

diff --git a/mach/m68020/as/mach2.c b/mach/m68020/as/mach2.c
index 3306ba0..1b3f8ad 100644 (file)
--- a/mach/m68020/as/mach2.c
+++ b/mach/m68020/as/mach2.c
@@ -11,7 +11,6 @@
 %token <y_word> DREG
 %token <y_word> AREG
 %token <y_word> PC
-%token <y_word> ZPC
 %token <y_word> CREG
 %token <y_word> SPEC
 %token <y_word> ABCD
@@ -39,17 +38,15 @@
 %token <y_word> DIVL
 %token <y_word> CMP
 %token <y_word> MOVE
-%token <y_word> MOVEP
 %token <y_word> MOVEM
 %token <y_word> MOVEC
-%token <y_word> MOVES
+%token <y_word> MOVESP
 %token <y_word> SWAP
 %token <y_word> LINK
 %token <y_word> UNLK
 %token <y_word> TRAP
-%token <y_word> STOP
 %token <y_word> EXG
-%token <y_word> RTD
+%token <y_word> OP_IMM
 %token <y_word> BKPT
 %token <y_word> CALLM
 %token <y_word> CAS
@@ -58,8 +55,7 @@
 %token <y_word> CPBCC
 %token <y_word> CPDBCC
 %token <y_word> CPGEN
-%token <y_word> CPRESTORE
-%token <y_word> CPSAVE
+%token <y_word> CPSAVREST
 %token <y_word> CPSCC
 %token <y_word> CPTRAPCC
 %token <y_word> FPCR

diff --git a/mach/m68020/as/mach3.c b/mach/m68020/as/mach3.c
index 1db445a..87ff8e9 100644 (file)
--- a/mach/m68020/as/mach3.c
+++ b/mach/m68020/as/mach3.c
@@ -31,7 +31,7 @@
 0,     AREG,           07,             "sp",
 
 0,     PC,             0,              "pc",
-0,     ZPC,            0,              "zpc",
+0,     PC,             0200,           "zpc",
 
 0,     CREG,           04001,          "vbr",
 0,     CREG,           0,              "sfc",
@@ -190,9 +190,9 @@
 0,     CMP,            0,              "cmp",
 
 0,     MOVE,           0,              "move",
-0,     MOVEP,          0,              "movep",
+0,     MOVESP,         0,              "movep",
 0,     MOVEM,          0,              "movem",
-0,     MOVES,          0,              "moves",
+0,     MOVESP,         1,              "moves",
 0,     MOVEC,          0,              "movec",
 
 0,     SWAP,           0,              "swap",
@@ -203,7 +203,7 @@
 
 0,     TRAP,           0,              "trap",
 
-0,     STOP,           0,              "stop",
+0,     OP_IMM,         047162,         "stop",
 
 0,     CHK,            0,              "chk",
 
@@ -213,7 +213,7 @@
 
 0,     LEA,            0,              "lea",
 
-0,     RTD,            0,              "rtd",
+0,     OP_IMM,         047164,         "rtd",
 
 0,     BKPT,           0,              "bkpt",
 
@@ -238,8 +238,8 @@
 0,     CPTRAPCC,       0170170,        ".trap",
 0,     CPBCC,          0170200,        ".br", /* 'r' to distinguish from SIZE_B
                                                */
-0,     CPSAVE,         0170400,        ".save",
-0,     CPRESTORE,      0170500,        ".restore",
+0,     CPSAVREST,      0170400,        ".save",
+0,     CPSAVREST,      0170500,        ".restore",
 
 /* floating point coprocessor ... */
 

diff --git a/mach/m68020/as/mach4.c b/mach/m68020/as/mach4.c
index 4ea8138..a549d99 100644 (file)
--- a/mach/m68020/as/mach4.c
+++ b/mach/m68020/as/mach4.c
@@ -6,6 +6,10 @@
 /*
  *  Motorola 68020 syntax rules
  */
+/* Please do not add more terminal symbols. As it is, 127 terminal symbols
+   are used, and this is the limit for some "yacc" implementations,
+   notably the Ultrix one.
+*/
 
 operation
        :               {       instrp = instr;
@@ -123,14 +127,15 @@ instruction
                        }
        |       MOVE sizenon ea_ea
                        {       move($2);}
-       |       MOVEP sizedef ea_ea
-                       {       movep($2);}
        |       MOVEM sizedef regs ',' notimmreg
                        {       movem(0, $2, $3);}
        |       MOVEM sizedef notimmreg ',' regs
                        {       movem(1, $2, $5);}
-       |       MOVES sizedef ea_ea
-                       {       if (mrg_1 <= 017) {
+       |       MOVESP sizedef ea_ea
+                       {       if ($1 == 0) {
+                                       /* movep */
+                                       movep($2);
+                               } else if (mrg_1 <= 017) {
                                        T_EMIT2(007000 | $2 | mrg_2,0,0,0);
                                        T_EMIT2(mrg_1 << 12 | 04000,0,0,0);
                                        ea_2($2,ALT|MEM);
@@ -165,8 +170,8 @@ instruction
                        }
        |       SWAP DREG
                        {       T_EMIT2(044100 | $2,0,0,0);}
-       |       STOP imm
-                       {       T_EMIT2(047162, 0, 0, 0);
+       |       OP_IMM imm
+                       {       T_EMIT2($1, 0, 0, 0);
                                ea_2(SIZE_W, 0);
                        }
        |       LINK sizenon AREG ',' imm
@@ -177,10 +182,6 @@ instruction
                        {       fit(fit4($3));
                                T_EMIT2(047100|low4($3),0,0,0);
                        }
-       |       RTD imm
-                       {       T_EMIT2(047164,0,0,0);
-                               ea_2(SIZE_W, 0);
-                       }
        |       BKPT '#' absexp
                        {       fit(($3 & ~07) == 0);
                                T_EMIT2(044110 | low3($3),0,0,0);
@@ -335,9 +336,9 @@ areg_index
                        }
        ;
 areg   :       AREG
-       |       PC      {       mrg_2 |= PC_MODE;}
-       |       ZPC     {       mrg_2 |= PC_MODE;
-                               ffew_2 |= 0200; /* base-reg suppressed */
+       |       PC      {       mrg_2 |= PC_MODE;
+                               ffew_2 |= $1; /* base-reg suppressed for zpc */
+                               $$ = 0;
                        }
        ;
 index  :       reg sizedef scale
@@ -633,13 +634,13 @@ mm_op1    :   /* Coprocessor instructions; syntax may be changed (please).
                                 * NO EFFECTIVE ADDRESS IS CALCULATED (SYNTAX ?)
                                 */
                        }
-       |       CPRESTORE ea
+       |       CPSAVREST ea
                        {       T_EMIT2($1 | co_id | mrg_2,0,0,0);
-                               ea_2(SIZE_W, (mrg_2 & 070)==030 ? 0 : CTR);
-                       }
-       |       CPSAVE ea
-                       {       T_EMIT2($1 | co_id | mrg_2,0,0,0);
-                               ea_2(SIZE_W,(mrg_2 & 070)==020 ? 0 : CTR|ALT);
+                               if ($1 & 0100) {
+                                       /* restore */
+                                       ea_2(SIZE_W, (mrg_2 & 070)==030 ? 0 : CTR);
+                               }
+                               else ea_2(SIZE_W,(mrg_2 & 070)==020 ? 0 : CTR|ALT);
                        }
        |       CPSCC cp_cond ea
                        {       T_EMIT2($1 | co_id | mrg_2,0,0,0);
@@ -657,7 +658,7 @@ mm_op1      :   /* Coprocessor instructions; syntax may be changed (please).
                                T_EMIT2($2,0,0,0);
                        }
        ;
-cp_cond        :       '.' absexp
+cp_cond        :       DOT absexp
                        {       fit(fit6($2));
                                $$ = low6($2);
                        }

diff --git a/mach/vax4/as/mach0.c b/mach/vax4/as/mach0.c
index 89545f8..4fa097b 100644 (file)
--- a/mach/vax4/as/mach0.c
+++ b/mach/vax4/as/mach0.c
@@ -14,6 +14,8 @@
 
 #undef valu_t
 #define valu_t long
+#undef word_t
+#define word_t long
 #undef addr_t
 #define addr_t long
 

diff --git a/mach/vax4/as/mach2.c b/mach/vax4/as/mach2.c
index 09289db..bf07054 100644 (file)
--- a/mach/vax4/as/mach2.c
+++ b/mach/vax4/as/mach2.c
@@ -24,13 +24,18 @@
        Bx -    branch, size of offset determined by instruction
        Be -    extended conditional branch; the instruction may be replaced
                by a reverse-conditional branch over a branch or jump
+   To reduce the number of terminals, some instructions that have operands of
+   equal size are coded with an X instead of b, w, or l; these instructions
+   have the size in the high order word of the valu field. This is needed
+   because some yacc versions do not accept grammars with more than 127
+   terminal symbols.
 */
 
 %token <y_word> REG
-%token <y_word>        CASE_b_b_b, CASE_l_l_l, CASE_w_w_w
+%token <y_word>        CASE_X_X_X
 %token <y_word> OP0
-%token <y_word>        OP1_A, OP1_Bb, OP1_Bl, OP1_Bw, OP1_Bx, OP1_b, OP1_l, OP1_u,
-               OP1_w, OP1_Be
+%token <y_word>        OP1_A, OP1_Bx, OP1_u, OP1_Be
+%token <y_word>        OP1_BX, OP1_X
 %token <y_word>        OP2_A_A, OP2_A_l, OP2_b_b, OP2_b_l, OP2_b_u, OP2_b_w, OP2_l_A,
                OP2_l_Bb, OP2_l_b, OP2_l_l, OP2_l_u, OP2_l_w, OP2_u_b, OP2_u_l,
                OP2_u_u, OP2_u_w, OP2_w_b, OP2_w_l, OP2_w_u, OP2_w_w, OP2_l_Be

diff --git a/mach/vax4/as/mach3.c b/mach/vax4/as/mach3.c
index f5f7075..3fc7a96 100644 (file)
--- a/mach/vax4/as/mach3.c
+++ b/mach/vax4/as/mach3.c
@@ -65,9 +65,9 @@
 0,             OP2_b_b,        0x93,           "bitb",
 0,             OP2_w_w,        0xb3,           "bitw",
 0,             OP2_l_l,        0xd3,           "bitl",
-0,             OP1_b,          0x94,           "clrb",
-0,             OP1_w,          0xb4,           "clrw",
-0,             OP1_l,          0xd4,           "clrl",
+0,             OP1_X,          0x94|(1L<<16),  "clrb",
+0,             OP1_X,          0xb4|(2L<<16),  "clrw",
+0,             OP1_X,          0xd4|(4L<<16),  "clrl",
 0,             OP1_u,          0x7c,           "clrq",
 0,             OP1_u,          0x7cfd,         "clro",
 0,             OP2_b_b,        0x91,           "cmpb",
@@ -79,9 +79,9 @@
 0,             OP2_w_l,        0x32,           "cvtwl",
 0,             OP2_l_b,        0xf6,           "cvtlb",
 0,             OP2_l_w,        0xf7,           "cvtlw",
-0,             OP1_b,          0x97,           "decb",
-0,             OP1_w,          0xb7,           "decw",
-0,             OP1_l,          0xd7,           "decl",
+0,             OP1_X,          0x97|(1L<<16),  "decb",
+0,             OP1_X,          0xb7|(2L<<16),  "decw",
+0,             OP1_X,          0xd7|(4L<<16),  "decl",
 0,             OP2_b_b,        0x86,           "divb2",
 0,             OP3_b_b_b,      0x87,           "divb3",
 0,             OP2_w_w,        0xa6,           "divw2",
@@ -90,9 +90,9 @@
 0,             OP3_l_l_l,      0xc7,           "divl3",
 0,             OP4_l_u_l_l,    0x7b,           "ediv",
 0,             OP4_l_l_l_u,    0x7a,           "emul",
-0,             OP1_b,          0x96,           "incb",
-0,             OP1_w,          0xb6,           "incw",
-0,             OP1_l,          0xd6,           "incl",
+0,             OP1_X,          0x96|(1L<<16),  "incb",
+0,             OP1_X,          0xb6|(2L<<16),  "incw",
+0,             OP1_X,          0xd6|(4L<<16),  "incl",
 0,             OP2_b_b,        0x92,           "mcomb",
 0,             OP2_w_w,        0xb2,           "mcomw",
 0,             OP2_l_l,        0xd2,           "mcoml",
@@ -113,7 +113,7 @@
 0,             OP3_w_w_w,      0xa5,           "mulw3",
 0,             OP2_l_l,        0xc4,           "mull2",
 0,             OP3_l_l_l,      0xc5,           "mull3",
-0,             OP1_l,          0xdd,           "pushl",
+0,             OP1_X,          0xdd|(4L<<16),  "pushl",
 0,             OP3_b_l_l,      0x9c,           "rotl",
 0,             OP2_l_l,        0xd9,           "sbwc",
 0,             OP2_b_b,        0x82,           "subb2",
@@ -122,9 +122,9 @@
 0,             OP3_w_w_w,      0xa3,           "subw3",
 0,             OP2_l_l,        0xc2,           "subl2",
 0,             OP3_l_l_l,      0xc3,           "subl3",
-0,             OP1_b,          0x95,           "tstb",
-0,             OP1_w,          0xb5,           "tstw",
-0,             OP1_l,          0xd5,           "tstl",
+0,             OP1_X,          0x95|(1L<<16),  "tstb",
+0,             OP1_X,          0xb5|(2L<<16),  "tstw",
+0,             OP1_X,          0xd5|(4L<<16),  "tstl",
 0,             OP2_b_b,        0x8c,           "xorb2",
 0,             OP3_b_b_b,      0x8d,           "xorb3",
 0,             OP2_w_w,        0xac,           "xorw2",
@@ -174,22 +174,22 @@
 0,             OP4_u_u_u_Bw,   0x6ffd,         "acbh",
 0,             OP3_l_l_Bb,     0xf3,           "aobleq",
 0,             OP3_l_l_Bb,     0xf2,           "aoblss",
-0,             OP1_Bb,         0x14,           "bgtr",
-0,             OP1_Bb,         0x15,           "bleq",
-0,             OP1_Bb,         0x12,           "bneq",
-0,             OP1_Bb,         0x12,           "bnequ",
-0,             OP1_Bb,         0x13,           "beql",
-0,             OP1_Bb,         0x13,           "beqlu",
-0,             OP1_Bb,         0x18,           "bgeq",
-0,             OP1_Bb,         0x19,           "blss",
-0,             OP1_Bb,         0x1a,           "bgtru",
-0,             OP1_Bb,         0x1b,           "blequ",
-0,             OP1_Bb,         0x1c,           "bvc",
-0,             OP1_Bb,         0x1d,           "bvs",
-0,             OP1_Bb,         0x1e,           "bgequ",
-0,             OP1_Bb,         0x1e,           "bcc",
-0,             OP1_Bb,         0x1f,           "blssu",
-0,             OP1_Bb,         0x1f,           "bcs",
+0,             OP1_BX,         0x14|(1L<<16),  "bgtr",
+0,             OP1_BX,         0x15|(1L<<16),  "bleq",
+0,             OP1_BX,         0x12|(1L<<16),  "bneq",
+0,             OP1_BX,         0x12|(1L<<16),  "bnequ",
+0,             OP1_BX,         0x13|(1L<<16),  "beql",
+0,             OP1_BX,         0x13|(1L<<16),  "beqlu",
+0,             OP1_BX,         0x18|(1L<<16),  "bgeq",
+0,             OP1_BX,         0x19|(1L<<16),  "blss",
+0,             OP1_BX,         0x1a|(1L<<16),  "bgtru",
+0,             OP1_BX,         0x1b|(1L<<16),  "blequ",
+0,             OP1_BX,         0x1c|(1L<<16),  "bvc",
+0,             OP1_BX,         0x1d|(1L<<16),  "bvs",
+0,             OP1_BX,         0x1e|(1L<<16),  "bgequ",
+0,             OP1_BX,         0x1e|(1L<<16),  "bcc",
+0,             OP1_BX,         0x1f|(1L<<16),  "blssu",
+0,             OP1_BX,         0x1f|(1L<<16),  "bcs",
 0,             OP3_l_V_Bb,     0xe0,           "bbs",
 0,             OP3_l_V_Bb,     0xe1,           "bbc",
 0,             OP3_l_V_Bb,     0xe2,           "bbss",
@@ -227,15 +227,15 @@
 0,             OP3_l_V_Be,     0xe6,           "jbssi",
 0,             OP3_l_V_Be,     0xe7,           "jbcci",
 0,             OP1_Bx,         0x11,           "br",
-0,             OP1_Bb,         0x11,           "brb",
-0,             OP1_Bw,         0x31,           "brw",
+0,             OP1_BX,         0x11|(1L<<16),  "brb",
+0,             OP1_BX,         0x31|(2L<<16),  "brw",
 0,             OP1_Be,         0x11,           "jbr",
 0,             OP1_Bx,         0x10,           "bsb",
-0,             OP1_Bb,         0x10,           "bsbb",
-0,             OP1_Bw,         0x30,           "bsbw",
-0,             CASE_b_b_b,     0x8f,           "caseb",
-0,             CASE_w_w_w,     0xaf,           "casew",
-0,             CASE_l_l_l,     0xcf,           "casel",
+0,             OP1_BX,         0x10|(1L<<16),  "bsbb",
+0,             OP1_BX,         0x30|(2L<<16),  "bsbw",
+0,             CASE_X_X_X,     0x8f|(1L<<16),  "caseb",
+0,             CASE_X_X_X,     0xaf|(2L<<16),  "casew",
+0,             CASE_X_X_X,     0xcf|(4L<<16),  "casel",
 0,             OP1_A,          0x17,           "jmp",
 0,             OP1_A,          0x16,           "jsb",
 0,             OP0,            0x05,           "rsb",
@@ -250,15 +250,15 @@
 
 /* Miscellaneous instructions */
 
-0,             OP1_w,          0xb9,           "bicpsw",
-0,             OP1_w,          0xb8,           "bispsw",
+0,             OP1_X,          0xb9|(2L<<16),  "bicpsw",
+0,             OP1_X,          0xb8|(2L<<16),  "bispsw",
 0,             OP0,            0x03,           "bpt",
 0,             OP0,            0x00,           "halt",
 0,             OP6_l_l_l_l_l_l,0x0a,           "index",
-0,             OP1_l,          0xdc,           "movpsl",
+0,             OP1_X,          0xdc|(4L<<16),  "movpsl",
 0,             OP0,            0x01,           "nop",
-0,             OP1_w,          0xba,           "popr",
-0,             OP1_w,          0xbb,           "pushr",
+0,             OP1_X,          0xba|(2L<<16),  "popr",
+0,             OP1_X,          0xbb|(2L<<16),  "pushr",
 0,             OP0,            0xfc,           "xfc",
 
 /* Queue instructions */
@@ -419,17 +419,17 @@
    to the VAX-11 Architecture Reference Manual, Revision 6.1, 1982, the
    access type is b, which means that the operand is a branch displacement.
 */
-0,             OP1_Bw,         0xfeff,         "bugw",
-0,             OP1_Bl,         0xfdff,         "bugl",
+0,             OP1_BX,         0xfeff|(2L<<16),"bugw",
+0,             OP1_BX,         0xfdff|(4L<<16),"bugl",
 
 0,             OP3_b_w_A,      0x0c,           "prober",
 0,             OP3_b_w_A,      0x0d,           "probew",
 
 0,             OP0,            0x02,           "rei",
-0,             OP1_w,          0xbc,           "chmk",
-0,             OP1_w,          0xbd,           "chme",
-0,             OP1_w,          0xbe,           "chms",
-0,             OP1_w,          0xbf,           "chmu",
+0,             OP1_X,          0xbc|(2L<<16),  "chmk",
+0,             OP1_X,          0xbd|(2L<<16),  "chme",
+0,             OP1_X,          0xbe|(2L<<16),  "chms",
+0,             OP1_X,          0xbf|(2L<<16),  "chmu",
 
 0,             OP0,            0x06,           "ldpctx",
 0,             OP0,            0x07,           "svpctx",

diff --git a/mach/vax4/as/mach4.c b/mach/vax4/as/mach4.c
index 537b42f..aed186c 100644 (file)
--- a/mach/vax4/as/mach4.c
+++ b/mach/vax4/as/mach4.c
@@ -36,17 +36,13 @@ operation
        ;
 
 OP1_O
-       :       OP1_b           { opnd[0].size = 1; $$ = $1; }
-       |       OP1_w           { opnd[0].size = 2; $$ = $1; }
-       |       OP1_l           { opnd[0].size = 4; $$ = $1; }
+       :       OP1_X           { opnd[0].size = $1>>16; $$ = $1 & 0xffff; }
        |       OP1_A           { opnd[0].size = -2; $$ = $1; }
        |       OP1_u           { opnd[0].size = 0; $$ = $1; }
        ;
 
 OP1_B
-       :       OP1_Bb          { opnd[0].size = 1; $$ = $1; }
-       |       OP1_Bw          { opnd[0].size = 2; $$ = $1; }
-       |       OP1_Bl          { opnd[0].size = 4; $$ = $1; }
+       :       OP1_BX          { opnd[0].size = $1>>16; $$ = $1 & 0xffff; }
        ;
 
 OP2_O_O
@@ -217,14 +213,10 @@ OP6_O_O_O_O_O_O
        ;
 
 CASE_O_O_O
-       :       CASE_b_b_b      { opnd[0].size = 1; opnd[1].size = 1;
-                                 opnd[2].size = 1; $$ = $1;
-                               }
-       |       CASE_w_w_w      { opnd[0].size = 2; opnd[1].size = 2;
-                                 opnd[2].size = 2; $$ = $1;
-                               }
-       |       CASE_l_l_l      { opnd[0].size = 4; opnd[1].size = 4;
-                                 opnd[2].size = 4; $$ = $1;
+       :       CASE_X_X_X      { opnd[0].size = ($1>>16);
+                                 opnd[1].size = ($1>>16);
+                                 opnd[2].size = ($1>>16);
+                                 $$ = $1 & 0xffff;
                                }
        ;