--- /dev/null
+LIST
+Makefile
+compmodule
+end.s
+libem_s.a
--- /dev/null
+libem_s.a
+adi.s
+and.s
+blm.s
+cii.s
+cms.s
+com.s
+csa4.s
+csb4.s
+cuu.s
+dup.s
+dvi.s
+dvu.s
+error.s
+exg.s
+fakfp.s
+fat.s
+gto.s
+iaar.s
+ilar.s
+inn.s
+ior.s
+isar.s
+lar4.s
+loi.s
+mli.s
+mon.s
+ngi.s
+nop.s
+print.s
+rck.s
+return.s
+rmi.s
+rmu.s
+rol.s
+ror.s
+sar4.s
+sbi.s
+set.s
+sli.s
+sri.s
+sti.s
+stop.s
+strhp.s
+trp.s
+unknown.s
+xor.s
--- /dev/null
+# $Header$
+MACH=i386
+
+all: libem_o.a end.o
+
+install: all
+ ../../install libem_o.a tail_em
+ ../../install end.o end_em
+
+cmp: all
+ -../../compare libem_o.a tail_em
+ -../../compare end.o end_em
+
+
+end.o: end.s
+ $(MACH) -I../../../h -O -c end.s
+
+libem_o.a: libem_s.a
+ ASAR=aal ; export ASAR ;\
+ march . libem_o.a
+
+clean:
+ rm -f *.o libem_o.a
+
+opr :
+ make pr | opr
+
+pr:
+ @arch pv libem_s.a | pr -h `pwd`/libem_s.a
+ @pr `pwd`/end.s
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .adi
+
+ ! #bytes in ecx , top of stack in eax
+ .sect .text
+.adi:
+ pop ebx ! return address
+ cmp ecx,4
+ jne 9f
+ pop ecx
+ add eax,ecx
+ jmp ebx
+9:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .and
+
+ ! #bytes in ecx
+ ! save edi; it might be a register variable
+
+ .sect .text
+.and:
+ pop ebx ! return address
+ mov edx,edi
+ mov edi,esp
+ add edi,ecx
+ sar ecx,2
+1:
+ pop eax
+ and eax,(edi)
+ stos
+ loop 1b
+ mov edi,edx
+ jmp ebx
--- /dev/null
+.sect .text
+.define .blm
+
+ ! ecx: count in words
+.blm:
+ mov ebx,esp
+ mov eax,esi
+ mov edx,edi
+ mov edi,4(ebx)
+ mov esi,8(ebx)
+ rep movs
+ mov esi,eax
+ mov edi,edx
+ ret 8
+
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .cii
+
+.sect .text
+.cii:
+ pop ebx ! return address
+ ! pop ecx, dest. size
+ ! pop edx, src. size
+ ! eax is source
+ cmp edx,1
+ jne 2f
+ o16 cbw ! needs operand size toggle to convert
+ ! from one to two bytes.
+ cwde
+ mov edx,4
+ jmp 1f
+2:
+ cmp edx,2
+ jne 1f
+ cwde ! convert from 2 to 4 bytes
+ mov edx,4
+1:
+ cmp edx,ecx
+ jne 9f
+ cmp edx,4
+ jne 9f
+ jmp ebx
+9:
+.extern EILLINS
+.extern .fat
+ mov eax,EILLINS
+ push eax
+ jmp .fat
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .cms
+
+ ! #bytes in ecx
+ .sect .text
+.cms:
+ pop ebx ! return address
+ mov edx,esp
+ push esi
+ push edi
+ mov esi,edx
+ add edx,ecx
+ mov edi,edx
+ add edx,ecx
+ sar ecx,2
+ repe cmps
+ je 1f
+ inc ecx
+1:
+ pop edi
+ pop esi
+ mov esp,edx
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .com
+
+ ! #bytes in ecx
+ .sect .text
+.com:
+ mov ebx,esp
+ add ebx,4
+ sar ecx,2
+1:
+ not (ebx)
+ add ebx,4
+ loop 1b
+ ret
--- /dev/null
+if i386 -c $1 1>&2
+then echo `basename $1 $2`.o
+else exit 1
+fi
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .csa4
+
+.sect .text
+.csa4:
+ ! ebx, descriptor address
+ ! eax, index
+ mov edx,(ebx) ! default
+ sub eax,4(ebx)
+ cmp eax,8(ebx)
+ ja 1f
+ sal eax,2
+ add ebx,eax
+ mov ebx,12(ebx)
+ test ebx,ebx
+ jnz 2f
+1:
+ mov ebx,edx
+ test ebx,ebx
+ jnz 2f
+.extern ECASE
+.extern .fat
+ mov eax,ECASE
+ push eax
+ jmp .fat
+2:
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .csb4
+
+.sect .text
+.csb4:
+ !ebx, descriptor address
+ !eax, index
+ mov edx,(ebx)
+ mov ecx,4(ebx)
+1:
+ add ebx,8
+ dec ecx
+ jl 4f
+ cmp eax,(ebx)
+ jne 1b
+ mov ebx,4(ebx)
+2:
+ test ebx,ebx
+ jnz 3f
+.extern ECASE
+.extern .fat
+ mov eax,ECASE
+ push eax
+ jmp .fat
+3:
+ jmp ebx
+4:
+ mov ebx,edx
+ jmp 2b
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .ciu
+.define .cui
+.define .cuu
+
+.sect .text
+.ciu:
+.cui:
+.cuu:
+ pop ebx ! return address
+ ! pop ecx, dest. size
+ ! pop edx, source size
+ ! eax is source
+ cmp edx,ecx
+ jne 8f
+ jmp ebx
+8:
+.extern EILLINS
+.extern .fat
+ mov eax,EILLINS
+ push eax
+ jmp .fat
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .dup
+
+ ! #bytes in ecx
+ .sect .text
+.dup:
+ pop ebx ! return address
+ mov eax,esi
+ mov edx,edi
+ mov esi,esp
+ sub esp,ecx
+ mov edi,esp
+ sar ecx,2
+ rep movs
+ mov esi,eax
+ mov edi,edx
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .dvi
+
+ ! #bytes in eax
+ .sect .text
+.dvi:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ cwd
+ pop ecx
+ idiv ecx
+ push eax
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .dvu
+
+ ! #bytes in eax
+ .sect .text
+.dvu:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ xor edx,edx
+ pop ecx
+ div ecx
+ push eax
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define endtext,enddata,endbss
+.define _end,_etext,_edata
+
+ ! $Header$
+ .sect .text
+endtext:
+_etext:
+ .align 4
+ .sect .data
+enddata:
+_edata:
+ .align 4
+.sect .endsect
+_end:
+endbss:
+ .align 4
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .error
+.define .Xtrp
+
+ ! eax is trap number
+ ! all registers must be saved
+ ! because return is possible
+ ! May only be called with error no's <16
+.sect .text
+.error:
+ push ebp
+ push esi
+ push edi
+ push edx
+ push ecx
+ push ebx
+ push eax
+ mov ecx,eax
+ mov ebx,1
+ sal ebx,cl
+.extern .ignmask
+.extern .trp
+ test ebx,(.ignmask)
+ jne 2f
+ call .trp
+2:
+ pop eax
+ pop ebx
+ pop ecx
+ pop edx
+ pop edi
+ pop esi
+ pop ebp
+ ret
+
+.Xtrp:
+ cmp eax,16
+ jge 1f
+ call .error
+ ret
+1:
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.define .exg
+
+ ! #bytes in ecx
+.sect .text
+.exg:
+ push edi
+ mov esp,edi
+ add edi,8
+ mov ebx,edi
+ add ebx,ecx
+ sar ecx,2
+1:
+ mov eax,(ebx)
+ xchg eax,(edi)
+ mov (ebx),eax
+ loop 1b
+2:
+ pop edi
+ ret
--- /dev/null
+.define .adf4, .adf8, .sbf4, .sbf8, .mlf4, .mlf8, .dvf4, .dvf8
+.define .ngf4, .ngf8, .fif4, .fif8, .fef4, .fef8
+.define .cif4, .cif8, .cuf4, .cuf8, .cfi, .cfu, .cff4, .cff8
+.define .cmf4, .cmf8
+.sect .text
+.sect .rom
+.sect .data
+.sect .bss
+
+! $Header$
+
+ .sect .text
+.adf4:
+.adf8:
+.sbf4:
+.sbf8:
+.mlf4:
+.mlf8:
+.dvf4:
+.dvf8:
+.ngf4:
+.ngf8:
+.fif4:
+.fif8:
+.fef4:
+.fef8:
+.cif4:
+.cif8:
+.cuf4:
+.cuf8:
+.cfi:
+.cfu:
+.cff4:
+.cff8:
+.cmf4:
+.cmf8:
+ mov eax,18 ! illegal instruction EILLINS
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .fat
+
+.fat:
+.extern .trp
+.extern .stop
+ call .trp
+ call .stop
+ ! no return
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .gto
+
+.gto:
+ mov ebp,8(ebx)
+ mov esp,4(ebx)
+ jmp (ebx)
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .iaar
+
+.iaar:
+ pop ecx
+ pop edx
+ cmp edx,4
+.extern .unknown
+ jne .unknown
+ pop ebx ! descriptor address
+ pop eax ! index
+ pop edx ! array base
+ sub eax,(ebx)
+ mul 8(ebx)
+ mov ebx,edx
+ add ebx,eax
+ push ecx
+ ret
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .ilar
+
+.ilar:
+ pop ecx
+ pop edx
+.extern .unknown
+ cmp edx,4
+ jne .unknown
+ pop ebx ! descriptor address
+ pop eax ! index
+ push ecx
+.extern .lar4
+ jmp .lar4
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .inn
+
+ ! #bytes in ecx
+ ! bit # in eax
+.inn:
+ xor edx,edx
+ mov ebx,8
+ div ebx
+ mov ebx,esp
+ add ebx,4
+ add ebx,eax
+ cmp eax,ecx
+ jae 1f
+ movb al,(ebx)
+ mov ebx,edx
+ testb al,bits(ebx)
+ jz 1f
+ mov eax,1
+ jmp 2f
+1:
+ xor eax,eax
+2:
+ pop ebx
+ add esp,ecx
+ ! eax is result
+ jmp ebx
+
+ .sect .rom
+bits:
+ .data1 1,2,4,8,16,32,64,128
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .ior
+
+ ! #bytes in ecx
+.ior:
+ pop ebx ! return address
+ mov edx,edi
+ mov edi,esp
+ add edi,ecx
+ sar ecx,1
+1:
+ pop eax
+ or eax,(edi)
+ stos
+ loop 1b
+ mov edi,edx
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .isar
+
+.isar:
+ pop ecx
+ pop eax
+ cmp eax,4
+.extern .unknown
+ jne .unknown
+ pop ebx ! descriptor address
+ pop eax ! index
+ push ecx
+.extern .sar4
+ jmp .sar4
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .lar4
+
+.lar4:
+ ! ebx, descriptor address
+ ! eax, index
+ pop ecx
+ pop edx ! base address
+ push ecx
+ sub eax,(ebx)
+ mov ecx,8(ebx)
+ imul ecx
+ add edx,eax
+ sar ecx,1
+ jnb 1f
+ xor eax,eax
+ movb al,(edx)
+ pop ebx
+ push eax
+ jmp ebx
+1:
+ sar ecx,1
+ jnb 1f
+ xor eax,eax
+ o16 mov ax,(edx)
+ pop ebx
+ push eax
+ jmp ebx
+1:
+ mov edx,esi ! saved esi
+ mov eax,8(ebx)
+ pop ebx ! return address
+ sub esp,eax
+ mov eax,edi ! save edi
+ mov edi,esp
+ rep movs
+ mov edi,eax
+ mov esi,edx
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .loi
+.define .los
+
+ ! #bytes in ecx
+ ! address in ebx
+ ! save esi/edi. they might be register variables
+.los:
+ pop edx
+ mov eax,ecx
+ sar ecx,1
+ jnb 1f
+ xor eax,eax
+ movb al,(edx)
+ push eax
+ jmp edx
+1:
+ sar ecx,1
+ jnb 1f
+ xor eax,eax
+ o16 mov ax,(edx)
+ push eax
+ jmp edx
+1:
+ mov ebx,edx
+ mov edx,esi
+ sub esp,eax
+ jmp 1f
+
+.loi:
+ ! only called with size >= 4
+ mov edx,esi
+ mov esi,ebx
+ pop ebx
+ sub esp,ecx
+ sar ecx,2
+1:
+ mov eax,edi
+ mov edi,esp
+ rep movs
+ mov esi,edx
+ mov edi,eax
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .mli
+
+ ! #bytes in eax
+.mli:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ pop ecx
+ mul ecx
+ push eax
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .mon
+
+.mon:
+.extern .stop
+ call .stop
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .ngi
+
+ ! #bytes in eax
+.ngi:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop ecx
+ neg ecx
+ push ecx
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .nop
+.extern printd, printc, hol0
+
+SIO_S = 0xDA
+SIO_D = 0xD8
+RXRDY = 0x02
+
+.nop:
+ mov eax,(hol0)
+ call printd
+! movb al,' '
+! call printc
+! mov eax,esp
+! call printd
+!1:
+! inb SIO_S
+! andb al,RXRDY
+! jz 1b
+! inb SIO_D
+! call printc
+ movb al,'\n'
+ jmp printc
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define printc,printd,prints
+
+ ! argument in eax
+ ! uses ebx
+prints:
+ xchg eax,ebx
+1:
+ movb al,(ebx)
+ inc ebx
+ testb al,al
+ jz 2f
+ call printc
+ jmp 1b
+2:
+ ret
+
+ ! argument in eax
+ ! uses ecx and edx
+printd:
+ xor edx,edx
+ mov ecx,10
+ div ecx
+ test eax,eax
+ jz 1f
+ push edx
+ call printd
+ pop edx
+1:
+ xchg eax,edx
+ addb al,'0'
+
+ ! argument in eax
+printc:
+ push eax
+ mov ebx,esp
+ mov eax,1
+ push eax
+ push ebx
+ push eax
+ call _write
+ pop ebx
+ pop ebx
+ pop ebx
+ pop ebx
+ ret
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .rck
+
+ ! descriptor address in ebx
+ ! value in eax, must be left there
+.rck:
+ cmp eax,(ebx)
+ jl 2f
+ cmp eax,4(ebx)
+ jg 2f
+ ret
+2:
+ push eax
+.extern ERANGE
+.extern .error
+ mov eax,ERANGE
+ call .error
+ pop eax
+ ret
--- /dev/null
+.define .sdret, .dsret, .sret, .dret, .cret
+.sect .text
+
+.dsret:
+ pop edi
+.sret:
+ pop esi
+.cret:
+ mov esp,ebp
+ pop ebp
+ ret
+
+.sdret:
+ pop esi
+.dret:
+ pop edi
+ jmp .cret
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .rmi
+
+ ! #bytes in eax
+.rmi:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ cwd
+ pop ecx
+ idiv ecx
+ push edx
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .rmu
+
+ ! #bytes in eax
+.rmu:
+ pop ebx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ xor edx,edx
+ pop ecx
+ idiv ecx
+ push edx
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .rol
+
+ ! #bytes in eax
+.rol:
+ pop edx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ pop ecx
+ rol eax,cl
+ push eax
+ jmp edx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push edx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .ror
+
+ ! #bytes in eax
+.ror:
+ pop edx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ pop ecx
+ ror eax,cl
+ push eax
+ jmp edx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push edx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .sar4
+
+.sar4:
+ ! ebx, descriptor address
+ ! eax, index
+ pop ecx
+ pop edx ! base address
+ push ecx
+ sub eax,(ebx)
+ mov ecx,8(ebx)
+ push edx
+ imul ecx
+ pop edx
+ add edx,eax
+ sar ecx,1
+ jnb 1f
+ pop ebx
+ pop eax
+ movb (edx),al
+ jmp ebx
+1:
+ sar ecx,1
+ jnb 1f
+ pop ebx
+ pop eax
+ o16 mov (edx),ax
+ jmp ebx
+1:
+ pop ebx
+ xchg edi,edx ! edi = base address, edx is saved edi
+ mov eax,esi
+ mov esi,esp
+ rep movs
+ mov esp,esi
+ mov esi,eax
+ mov edi,edx
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .sbi
+
+ ! #bytes in ecx , top of stack in eax
+.sbi:
+ pop ebx ! return subress
+ cmp ecx,4
+ jne 1f
+ pop ecx
+ sub eax,ecx
+ neg eax
+ jmp ebx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .set
+
+ ! #bytes in ecx
+ ! bit # in eax
+.set:
+ pop ebx ! return address
+ xor edx,edx
+!ifdef create set
+ sub esp,ecx
+ push ebx
+ push edi
+ mov ebx,esp
+ xor edi,edi
+ sar ecx,1
+1:
+ mov 4(ebx)(edi),edx
+ add edi,4
+ loop 1b
+!endif
+ mov ebx,8
+ div ebx
+ cmp eax,edi
+ jae 2f
+ mov edi,edx
+ movb dl,bits(edi)
+ mov edi,esp
+ add edi,eax
+ orb 8(edi),dl
+ pop edi
+ ret
+2:
+.extern ESET
+.extern .trp
+ pop edi
+ mov eax,ESET
+ jmp .trp
+
+ .sect .rom
+bits:
+ .data1 1,2,4,8,16,32,64,128
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .sli
+
+ ! #bytes in eax
+.sli:
+ pop edx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ pop ecx
+ sal eax,cl
+ push eax
+ jmp edx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push edx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .sri
+
+ ! #bytes in eax
+.sri:
+ pop edx ! return address
+ cmp eax,4
+ jne 1f
+ pop eax
+ pop ecx
+ sar eax,cl
+ push eax
+ jmp edx
+1:
+.extern EODDZ
+.extern .trp
+ mov eax,EODDZ
+ push edx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .sti
+.define .sts
+
+ ! #bytes in ecx
+ ! address in ebx
+ ! save edi/esi. they might be register variables
+.sts:
+ pop edx
+ sar ecx,1
+ jnb 1f
+ pop eax
+ movb (ebx),al
+ jmp edx
+1:
+ sar ecx,1
+ jnb 1f
+ pop eax
+ o16 mov (ebx),ax
+ jmp edx
+1:
+ mov ebx,edx
+ mov edx,edi
+ jmp 1f
+.sti:
+ ! only called with count >> 4
+ mov edx,edi
+ mov edi,ebx
+ pop ebx
+ sar ecx,2
+1:
+ mov eax,esi
+ mov esi,esp
+ rep movs
+ mov esp,esi
+ mov edi,edx
+ mov esi,eax
+ jmp ebx
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .stop
+.stop:
+ int 3
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .strhp
+.extern .reghp, .limhp, EHEAP, .trp
+
+.strhp:
+ pop ebx
+ pop eax
+ mov (.reghp),eax
+ cmp eax,(.limhp)
+ jb 1f
+ add eax,02000
+ and eax,~0777
+ mov (.limhp),eax
+ push ebx
+ push eax
+ call _brk
+ pop ecx
+ pop ebx
+ cmp eax,-1
+ je 2f
+1:
+ jmp ebx
+2:
+ mov eax,EHEAP
+ push ebx
+ jmp .trp
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .trp
+.extern .trppc, .stop
+
+ ! eax is trap number
+.trp:
+ xor ebx,ebx
+ xchg ebx,(.trppc)
+ test ebx,ebx
+ jz 2f
+ push eax
+ call ebx
+ pop eax
+ ret
+2:
+ call .stop
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .unknown
+.extern EILLINS, .fat
+
+.unknown:
+ mov eax,EILLINS
+ push eax
+ jmp .fat
--- /dev/null
+.sect .text; .sect .rom; .sect .data; .sect .bss
+.sect .text
+.define .xor
+
+ ! #bytes in ecx
+.xor:
+ pop ebx ! return address
+ mov edx,edi
+ mov edi,esp
+ add edi,ecx
+ sar ecx,2
+1:
+ pop eax
+ xor eax,(edi)
+ stos
+ loop 1b
+ mov edi,edx
+ jmp ebx
public / ack.git / commitdiff