sio'X'_tx:
.ds 128
- .area _COMMONMEM
+ .area _SERIALDATA
sio'X'_error:
.db 0
sio'X'_rxover:
;
sio'X'_txd:
push af
+ switch
ld a,(_sio'X'_txl)
or a
jr z, tx_'X'_none
tx_'X'_none:
ld a,#0x28
out (CP),a ; silence tx interrupt
+ switchback
pop af
ei
RET
sio'X'_rx_ring:
push af
push hl
+ switch
sio'X'_rx_next:
in a,(DP) ; read ASAP
ld l,a
in a,(CP) ; RR 0
rra
jr c, sio'X'_rx_next
+ switchback
pop hl
pop af
ei
ld a,(sio'X'_error)
or #0x20 ; Fake an RX overflow bit
ld (sio'X'_rxover),a
+ switchback
+ pop hl
pop af
ei
RET
; CTS or DCD change
push af
push hl
+ switch
; RR0
in a,(CP)
ld (_sio'X'_state),a
; Clear the latched values
ld a,#0x10
out (CP),a
+ switchback
pop hl
pop af
ei
; Parity, RX Overrun, Framing
; Probably want to record them, but we at least must clean up
push af
+ switch
ld a,#1
out (CP),a ; RR1 please
in a,(CP) ; clear events
; Clear the latched values
ld a,#0x30
out (CP),a
+ switchback
pop af
ei
RET
; 128 byte ring buffer aligned to upper half (rx is in lower)
;
_sio'X'_txqueue:
+ switch
ld a,(_sio'X'_txl)
or a
jr z, sio'X'_direct_maybe ; if can tx now then do
set 7,l
ld (sio'X'_txe),hl
ld l,#0
+ switchback
ret
tx'X'_overflow:
; some kind of flag for error
ld l,#1
+ switchback
ret
sio'X'_direct_maybe:
; check RR
; bypass the queue and kickstart the interrupt machine
ld a,l
out (DP),a
+ switchback
ld l,#0
ret
; Call with DI
-_sio'X'_flow_control_off:
+sio'X'_flow_control_off:
ld a,#5
out(CP),a ; WR 5
ld a,(_sio'X'_wr5)
out (CP),a ; Turn off RTS
ret
-_sio'X'_flow_control_on:
+sio'X'_flow_control_on:
ld a,#5
out(CP),a ; WR 5
ld a,(_sio'X'_wr5)
out (CP),a ; Turn off RTS
ret
+_sio'X'_flow_control_off:
+ switch
+ call sio'X'_flow_control_off
+ switchback
+ ret
+
+_sio'X'_flow_control_on:
+ switch
+ call sio'X'_flow_control_on
+ switchback
+ ret
+
; DI required
; Returns char in L
;
; Caller responsible for making post buffer fetch decisions about
; RTS
_sio'X'_rx_get:
+ switch
ld a,(_sio'X'_rxl)
or a
ret z
ld (sio'X'_rxe),hl
scf
ld l,a
+ switchback
ret
; DI required
_sio'X'_error_get:
+ switch
ld hl,#sio'X'_error
ld a,(hl)
ld (hl),#0
ld l,a
+ switchback
ret
+.endm
+
+.macro _sio_read
+_sio_read:
+ switch
+ ld a,(hl)
+ ld l,a
+ switchback
+ ret
.endm
ttyready_t tty_writeready(uint8_t minor)
{
- if (minor == 1 && sio_txl[1] == 255)
+ if (minor == 1 && sio_txl[1] >= 127)
return TTY_READY_SOON;
- if (minor == 2 && sio_txl[0] == 255)
+ if (minor == 2 && sio_txl[0] >= 127)
return TTY_READY_SOON;
return TTY_READY_NOW;
}
sio_ports a
sio_ports b
+
+ .area _COMMONMEM
+
+;
+; Our data is fixed in common so nothing is needed
+;
+.macro switch
+.endm
+
+.macro switchback
+.endm
+
sio_handler_im2 a, SIOA_C, SIOA_D, reti
sio_handler_im2 b, SIOB_C, SIOB_D, reti