generate more than one fixup per instruction (I think).
%token <y_word> FCOND
%token <y_word> OP_LI
-%token <y_word> OP_LA
%token <y_word> HI16
%token <y_word> HA16
0, FPR, 31, "f31",
0, OP_LI, 0, "li",
-0, OP_LA, 0, "la",
0, HI16, 0, "hi16",
0, HA16, 0, "ha16",
0, LO16, 0, "lo16",
emit4(0x34000000 | (reg<<16) | (reg<<21) | (val & 0xffff)); /* ori reg, reg, value */
}
}
- | OP_LA GPR ',' expr
- {
- word_t reg = $2;
- word_t type = $4.typ & S_TYP;
- uint32_t val = $4.val;
-
- if (type != S_ABS)
- newrelo($4.typ, RELO2HI | FIXUPFLAGS);
- emit4(0x3c000000 | (reg<<16) | (val>>16)); /* lui reg, value */
- if (type != S_ABS)
- newrelo($4.typ, RELO2 | FIXUPFLAGS);
- emit4(0x34000000 | (reg<<16) | (reg<<21) | (val & 0xffff)); /* ori reg, reg, value */
- }
extabsexp
: absexp
int size = $3;
$$ = ((pos+size-1) << 5) | pos;
}
- ;
\ No newline at end of file
+ ;
ALUCC(EOR.I, "xori")
out:(int)reg = value:LABEL.I
- emit "la %out, $value"
+ emit "lui %out, hi16[$value]"
+ emit "ori %out, %out, lo16[$value]"
cost 4;
out:(int)reg = value:BLOCK.I
- emit "la %out, $value"
+ emit "lui %out, hi16[$value]"
+ emit "ori %out, %out, lo16[$value]"
cost 4;
out:(int)reg = value:CONST.I
long valu;
int sectindex = relo->or_sect - S_MIN;
extern struct outhead outhead;
+ uint32_t realaddress = outsect[sectindex].os_base + relo->or_addr
+ + relorig[sectindex].org_size;
/*
* Pick up previous value at location to be relocated.
*/
valu = getvalu(emit + (relo->or_addr - off), relo->or_type);
+ debug("read relocation from 0x%08x type 0x%x value 0x%08x symbol %d\n", realaddress, relo->or_type, valu, relo->or_nami);
/*
* Or_nami is an index in the name table of the considered module.
/*
* Now put the value back.
*/
+ debug("written fixed up relocation to 0x%08x type 0x%x value 0x%08x\n", realaddress, relo->or_type, valu, 0);
putvalu(valu, emit + (relo->or_addr - off), relo->or_type);
/*