dragon: rewrite the setup code

We load the first ROM with an unpacking routine and all the data. On boot
it sets up the SAM (must be done from ROM), the PIAs and then says hello,
clears memory and moves all the RAM objects from a DECB stream we add
into the ROM image.

With that done, it flips to the second ROM which together with the
cartridge mappings gives you a high 32K for kernel code, although it has
to be split using text1/text2 as we must stuff the exception vectors into
0xBFF0-0xBFFF - so double check the fuzix.map

diff --git a/Kernel/platform-dragon/setup.s b/Kernel/platform-dragon/setup.s
index 7cdb685..e2ca4ed 100644 (file)
--- a/Kernel/platform-dragon/setup.s
+++ b/Kernel/platform-dragon/setup.s
@@ -1,66 +1,179 @@
 ;
 ;      Raw machine set up for running in 'ROM' mode
 ;
-       .area .startup
+       ORG 0x8000
 
+; Convenient place to stuff the decb block after the bootstrap
+
+data_stream    EQU     0x8400
+
+start:
+       jmp main
+
+bootme:
+       lda 0xff22
+       anda #0xFB
+       sta 0xff22              ; after this we are in the other rom
+
+main:
        ; Optimise all this to use the direct page register as 0xffxx
        orcc #0x10
        ; Memory 64K dynamic (I guess...)
-       lda 0xffdd
-       lda 0xffda
-       ; Memory low map (cartridge high, RAM low)
-       lda 0xffde      ; Map type -> cartridge & rom
-       ; Serial
-       lda #0x01
-       sta 0xff06
-       lda #0x1e
-       sta 0xff07
-
-       ; 0.9Mhz
-       sta 0xffd6      ; R0
-       sta 0xffd8      ; R1
-       ; Put the video at 0x400
-       sta 0xffd2      ; F6 to F1 clear F0 set
-       sta 0xffd0
-       sta 0xffce
-       sta 0xffcc
-       sta 0xffca
-       sta 0xffc8
-       sta 0xffc7
-       ; SAM into ascii mode
-       sta 0xffc0
-       sta 0xffc2
-       sta 0xffc4
+       lda #0xFF
+       tfr a,dp        ; So we can short form all our I/O operations
+
+       SETDP 0xFF
+
+;
+;      Start by resetting the SAM registers in case we are a soft reset
+;
+       lda #0x10
+       ldx #0xffc0     ; SAM
+samwipe:
+       sta ,x++        ; X is now 0xffd0
+       deca
+       bne samwipe
+
+       sta 0xffc7      ; Display at 0x200
+       ;FIXME - DD or DB needed to get it right
+       sta 0xffdd      ; 64K dynamic RAM
 
        ; PIA0 A is all input
        ; PIA0 B is all output
        ; PIA1 A is mixed, both the same (input 0 only)
-       lda #0x4        ; enable access to DDR registers
-       sta 0xff01
-       sta 0xff03
-       sta 0xff21
-       sta 0xff23
-       lda #0x00
-       sta 0xff00
+
+       lda #0x04
+       sta 0xff23      ; Set 0xFF22 to be data
+       sta 0xff22      ; Ensure we don't glitch the ROM select bit
+
+       clr 0xff01      ; Control to zero - direction accessible
+       clr 0xff03
+       clr 0xff21      ; Do both PIA devices
+       clr 0xff23
+       clr 0xff00
        lda #0xff
-       sta 0xff02
-       lda #0xfe
-       sta 0xff21
-       sta 0xff23
-       lda #0x0        ; Disable access to DDR registers
+       sta 0xff02      ; Set PIA0 B as output (keyboard matrix)
+       lda #0x34
        sta 0xff01
        sta 0xff03
+
+       lda #0xfe
+       sta 0xff20      ; Set PIA1 A as output except bit 0
+                       ; cassette is an input strobe and DAC output
+       sta 0xff22      ; Set PIA1 B as output except bit 0
+                       ; 0 printer busy, 1= sound out, 3-7 VDG
+       lda #0x4        ; Disable access to DDR registers
        sta 0xff21
        sta 0xff23
 
-       ; VDG via PIA1
-       lda #0x00
-       ld 0xff22, a    ; Graphics, internal text rom
+       ; VDG via PIA1 (0), ROM 1
+       sta 0xff22      ; Graphics, internal text rom
 
        ;
        ; Say hello
        ;
-       ldx 0x400
-       lda #'H'
+       ldx #0x200
+cls:   lda #' '
+       sta ,x+
+       cmpx #0x800
+       bne cls
+
+       ldu #0x0200     ; U is our screen pointer
+       lds #0x7ffe
+       ldx #hello
+       bsr strout
+
+       ;
+       ;       Clear memory (we ought to tidily clear bits listed in
+       ;       a tweaked DECB but what the heck..
+
+       ldx #0x800
+wiper:
+       clr ,x+
+       cmpx #0x8000
+       bne wiper
+       ;
+       ;       Now the serious stuff - unpack the ROM into RAM
+       ;       using DECB format
+       ;
+
+       lda #0
+       tfr a,dp
+
+       SETDP 0
+
+       ldy #data_stream
+nextblock:
+       lda #'#'
+       sta ,u+                 ; progress
+       lda ,y+
+       bne postamble           ; all done
+       ldd ,y++                ; length
+       ldx ,y++                ; target
+nextbyte:
+       pshs a
+       lda ,y+
        sta ,x+
+       puls a
+       subd #1
+       cmpd #0
+       bne nextbyte
+       bra nextblock
+postamble:
+       inca
+       beq loaded_ok
+       ldx #fail
+       bsr strout
+failure:
+       bra failure
+
+loaded_ok:
+       ldx #loaded
+       bsr strout
+       jmp bootme
+
+strout:
+       lda #10
+       cmpa ,x
+       bne normch
+       leau 31,u
+       tfr u,d
+       andb #0xE0
+       tfr d,u
+       leax 1,x
+       bra strout
+normch:
+       lda ,x+
+       beq strodone
+       anda #0x3F
+       sta ,u+
+       bra strout
+strodone:
+       rts
+
+hello:  .ascii "FUZIX DRAGON64 ROM BOOT"
+       .byte 10
+       .ascii "LOADING BLOCKS: "
+       .byte 0
+fail:  .byte 10
+       .asciz "CORRUPT DECB BLOCK"
+loaded:        .byte 10
+       .ascii "RAM BLOCKS LOADED"
+       .byte 10
+       .byte 0
 
+
+       align 0xBFF0
+
+;
+;      Included if we are replacing the basic ROM and magically mapped from
+;      the ROM top (0xBFF0->FFF0)
+;
+           .dw 0x3634          ; Reserved
+           .dw 0x0100          ; Make these COCO/Dragon style
+           .dw 0x0103
+           .dw 0x010f
+           .dw 0x010c
+           .dw 0x0106
+           .dw 0x0109
+           .dw main            ; Startup vector