Initial revision

diff --git a/mach/m68k4/libem/aar.s b/mach/m68k4/libem/aar.s
new file mode 100644 (file)
index 0000000..c43261e
--- /dev/null
+++ b/mach/m68k4/libem/aar.s
@@ -0,0 +1,36 @@
+.define        .aar
+.sect .text
+.sect .rom
+.sect .data
+.sect .bss
+
+.sect .text
+       ! (on entry d0 contains the integer size in the descriptor)
+.aar:
+       cmp.l   #4, d0
+       beq     9f
+       move.l  #EILLINS, -(sp)
+       jmp     .fatal
+9:
+       ! register usage:
+       ! a0: descriptor address
+       ! a1: base address
+       ! d0: index
+
+       ! The address is calculated by taking the relative index
+       ! (index - lower bound), multiplying that with the element
+       ! size and adding the result to the array base address.
+
+       move.l  (sp)+,a1        ! return address
+       move.l  (sp)+, a0       ! descriptor address
+       move.l  (sp)+, d0       ! index
+       sub.l   (a0), d0        ! relative index
+       move.l  a1,-(sp)
+       move.l  d0, -(sp)
+       move.l  8(a0), -(sp)    ! # bytes / element
+       jsr     .mlu
+       move.l  (sp)+,a1
+       move.l  (sp)+, a0       ! array base address
+       lea     0(a0, d1.l), a0 ! address of array element
+       jmp     (a1)
+.align 2

diff --git a/mach/m68k4/libem/lar.s b/mach/m68k4/libem/lar.s
new file mode 100644 (file)
index 0000000..8deec6f
--- /dev/null
+++ b/mach/m68k4/libem/lar.s
@@ -0,0 +1,56 @@
+.define        .lar
+.sect .text
+.sect .rom
+.sect .data
+.sect .bss
+.sect .text
+       ! (on entry d0 contains the integer size in the descriptor)
+.lar:
+       cmp.l   #4, d0
+       beq     9f
+       move.l  #EILLINS, -(sp)
+       jmp     .fatal
+9:
+       ! register usage:
+       ! a0: descriptor address, later base addres
+       ! a1: return address
+       ! d0: index
+       ! d2: #bytes / element
+
+       ! For address calculation; see comment in 'aar.s'.
+
+       move.l  (sp)+, a1       ! return address
+       move.l  (sp)+, a0       ! descriptor address
+       move.l  (sp)+, d0       ! index
+       sub.l   (a0), d0        ! relative index
+       move.l  8(a0), d2       ! #bytes / element
+       move.l  (sp)+, a0       ! array base address
+       clr.l   d1
+       cmp.l   #1, d2
+       bne     2f
+       move.b  0(a0, d0.l), d1 ! one byte element
+       move.l  d1, -(sp)
+       bra     5f
+2:
+       cmp.l   #2, d2
+       bne     4f
+       asl.l   #1, d0
+       move.w  0(a0, d0.l), d1 ! two byte element
+       move.l  d1, -(sp)
+       bra     5f
+4:     
+       move.l  a0,-(sp)
+       move.l  d0, -(sp)
+       move.l  d2, -(sp)
+       jsr     .mlu
+       move.l  (sp)+,a0
+       add.l   d1, a0          ! address of 4n byte element
+       add.l   d2, a0          ! because of predecrement
+       asr.l   #2, d2
+       sub.l   #1, d2
+1:
+       move.l  -(a0), -(sp)
+       dbf     d2, 1b
+5:
+       jmp     (a1)
+.align 2

diff --git a/mach/m68k4/libem/sar.s b/mach/m68k4/libem/sar.s
new file mode 100644 (file)
index 0000000..349402d
--- /dev/null
+++ b/mach/m68k4/libem/sar.s
@@ -0,0 +1,58 @@
+.define        .sar
+.sect .text
+.sect .rom
+.sect .data
+.sect .bss
+
+.sect .text
+       ! (on entry d0 contains the integer size in the descriptor)
+.sar:
+       cmp.l   #4, d0
+       beq     9f
+       move.l  #EILLINS, -(sp)
+       jmp     .fatal
+9:
+       ! register usage:
+       ! a0: descriptor address, later base address
+       ! a1: return address
+       ! d0: index
+       ! d2: # bytes / element
+
+       ! For address calculation; see comment in 'aar.s'.
+       ! If the element size is a fraction of EM_WSIZE (4)
+       ! the calculation is done by adding.
+
+       move.l  (sp)+,a1        ! return address
+       move.l  (sp)+, a0
+       move.l  (sp)+, d0
+       sub.l   (a0), d0
+       move.l  8(a0), d2       ! # bytes / element
+       move.l  (sp)+, a0
+       clr.l   d1
+       cmp.l   #1, d2
+       bne     2f
+       move.l  (sp)+, d1
+       move.b  d1, 0(a0, d0.l) ! store one byte element
+       bra     5f
+2:
+       cmp.l   #2, d2
+       bne     4f
+       asl.l   #1, d0
+       move.l  (sp)+, d1
+       move.w  d1, 0(a0, d0.l) ! store two byte element
+       bra     5f
+4:                             ! here: 4n byte element
+       move.l  a0,-(sp)
+       move.l  d0, -(sp)
+       move.l  d2, -(sp)
+       jsr     .mlu
+       move.l  (sp)+,a0
+       add.l   d1, a0          ! address of 4n byte element
+       asr.l   #2, d2
+       sub.l   #1, d2
+1:
+       move.l  (sp)+, (a0)+
+       dbf     d2, 1b
+5:
+       jmp     (a1)
+.align 2