char tbuf1[TTYSIZ];
char tbuf2[TTYSIZ];
-uint8_t ser_type;
+uint8_t ser_type = 1;
struct s_queue ttyinq[NUM_DEV_TTY + 1] = { /* ttyinq[0] is never used */
{NULL, NULL, NULL, 0, 0, 0},
SIOA_C = 0; // read register 0
ca = SIOA_C;
- if (ca & 1) {
+ if (ca & 1)
tty_inproc(1, SIOA_D);
- }
if (ca & 4) {
tty_outproc(1);
SIOA_C = 5 << 3; // reg 0 CMD 5 - reset transmit interrupt pending
}
-
SIOB_C = 0; // read register 0
cb = SIOB_C;
- if (cb & 1) {
+ if (cb & 1)
tty_inproc(2, SIOB_D);
- }
if (cb & 4) {
tty_outproc(2);
SIOB_C = 5 << 3; // reg 0 CMD 5 - reset transmit interrupt pending
}
}
+static char hex[] = { "0123456789ABCDEF" };
+
void tty_putc(uint8_t minor, unsigned char c)
{
if (ser_type == 1) {
{
}
+/* Be careful here. We need to peek at RR but we must be sure nobody else
+ interrupts as we do this. Really we want to switch to irq driven tx ints
+ on this platform I think. Need to time it and see
+
+ An asm common level tty driver might be a better idea */
ttyready_t tty_writeready(uint8_t minor)
{
+ irqflags_t irq;
uint8_t c;
if (ser_type == 1) {
+ irq = di();
if (minor == 1) {
SIOA_C = 0; /* read register 0 */
c = SIOA_C;
+ irqrestore(irq);
if (c & 0x04) /* THRE? */
return TTY_READY_NOW;
return TTY_READY_SOON;
} else if (minor == 2) {
SIOB_C = 0; /* read register 0 */
c = SIOB_C;
+ irqrestore(irq);
if (c & 0x04) /* THRE? */
return TTY_READY_NOW;
return TTY_READY_SOON;
}
+ irqrestore(irq);
} else if (ser_type == 2 && minor == 1) {
c = ACIA_C;
if (c & 0x02) /* THRE? */
; 2014-02-19 Sergey Kiselev
; RC2014 hardware specific code
- .module zeta_v2
+ .module rc2014
; exported symbols
.globl init_hardware
.globl map_process_always
.globl map_save
.globl map_restore
- .globl _irqvector
.globl platform_interrupt_all
.globl mpgsel_cache
.globl _kernel_pages
out (c),b
in a,(c)
sub d
- jr z, is_sio
+;;FIXME jr z, is_sio
+ jr is_sio
; We have however pooped on the 68B50 setup so put it back into
; a sensible state.
ld a,#0x03
ld a,#0x02
out (SIOB_C),a
- ld a,#SIO_IV ; INTERRUPT VECTOR ADDRESS
+ ld a,#SIO_IV ; INTERRUPT VECTOR ADDRESS (needs to go)
out (SIOB_C),a
ld a,#0x03
ld a,#180 ; time constant = 180
out (CTC_CH1),a ; set CH1 time constant
- ld hl,#intvectors
- ld a,l
- and #0xF8 ; get bits 7-3 of int. vectors table
- out (CTC_CH0),a ; send it to CTC
-
; Done CTC Stuff
; ---------------------------------------------------------------------
- ld hl,#intvectors
- ld a,h ; get bits 15-8 of int. vectors table
- ld i,a ; load to I register
- im 2 ; set Z80 CPU interrupt mode 2
+ im 1 ; set Z80 CPU interrupt mode 1
serial_up:
jp _init_hardware_c ; pass control to C, which returns for us
.area _COMMONMEM
;=========================================================================
-; Interrupt stuff
-;=========================================================================
-; IM2 interrupt verctors table
-; Note: this is linked after the udata block, so it is aligned on 256 byte
-; boundary
-intvectors:
- .dw ctc0_int ; CTC CH0 used as prescaler for CH1
- .dw ctc1_int ; timer interrupt handler
- .dw serial_int ; UART interrupt handler
- .dw ppi_int ; PPI interrupt handler
- .dw sio_int ; SIO interrupt handler
-
-_irqvector:
- .db 0 ; used to identify interrupt vector
-
-; CTC CH0 shouldn't be used to generate interrupts
-; but we'll implement it just in case
-ctc0_int:
- push af
- xor a ; IRQ vector = 0
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
-
-; periodic timer interrupt
-ctc1_int:
- push af
- ld a,#1 ; IRQ vector = 1
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
-
-; UART interrupt
-serial_int:
- push af
- ld a,#2 ; IRQ vector = 2
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
-
-; PPI interrupt - not used for now
-ppi_int:
- push af
- ld a,#3 ; IRQ vector = 3
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
-
-; SIO interrupt
-sio_int:
- push af
- ld a,#4 ; IRQ vector = 4
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
-
-; int38h handler
-; Calls interrupt_handler with irqvector of 0x38
-; For SIO/2, nothing will happen, since it uses IM2
-; For ACIA, serial interrupt handler will execute
-int38h_int:
- push af
- ld a, #'B'
- out (VFD_D),a
- ld a,#0x38 ; not a real vector, just a signal that the 0x38h occurred
- ld (_irqvector),a ; store it
- pop af
- jp interrupt_handler
platform_interrupt_all:
ret
; now install the interrupt vector at 0x0038
ld a,#0xC3 ; JP instruction
ld (0x0038),a
- ld hl,#int38h_int
+ ld hl,#interrupt_handler
ld (0x0039),hl
; set restart vector for UZI system calls