px4plus: carry on fleshing out all the I/O interfaces

diff --git a/Kernel/Makefile b/Kernel/Makefile
index b560e17..713441a 100644 (file)
--- a/Kernel/Makefile
+++ b/Kernel/Makefile
@@ -13,8 +13,8 @@ TARGET_LIST = platform-nc100 platform-micropack platform-pcw8256 platform-socz80
 #export TARGET = p112
 #export TARGET = pcw8256
 #export TARGET = plus3
-#export TARGET = px4plus
-export TARGET = socz80
+export TARGET = px4plus
+#export TARGET = socz80
 #export TARGET = tgl6502
 #export TARGET = trs80
 #export TARGET = ubee

diff --git a/Kernel/platform-px4plus/cpu7508.s b/Kernel/platform-px4plus/cpu7508.s
new file mode 100644 (file)
index 0000000..92abf6f
--- /dev/null
+++ b/Kernel/platform-px4plus/cpu7508.s
@@ -0,0 +1,69 @@
+;
+;      7508 co-processor support
+;
+               .module cpu7508
+
+               .area _CODE
+
+c7508_cmdbyte:
+               ; Wait for the 7508 to go ready
+               in a, (0x05)
+               and 4
+               jr z, c7508_cmdbyte
+               ; Write the command byte
+               ld a, c
+               out (0x6), a
+               ; Clear the 7508 ready signal
+               ld a, #2
+               out (0x01), a
+               ret
+
+c7508_waitrsp:
+               in a, (0x05)
+               and 4
+               jr z, c7508_waitrsp
+               ret
+
+c7508_int:     ; The 7508 wants us to ask it for status
+               ld c, #0x02
+               call c7508_cmdbyte
+               call c7508_waitrsp
+               in a, (0x06)
+               cp #0xC0
+               jr c, c7508_keyin
+               bit 5, a
+               call nz, c7508_1sec
+               bit 4, a
+               call nz, c7508_z80reset
+               bit 3, a
+               call nz, c7508_7508reset
+               bit 2, a
+               call nz, c7508_powerfail
+               bit 1, a
+               call nz, c7508_alarm
+               bit 0, a
+               ret z
+               ; power switch
+               ; FIXME
+               ret
+c7508_alarm:
+               ret
+c7508_powerfail:
+               ret
+c7508_7508reset:
+               ret
+c7508_z80reset:
+               ret
+c7508_1sec:
+               push af
+               ld hl, _rtc_clock
+               inc (hl)
+               pop af
+               ret
+
+c7508_keyin:
+               ; FIXME
+               ret
+
+               .area _DATA
+_rtc_clock:    .db 0

diff --git a/Kernel/platform-px4plus/px4plus.s b/Kernel/platform-px4plus/px4plus.s
index a73e7cb..ebae1e5 100644 (file)
--- a/Kernel/platform-px4plus/px4plus.s
+++ b/Kernel/platform-px4plus/px4plus.s
@@ -21,6 +21,8 @@
            .globl _carttype
 
            .globl platform_interrupt_all
+           .globl interrupt_fast
+           .globl _sio_count
 
             ; exported debugging tools
             .globl _trap_monitor
@@ -106,6 +108,13 @@ init_early:
             ret
 
 init_hardware:
+           ; FIXME: set video base and display properties first
+           ld a, #VIDBAEE
+           out (0x08), a               ; Video at 0xF800
+           ; Reset hardware scrolling
+           ld a, #0x80                 ; On, Y offset 0
+           out (0x09), a
+
             ; set system RAM size
            ; We have 64K RAM + 64K ROM to immediate hand, but we should
            ; try and include the "swap" like RAM here to give a sensible
@@ -137,35 +146,7 @@ noramcart:
            sbc hl, de
             ld (_procmem), hl
 
-            ; set up interrupt vectors for the kernel
-            ld hl, #0
-            push hl
-           push af
-            call _program_vectors
-           pop af
-            pop hl
-
-           ; IRQ enables
-           ld a, #0xB          ; OVF (timer), RXRDY (gapnio), 7508
-           out (0x04), a
-
-           push af
-           call _vtinit
-           pop af
-            im 1 ; set CPU interrupt mode
-            ret
-
-
-;------------------------------------------------------------------------------
-; COMMON MEMORY PROCEDURES FOLLOW
-
-            .area _COMMONMEM
-
-
-_program_vectors:
-            ; we are called, with interrupts disabled, by both newproc() and crt0
-           ; will exit with interrupts off
-
+           ; We don't bank 0x00-0xFF so we can do the vectors once at boot
             ; write zeroes across all vectors
             ld hl, #0
             ld de, #1
@@ -193,11 +174,26 @@ _program_vectors:
             ld hl, #nmi_handler
             ld (0x0067), hl
 
-           ; our platform has a "true" common area, if it did not we would
-           ; need to copy the "common" code into the common area of the new
-           ; process.
+           ; IRQ enables
+           ld a, #0xB          ; OVF (timer), RXRDY (gapnio), 7508
+           out (0x04), a
+
+           push af
+           call _vtinit
+           pop af
+            im 1 ; set CPU interrupt mode
+            ret
+
+
+;------------------------------------------------------------------------------
+; COMMON MEMORY PROCEDURES FOLLOW
+
+            .area _COMMONMEM
+
+
+_program_vectors:
+           ret
 
-           ; falls through
 
 map_kernel: 
 map_kernel_restore:

diff --git a/Kernel/platform-px4plus/sio-asm.s b/Kernel/platform-px4plus/sio-asm.s
new file mode 100644 (file)
index 0000000..8ace89e
--- /dev/null
+++ b/Kernel/platform-px4plus/sio-asm.s
@@ -0,0 +1,54 @@
+;
+;      Asm support sections of the SIO logic
+;
+
+               .module sioasm
+
+               .area _CODE
+
+_sio_set_irq:
+       ld a, #0x04
+       out (4), a                      ; only IRQ is FRC
+       ld hl, #0
+       ld (_sio_count), hl
+       ld hl, #interrupt_fast
+       ; A 16bit LD is not interruptible so this is safe */
+       ld (0x0039), hl
+       ret
+
+_sio_release_irq:
+       ld a, r
+       push af
+       di
+       ld a, #0x0B                     ; FRC, ART and 7508
+       out (4), a
+       ld hl, (_sio_count)
+       ld (_missed_interrupts), hl
+       ld hl, #interrupt_handler
+       ld (0x0039), hl
+       pop af
+       ret po          ; CMOS
+       ei
+       ret
+
+               .area _COMMONMEM
+;
+;      We need to do special IRQ handling when doing SIO transfers
+;      At this point only the FRC overflow interrupt is enabled
+;
+interrupt_fast:
+           push af
+           push hl
+           ld a, #4
+           out (2), a                  ; ack the FRC interrupt
+           ld hl, _sio_count
+           inc (hl)
+           pop hl
+           pop af
+           ret
+_sio_count:
+           .db 0
+_missed_interrupts:
+           .db 0
+
+

diff --git a/Kernel/platform-px4plus/sio.c b/Kernel/platform-px4plus/sio.c
index 6505683..eb33c49 100644 (file)
--- a/Kernel/platform-px4plus/sio.c
+++ b/Kernel/platform-px4plus/sio.c
@@ -41,10 +41,12 @@ void sio_write(uint8_t *buf, int len)
 
 int sio_read(uint8_t *buf, int len)
 {
-  /* FIXME: timeouts etc */
   while(len--) {
     while(!(artsr & 2))
-      *buf++ = artwr;
+     if (sio_count >= 1000)            /* 10 seconds */
+      return -ETIMEDOUT;
+    *buf++ = artwr;
+    sio_count = 0;
   }
   return 0;
 }

diff --git a/Kernel/platform-px4plus/sio.h b/Kernel/platform-px4plus/sio.h
index ea67ec1..19ed538 100644 (file)
--- a/Kernel/platform-px4plus/sio.h
+++ b/Kernel/platform-px4plus/sio.h
@@ -4,10 +4,16 @@
 extern int select_sio(void);
 extern void deselect_sio(int old);
 
+extern void sio_set_irq(void);
+extern void sio_release_irq(void);
+
 extern void sio_write(uint8_t *buf, int len);
 extern int sio_read(uint8_t *buf, int len);
 
 /* These don't truely belong here but it will do for now */
 extern void read_from_bank(void);
 
+extern uint8_t sio_count;
+extern uint8_t missed_interrupts;
+
 #endif
\ No newline at end of file