pcw8256,fdc765: not the architectural question around banking and swap

Basically the problem is this:

On a 16K banked machine we have 0x0000-0xBFFF holding user code and we can
switch between processes low 48K with gay abandon. However the top 16K holds
process memory, common, *and* our stacks.

What probably needs to happen is that either we bounce such buffers (slow) or
teach the swap device driver in the platform to do bank flipping.

The problem with this last one is that
- it has to be done per platform
- some machines have brain damaged banking where a given address in a bank
  cannot be remapped to a different virtual address

Unfortunately it's not obvious how to create a generic solution that doesn't
punish sensibly designed machines.

diff --git a/Kernel/platform-pcw8256/fdc765.s b/Kernel/platform-pcw8256/fdc765.s
index ad5acd3..5f76b8a 100644 (file)
--- a/Kernel/platform-pcw8256/fdc765.s
+++ b/Kernel/platform-pcw8256/fdc765.s
@@ -286,7 +286,11 @@ _fd765_cmd3:       call _fd765_intwait
                jr fd765_cmdop
 
 ;
-;      Needs to land in common memory
+;      Where to put this ? As we may flip between processes including high
+;      pages it is not clear where this data belongs. For now keep it in
+;      common. Swap + banked raises some architectural issues (where is the
+;      stack going ????) so it may be better to address this in the core
+;      swap code instead. For non swap cases common will do fine for now.
 ;
 
 _fd765_buffer: .dw 0           ; Buffer pointer