v65c816-big: Further fixups

This is enough to get os to taking an interrupt at which point it all goes
down the pan.

- Added a hack for the cc65 jmpvec problem
- Corrected data segment packing (was 512 bytes out)
- Fixed stack locations (I think)

diff --git a/Kernel/platform-v65c816-big/Makefile b/Kernel/platform-v65c816-big/Makefile
index 5a5c77c..8756982 100644 (file)
--- a/Kernel/platform-v65c816-big/Makefile
+++ b/Kernel/platform-v65c816-big/Makefile
@@ -48,4 +48,4 @@ image:
        dd if=../fuzix.bin of=fuzix.img bs=256 skip=255 count=1
        dd if=/dev/zero of=fuzix.img bs=256 seek=1  count=2
        dd if=fuzix.i of=fuzix.img bs=256 seek=3 count=239
-       dd if=fuzix.d of=fuzix.img bs=256 seek=242 count=10
+       dd if=fuzix.d of=fuzix.img bs=256 skip=2 seek=242 count=10

diff --git a/Kernel/platform-v65c816-big/commonmem.s b/Kernel/platform-v65c816-big/commonmem.s
index 923393c..65420be 100644 (file)
--- a/Kernel/platform-v65c816-big/commonmem.s
+++ b/Kernel/platform-v65c816-big/commonmem.s
@@ -30,9 +30,6 @@
 ;
 _ub:    ; first 512 bytes: starts with struct u_block, with the kernel stack working down from above
 _udata:
-kstack_base:
-       .res 256,0
-kstack_top:
 kstackc_base:
        .res 256,0
 kstackc_top:
@@ -42,11 +39,22 @@ kstackc_top:
 ;
        .bss
 
-istack_base:
-       .res 64,0                       ; should be tons
-istack_top:
 istackc_base:
        .res 254,0                      ; overkill - tune me
 istackc_top:
 istack_switched_sp:
        .word 0
+
+
+;
+;      Stacks go in bank 0 0100-02FF
+;
+       .segment "STACK"
+
+kstack_base:
+       .res 256,0
+kstack_top:
+
+istack_base:
+       .res 64,0                       ; should be tons
+istack_top:

diff --git a/Kernel/platform-v65c816-big/kernel.def b/Kernel/platform-v65c816-big/kernel.def
index a86dd42..f77baa7 100644 (file)
--- a/Kernel/platform-v65c816-big/kernel.def
+++ b/Kernel/platform-v65c816-big/kernel.def
@@ -1,7 +1,7 @@
 ; UZI mnemonics for memory addresses etc
 
 ; (this is struct u_data from kernel.h)
-U_DATA                  .set $0100     ; stomps over bootstrap
+U_DATA                  .set $0000     ; stomps over bootstrap
 ; 256+256              (U, kstack copy, k C stack copy)
 U_DATA__TOTALSIZE       .set $0200
 U_DATA_STASH           .set $FC00      ; leaves FFxx for vectors and stubs
@@ -14,7 +14,7 @@ KERNEL_FAR            .set $020000    ; 24 bit
 
 ; Add this to twice the bank number to get the high 8bits of the 16bit CPU stack
 ; for this process
-STACK_BANKOFF          .set $00        ; 0400-FDFF
+STACK_BANKOFF          .set $FE        ; 0400-FDFF
 ; Direct page for IRQ processing (saves us saving/restoring DP registers)
 ; Can probably use the same page as the IRQ CPU stack... FIXME
 ; FIXME clashes with end of stack banks

diff --git a/Kernel/platform-v65c816-big/ld65.cfg b/Kernel/platform-v65c816-big/ld65.cfg
index 4fbb56d..6d3a644 100644 (file)
--- a/Kernel/platform-v65c816-big/ld65.cfg
+++ b/Kernel/platform-v65c816-big/ld65.cfg
@@ -7,6 +7,7 @@
 MEMORY {
 #Bank0
        RAMZ:   start = $0000, size = $0100, type = rw, fill = yes;
+       STACKS: start = $0100, size = $0300, type = rw, fill = yes;
        USEG:   start = $0400, size = $FA00, type = rw, fill = yes;
        IO:     start = $FE00, size = $0100, type = rw, fill = yes;
        STUB:   start = $FF00, size = $00E0, type = rw, fill = yes;
@@ -23,6 +24,8 @@ SEGMENTS {
 
        COMMONDATA:     load = UDATA, type = bss;
 
+       STACK:          load = STACKS, type = rw;
+
        START:          load = MAIN, type = ro;
        CODE:           load = MAIN, type = ro, define = yes;
 

diff --git a/Kernel/platform-v65c816-big/v65.s b/Kernel/platform-v65c816-big/v65.s
index a9eac6c..9a1e47e 100644 (file)
--- a/Kernel/platform-v65c816-big/v65.s
+++ b/Kernel/platform-v65c816-big/v65.s
@@ -76,7 +76,7 @@ irq_on:
 ;      This could go in discard once we make that useful FIXME
 ;
 init_early:
-       lda     #1
+       lda     #3
        sep     #$30
        .a8
        .i8
@@ -103,7 +103,7 @@ common_patch:
        pla
        plb                             ; bank to kernel bank
        inc
-       cmp     #8
+       cmp     #128
        bne     init_loop
         rts
 
@@ -114,9 +114,9 @@ init_hardware:
         ; set system RAM size  (FIXME: dynamic probe)
        rep #$10
        .i16
-       ldx #512
+       ldx #8192
        stx _ramsize
-       ldx #512-64
+       ldx #8192-64
        stx _procmem
 
        sep #$10
@@ -237,4 +237,24 @@ _peek:
        rts
 
 
-       
\ No newline at end of file
+       .segment "STUBS"
+       .export jmpvec
+
+;
+;      Hack to deal with CC65 not supporting split I/D properly. It tries
+;      to generate stores to jmpvec+1/+2 them jsr jmpvec assuming they are
+;      in fact all in the same bank.
+;
+;      FIXME: we need to save 2:jmpvec+1/+2 across interrupts
+;
+jmpvec:
+       .a8
+       .i8
+       rep #$10
+       .i16
+       ldx jmpvec+1            ; in bank 2 not bank 1
+       dex                     ; as rts will inc
+       phx
+       sep #$10
+       .i8
+       rts