68hc11: further updating to start to put the eeprom together

diff --git a/Kernel/platform-68hc11test/Makefile b/Kernel/platform-68hc11test/Makefile
index 7851ed5..c6f4673 100644 (file)
--- a/Kernel/platform-68hc11test/Makefile
+++ b/Kernel/platform-68hc11test/Makefile
@@ -35,4 +35,4 @@ image:
        $(CROSS_LD) -o eeprom.out -M >../eeprom.map \
        --script=eeprom.x eeprom.o
        m6811-elf-objcopy --output-target=binary fuzix.out ../fuzix.bin
-       m6811-elf-objcopy --output-target=binary eeprom.out ../eeprom.bin
+       m6811-elf-objcopy --only-section=.text --only-section=.syscalls --only-section=.vectors --output-target=binary eeprom.out ../eeprom.bin

diff --git a/Kernel/platform-68hc11test/cpu.def b/Kernel/platform-68hc11test/cpu.def
index ac1aaad..b89923c 100644 (file)
--- a/Kernel/platform-68hc11test/cpu.def
+++ b/Kernel/platform-68hc11test/cpu.def
@@ -6,7 +6,7 @@
                .globl ddrd,porte, cforc, oc1m, oc1d, tcnth, tcntl
                .globl tic1h, tic1l, tic2h, tic2l, tic3h, tic3l
                .globl toc1h, toc1l, toc2h, toc2l, toc3h, toc3l
-               .globl toc4h, toc4l, tio4o5h, tio4o5l, tctl1, tctl2
+               .globl toc4h, toc4l, ti4o5h, ti4o5l, tctl1, tctl2
                .globl tmsk1, tflg1, tmsk2, tflg2, pactl, pacnt
                .globl spcr, spsr, spdr, baud, sccr1, sccr2
                .globl scsr, scdr, adctl, adr1, adr2, adr3, adr4

diff --git a/Kernel/platform-68hc11test/eeprom.s b/Kernel/platform-68hc11test/eeprom.s
index a93f893..3404cf0 100644 (file)
--- a/Kernel/platform-68hc11test/eeprom.s
+++ b/Kernel/platform-68hc11test/eeprom.s
@@ -4,8 +4,6 @@
 ;      TODO
 ;      - any debug/testing 8)
 ;
-;      Vector table for functions
-;      Vector table for exceptions/interrupts
 ;      Add functions for spi block copy to/from banks
 ;      Add description of SPI attached devices for OS
 ;      Make serial mode ask if you want serial or retry SD
@@ -19,6 +17,8 @@
 ;      the boot block can be tighter ?
 ;
 ;
+       .mode mshort
+
        .globl _start
 
        include "eeprom.def"
@@ -714,7 +714,44 @@ sergo:
        .ascii ">"
        .byte 0
 
-       .sect .syscall          ; starts at 0xFF40 for now
+spi_read:
+       rts
+spi_write:
+       rts
+conin:
+       cmpb #2                 ; no wait
+       beq conin_nb
+       cmpb #1
+       beq conin_ne
+       jsr waitkey
+       jsr outchar
+       rts
+conin_ne:
+       jmp waitkey
+conin_nb:
+       ldab scsr
+       andb #0x20
+       beq retff
+       ldab scdr
+       rts
+retff: ldab #0xff
+       rts
+
+conputs:
+       jmp outstr
+conputc:
+       jmp outchar
+conputhex:
+       jmp outcharhex
+
+block_read:
+       ldab #0xff
+       rts
+block_write:
+       ldab #0xff
+       rts
+
+       .sect .syscalls,"ax"            ; starts at 0xFF40 for now
 
 jfargetb:
        jmp fargetb
@@ -753,7 +790,7 @@ jspiread:
 jspiwrite:
        jmp spi_write
 
-       .sect .vector           ; FIXME: set to 0xFFD6 in the link file
+       .sect .vectors          ; FIXME: set to 0xFFD6 in the link file
 
        .word   int_sci
        .word   int_spi

diff --git a/Kernel/platform-68hc11test/eeprom.x b/Kernel/platform-68hc11test/eeprom.x
index 4c600d4..410f46d 100644 (file)
--- a/Kernel/platform-68hc11test/eeprom.x
+++ b/Kernel/platform-68hc11test/eeprom.x
@@ -19,7 +19,10 @@ MEMORY
   iram  (rwx) : ORIGIN = 0x0F040, LENGTH = 0x00C0
   ram2  (rwx) : ORIGIN = 0x0F100, LENGTH = 0x0500
   eeram (rwx) : ORIGIN = 0x0F600, LENGTH = 0x0200
-  eeprom      : ORIGIN = 0x0F800, LENGTH = 0x0800
+  eeprom (rx) : ORIGIN = 0x0F800, LENGTH = 0x0740
+  eesysc (rx) : ORIGIN = 0x0FF40, LENGTH = 0x0096
+  eevec (rx)  : ORIGIN = 0x0FFD6, LENGTH = 0x002A
+
 }
 
 SECTIONS
@@ -207,7 +210,7 @@ SECTIONS
   {
     KEEP (*(.jcr))
   }  > eeprom
-  /* Start of the data section image in ROM.  */
+  /* Start of the data section image in RAM.  */
   .data        :
   {
     *(.sdata)
@@ -244,23 +247,17 @@ SECTIONS
     *(.iram)
     *(.iram.*)
   }  > iram
-  /* If the 'vectors_addr' symbol is defined, it indicates the start address
-     of interrupt vectors.  This depends on the 68HC11 operating mode:
-                       Addr
-     Single chip       0xffc0
-     Extended mode     0xffc0
-     Bootstrap         0x00c0
-     Test              0xbfc0
-     In general, the vectors address is 0xffc0.  This can be overriden
-     with the '-defsym vectors_addr=0xbfc0' ld option.
-     Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
-     they are redirected to 0x00c0 by the internal PROM.  Application's vectors
-     must also consist of jump instructions (see Motorola's manual).  */
-  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
-  .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
+  .syscalls  :
+  {
+    *(.syscalls)
+    *(.syscalls.*)
+  } > eesysc
+  .vectors  :
   {
-    KEEP (*(.vectors))
-  }
+    *(.vectors)
+    *(.vectors.*)
+  } > eevec
+
   /* Stabs debugging sections.  */
   .stab                 0 : { *(.stab) }
   .stabstr      0 : { *(.stabstr) }