[submodule "8080"]
path = 8080
url = https://github.com/nickd4/8080.git
+[submodule "udis"]
+ path = udis
+ url = https://github.com/nickd4/udis.git
cpu_8080_rlc(self);
break;
case 0x08:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x09:
cpu_8080_dad(self, self->regs.word.bc);
cpu_8080_rrc(self);
break;
case 0x10:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x11:
cpu_8080_lxi(self, CPU_8080_EA_DE, cpu_8080_fetch_word(self));
cpu_8080_ral(self);
break;
case 0x18:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x19:
cpu_8080_dad(self, self->regs.word.de);
cpu_8080_rar(self);
break;
case 0x20:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x21:
cpu_8080_lxi(self, CPU_8080_EA_HL, cpu_8080_fetch_word(self));
cpu_8080_daa(self);
break;
case 0x28:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x29:
cpu_8080_dad(self, self->regs.word.hl);
cpu_8080_cma(self);
break;
case 0x30:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x31:
cpu_8080_lxi(self, CPU_8080_EA_SP, cpu_8080_fetch_word(self));
cpu_8080_stc(self);
break;
case 0x38:
- cpu_8080_nop(self);
+ cpu_8080_ill(self);
break;
case 0x39:
cpu_8080_dad(self, self->regs.word.sp);
cpu_8080_jz(self, cpu_8080_fetch_word(self));
break;
case 0xcb:
- cpu_8080_jmp(self, cpu_8080_fetch_word(self));
+ cpu_8080_ill(self);
break;
case 0xcc:
cpu_8080_cz(self, cpu_8080_fetch_word(self));
cpu_8080_rc(self);
break;
case 0xd9:
- cpu_8080_ret(self);
+ cpu_8080_ill(self);
break;
case 0xda:
cpu_8080_jc(self, cpu_8080_fetch_word(self));
cpu_8080_cc(self, cpu_8080_fetch_word(self));
break;
case 0xdd:
- cpu_8080_call(self, cpu_8080_fetch_word(self));
+ cpu_8080_ill(self);
break;
case 0xde:
cpu_8080_sbi(self, cpu_8080_fetch_byte(self));
cpu_8080_cpe(self, cpu_8080_fetch_word(self));
break;
case 0xed:
- cpu_8080_call(self, cpu_8080_fetch_word(self));
+ cpu_8080_ill(self);
break;
case 0xee:
cpu_8080_xri(self, cpu_8080_fetch_byte(self));
cpu_8080_cm(self, cpu_8080_fetch_word(self));
break;
case 0xfd:
- cpu_8080_call(self, cpu_8080_fetch_word(self));
+ cpu_8080_ill(self);
break;
case 0xfe:
cpu_8080_cpi(self, cpu_8080_fetch_byte(self));
--self->regs.word.pc;
}
+static ALWAYS_INLINE void cpu_8080_ill(struct cpu_8080 *self) {
+ abort();
+}
+
static ALWAYS_INLINE void cpu_8080_in(struct cpu_8080 *self, int rvalue) {
self->regs.byte.a = cpu_8080_in_byte(self, rvalue);
}
'xri',
}
byte_rvalue_modes = {
- '0x12': 'cpu_8080_fetch_byte(self)',
+ '$12': 'cpu_8080_fetch_byte(self)',
'a': 'self->regs.byte.a',
'b': 'self->regs.byte.b',
'c': 'self->regs.byte.c',
}
word_rvalue_modes = {
- '0x3412': 'cpu_8080_fetch_word(self)',
+ '$3412': 'cpu_8080_fetch_word(self)',
'psw': 'self->regs.word.psw',
'b': 'self->regs.word.bc',
'd': 'self->regs.word.de',
'sp': 'CPU_8080_EA_SP',
}
+line = sys.stdin.readline() # .org $0000
+
print('void cpu_8080_execute(struct cpu_8080 *self) {')
print(' switch (cpu_8080_fetch_byte(self)) {')
-
for i in range(0x100):
- line = sys.stdin.readline().strip()
+ line = sys.stdin.readline()
+ assert line[6:8] == f'{i:02X}'
print(f' case 0x{i:02x}:')
- instr = line.split()
- if len(instr) == 0:
+ instr = line[16:].split()
+ if instr[0] == '.byte':
instr = ['ill']
elif len(instr) >= 2:
instr[1:] = [l for j in instr[1:] for l in j.split(',')]
)
)
print(' break;')
-
-line = sys.stdin.readline().strip()
-assert len(line) == 0
-
print(' }')
print('}')
-print()
-nop
-lxi b,0x3412
-stax b
-inx b
-inr b
-dcr b
-mvi b,0x12
-rlc
-nop
-dad b
-ldax b
-dcx b
-inr c
-dcr c
-mvi c,0x12
-rrc
-nop
-lxi d,0x3412
-stax d
-inx d
-inr d
-dcr d
-mvi d,0x12
-ral
-nop
-dad d
-ldax d
-dcx d
-inr e
-dcr e
-mvi e,0x12
-rar
-nop
-lxi h,0x3412
-shld 0x3412
-inx h
-inr h
-dcr h
-mvi h,0x12
-daa
-nop
-dad h
-lhld 0x3412
-dcx h
-inr l
-dcr l
-mvi l,0x12
-cma
-nop
-lxi sp,0x3412
-sta 0x3412
-inx sp
-inr m
-dcr m
-mvi m,0x12
-stc
-nop
-dad sp
-lda 0x3412
-dcx sp
-inr a
-dcr a
-mvi a,0x12
-cmc
-mov b,b
-mov b,c
-mov b,d
-mov b,e
-mov b,h
-mov b,l
-mov b,m
-mov b,a
-mov c,b
-mov c,c
-mov c,d
-mov c,e
-mov c,h
-mov c,l
-mov c,m
-mov c,a
-mov d,b
-mov d,c
-mov d,d
-mov d,e
-mov d,h
-mov d,l
-mov d,m
-mov d,a
-mov e,b
-mov e,c
-mov e,d
-mov e,e
-mov e,h
-mov e,l
-mov e,m
-mov e,a
-mov h,b
-mov h,c
-mov h,d
-mov h,e
-mov h,h
-mov h,l
-mov h,m
-mov h,a
-mov l,b
-mov l,c
-mov l,d
-mov l,e
-mov l,h
-mov l,l
-mov l,m
-mov l,a
-mov m,b
-mov m,c
-mov m,d
-mov m,e
-mov m,h
-mov m,l
-hlt
-mov m,a
-mov a,b
-mov a,c
-mov a,d
-mov a,e
-mov a,h
-mov a,l
-mov a,m
-mov a,a
-add b
-add c
-add d
-add e
-add h
-add l
-add m
-add a
-adc b
-adc c
-adc d
-adc e
-adc h
-adc l
-adc m
-adc a
-sub b
-sub c
-sub d
-sub e
-sub h
-sub l
-sub m
-sub a
-sbb b
-sbb c
-sbb d
-sbb e
-sbb h
-sbb l
-sbb m
-sbb a
-ana b
-ana c
-ana d
-ana e
-ana h
-ana l
-ana m
-ana a
-xra b
-xra c
-xra d
-xra e
-xra h
-xra l
-xra m
-xra a
-ora b
-ora c
-ora d
-ora e
-ora h
-ora l
-ora m
-ora a
-cmp b
-cmp c
-cmp d
-cmp e
-cmp h
-cmp l
-cmp m
-cmp a
-rnz
-pop b
-jnz 0x3412
-jmp 0x3412
-cnz 0x3412
-push b
-adi 0x12
-rst 0
-rz
-ret
-jz 0x3412
-jmp 0x3412
-cz 0x3412
-call 0x3412
-aci 0x12
-rst 1
-rnc
-pop d
-jnc 0x3412
-out 0x12
-cnc 0x3412
-push d
-sui 0x12
-rst 2
-rc
-ret
-jc 0x3412
-in 0x12
-cc 0x3412
-call 0x3412
-sbi 0x12
-rst 3
-rpo
-pop h
-jpo 0x3412
-xthl
-cpo 0x3412
-push h
-ani 0x12
-rst 4
-rpe
-pchl
-jpe 0x3412
-xchg
-cpe 0x3412
-call 0x3412
-xri 0x12
-rst 5
-rp
-pop psw
-jp 0x3412
-di
-cp 0x3412
-push psw
-ori 0x12
-rst 6
-rm
-sphl
-jm 0x3412
-ei
-cm 0x3412
-call 0x3412
-cpi 0x12
-rst 7
+0000 .org $0000
+0000 00 nop
+0008 01 12 34 lxi b,$3412
+0010 02 stax b
+0018 03 inx b
+0020 04 inr b
+0028 05 dcr b
+0030 06 12 mvi b,$12
+0038 07 rlc
+0040 08 .byte $08
+0048 09 dad b
+0050 0A ldax b
+0058 0B dcx b
+0060 0C inr c
+0068 0D dcr c
+0070 0E 12 mvi c,$12
+0078 0F rrc
+0080 10 .byte $10
+0088 11 12 34 lxi d,$3412
+0090 12 stax d
+0098 13 inx d
+00A0 14 inr d
+00A8 15 dcr d
+00B0 16 12 mvi d,$12
+00B8 17 ral
+00C0 18 .byte $18
+00C8 19 dad d
+00D0 1A ldax d
+00D8 1B dcx d
+00E0 1C inr e
+00E8 1D dcr e
+00F0 1E 12 mvi e,$12
+00F8 1F rar
+0100 20 .byte $20
+0108 21 12 34 lxi h,$3412
+0110 22 12 34 shld $3412
+0118 23 inx h
+0120 24 inr h
+0128 25 dcr h
+0130 26 12 mvi h,$12
+0138 27 daa
+0140 28 .byte $28
+0148 29 dad h
+0150 2A 12 34 lhld $3412
+0158 2B dcx h
+0160 2C inr l
+0168 2D dcr l
+0170 2E 12 mvi l,$12
+0178 2F cma
+0180 30 .byte $30
+0188 31 12 34 lxi sp,$3412
+0190 32 12 34 sta $3412
+0198 33 inx sp
+01A0 34 inr m
+01A8 35 dcr m
+01B0 36 12 mvi m,$12
+01B8 37 stc
+01C0 38 .byte $38
+01C8 39 dad sp
+01D0 3A 12 34 lda $3412
+01D8 3B dcx sp
+01E0 3C inr a
+01E8 3D dcr a
+01F0 3E 12 mvi a,$12
+01F8 3F cmc
+0200 40 mov b,b
+0208 41 mov b,c
+0210 42 mov b,d
+0218 43 mov b,e
+0220 44 mov b,h
+0228 45 mov b,l
+0230 46 mov b,m
+0238 47 mov b,a
+0240 48 mov c,b
+0248 49 mov c,c
+0250 4A mov c,d
+0258 4B mov c,e
+0260 4C mov c,h
+0268 4D mov c,l
+0270 4E mov c,m
+0278 4F mov c,a
+0280 50 mov d,b
+0288 51 mov d,c
+0290 52 mov d,d
+0298 53 mov d,e
+02A0 54 mov d,h
+02A8 55 mov d,l
+02B0 56 mov d,m
+02B8 57 mov d,a
+02C0 58 mov e,b
+02C8 59 mov e,c
+02D0 5A mov e,d
+02D8 5B mov e,e
+02E0 5C mov e,h
+02E8 5D mov e,l
+02F0 5E mov e,m
+02F8 5F mov e,a
+0300 60 mov h,b
+0308 61 mov h,c
+0310 62 mov h,d
+0318 63 mov h,e
+0320 64 mov h,h
+0328 65 mov h,l
+0330 66 mov h,m
+0338 67 mov h,a
+0340 68 mov l,b
+0348 69 mov l,c
+0350 6A mov l,d
+0358 6B mov l,e
+0360 6C mov l,h
+0368 6D mov l,l
+0370 6E mov l,m
+0378 6F mov l,a
+0380 70 mov m,b
+0388 71 mov m,c
+0390 72 mov m,d
+0398 73 mov m,e
+03A0 74 mov m,h
+03A8 75 mov m,l
+03B0 76 hlt
+03B8 77 mov m,a
+03C0 78 mov a,b
+03C8 79 mov a,c
+03D0 7A mov a,d
+03D8 7B mov a,e
+03E0 7C mov a,h
+03E8 7D mov a,l
+03F0 7E mov a,m
+03F8 7F mov a,a
+0400 80 add b
+0408 81 add c
+0410 82 add d
+0418 83 add e
+0420 84 add h
+0428 85 add l
+0430 86 add m
+0438 87 add a
+0440 88 adc b
+0448 89 adc c
+0450 8A adc d
+0458 8B adc e
+0460 8C adc h
+0468 8D adc l
+0470 8E adc m
+0478 8F adc a
+0480 90 sub b
+0488 91 sub c
+0490 92 sub d
+0498 93 sub e
+04A0 94 sub h
+04A8 95 sub l
+04B0 96 sub m
+04B8 97 sub a
+04C0 98 sbb b
+04C8 99 sbb c
+04D0 9A sbb d
+04D8 9B sbb e
+04E0 9C sbb h
+04E8 9D sbb l
+04F0 9E sbb m
+04F8 9F sbb a
+0500 A0 ana b
+0508 A1 ana c
+0510 A2 ana d
+0518 A3 ana e
+0520 A4 ana h
+0528 A5 ana l
+0530 A6 ana m
+0538 A7 ana a
+0540 A8 xra b
+0548 A9 xra c
+0550 AA xra d
+0558 AB xra e
+0560 AC xra h
+0568 AD xra l
+0570 AE xra m
+0578 AF xra a
+0580 B0 ora b
+0588 B1 ora c
+0590 B2 ora d
+0598 B3 ora e
+05A0 B4 ora h
+05A8 B5 ora l
+05B0 B6 ora m
+05B8 B7 ora a
+05C0 B8 cmp b
+05C8 B9 cmp c
+05D0 BA cmp d
+05D8 BB cmp e
+05E0 BC cmp h
+05E8 BD cmp l
+05F0 BE cmp m
+05F8 BF cmp a
+0600 C0 rnz
+0608 C1 pop b
+0610 C2 12 34 jnz $3412
+0618 C3 12 34 jmp $3412
+0620 C4 12 34 cnz $3412
+0628 C5 push b
+0630 C6 12 adi $12
+0638 C7 rst 0
+0640 C8 rz
+0648 C9 ret
+0650 CA 12 34 jz $3412
+0658 CB .byte $CB
+0660 CC 12 34 cz $3412
+0668 CD 12 34 call $3412
+0670 CE 12 aci $12
+0678 CF rst 1
+0680 D0 rnc
+0688 D1 pop d
+0690 D2 12 34 jnc $3412
+0698 D3 12 out $12
+06A0 D4 12 34 cnc $3412
+06A8 D5 push d
+06B0 D6 12 sui $12
+06B8 D7 rst 2
+06C0 D8 rc
+06C8 D9 .byte $D9
+06D0 DA 12 34 jc $3412
+06D8 DB 12 in $12
+06E0 DC 12 34 cc $3412
+06E8 DD .byte $DD
+06F0 DE 12 sbi $12
+06F8 DF rst 3
+0700 E0 rpo
+0708 E1 pop h
+0710 E2 12 34 jpo $3412
+0718 E3 xthl
+0720 E4 12 34 cpo $3412
+0728 E5 push h
+0730 E6 12 ani $12
+0738 E7 rst 4
+0740 E8 rpe
+0748 E9 pchl
+0750 EA 12 34 jpe $3412
+0758 EB xchg
+0760 EC 12 34 cpe $3412
+0768 ED .byte $ED
+0770 EE 12 xri $12
+0778 EF rst 5
+0780 F0 rp
+0788 F1 pop psw
+0790 F2 12 34 jp $3412
+0798 F3 di
+07A0 F4 12 34 cp $3412
+07A8 F5 push psw
+07B0 F6 12 ori $12
+07B8 F7 rst 6
+07C0 F8 rm
+07C8 F9 sphl
+07D0 FA 12 34 jm $3412
+07D8 FB ei
+07E0 FC 12 34 cm $3412
+07E8 FD .byte $FD
+07F0 FE 12 cpi $12
+07F8 FF rst 7
+0800 end
--- /dev/null
+Subproject commit b45becdbc056350cbc4bb157b934e781cfa5d12c