+#include "../kernel-68000.def"
/*
* Lots left to fill in
*/
.globl udata_block
.globl devide_read_data
.globl devide_write_data
-
.mri 1
trap_reboot:
trap_monitor:
rts
timer_irq:
- movem.l a0-a6/d0-d7,-(a7)
+ ; C will save and restore a2+/d2+
+ movem.l a0-a1/a5/d0-d1,-(a7)
move.l udata_shadow,a5 ; set up the register global
+ move.b #1,U_DATA__U_ININTERRUPT(a5)
jsr platform_interrupt
+ clr.b U_DATA__U_ININTERRUPT(a5)
move.b $00F04000,d0 ; Re-enable
- movem.l (a7)+,a0-a6/d0-d7
+
+ tst.b U_DATA__U_INSYS(a5)
+ bne no_preempt
+ tst.b need_resched
+ bne no_preempt
+ ;
+ ; Vanish into the scheduler. Some other task will pop back out
+ ; and eventually we'll re-appear here and continue.
+ ;
+ ; FIXME: check IRQ masking
+ ;
+ move.l U_DATA__U_PTAB(a5),a0
+ move.b #P_READY,P_TAB__P_STATUS_OFFSET(a0)
+ bsr switchout
+no_preempt:
+ tst.b U_DATA__U_CURSIG(a5)
+ beq no_signal
+ clr.b U_DATA__U_CURSIG(a5)
+
+ move.l usp,a0
+ subq #6,a0 ; Make space for the return and ccr
+
+ ;
+ ; The signal handler will see a0/a1/d0/d1 = 0
+ ; but upon return it will get the saved a0/a1/d0/d1
+ ;
+ move.l 12(sp),-(a0) ; a1
+ move.l 8(sp),-(a0) ; a0
+ move.l 4(sp),-(a0) ; d1
+ move.l (sp),-(a0) ; d0
+
+ add.w #16,sp ; throw the return frame except for
+ ; A5
+ bra signal_helper ; will pop A5
+
+no_signal:
+ movem.l (a7)+,a0-a1/a5/d0-d1
rte
mmu_fault: