68000: move generic asm code from tiny68K into the core code

This will break the v68 platforms (again) but they can just be cleaned
up afterwards.

diff --git a/Kernel/lowlevel-68000.S b/Kernel/lowlevel-68000.S
index ba38e8d..075a32e 100644 (file)
--- a/Kernel/lowlevel-68000.S
+++ b/Kernel/lowlevel-68000.S
@@ -390,6 +390,8 @@ SYM (__umodsi3):
                .globl dump_registers
                .globl kernel_flag
                .globl copy_blocks
+               .globl install_vectors
+               .globl vdso
 
 .mri 1
 get_usp:       move.l  usp,a0
@@ -420,6 +422,20 @@ __hard_irqrestore:
                move.w d0,sr
                rts
 
+;
+;      'VDSO' (copied into the base of each executable)
+;
+vdso:  trap #12                ; syscall entry
+       rts
+       ; signal unwind
+       move.l 8(sp),sp         ; blow away stack frame
+       movem.l (sp)+,a0/a1/d0/d1
+       move.w (sp)+,ccr
+       rts
+       ; rest is spare for now
+
+
+
 ;
 ;      Put the supervisor stack back as if we had nothing on it (we just
 ;      longjmp'd out of the syscall path really). Then we push an exception
@@ -427,6 +443,8 @@ __hard_irqrestore:
 ;      switch modes as we switch address so that we don't fault if there
 ;      is memory protection.
 ;
+;      TODO: 68010 support needs adjusting here
+;
 doexec:
                move.l 4(sp),a1                 ; go address
                lea.l 1024(a5),a7               ; reset the supervisor stack
@@ -453,6 +471,49 @@ doexec:
                move.l d0,a6
                rte             ; hit user space (and will enable interrupts)
 
+install_vectors:
+               move.l #8,a0
+               move.w #253,d0
+               move.l #unexpected,d1
+init_trap_loop:
+               move.l d1,(a0)+
+               dbra d0,init_trap_loop
+               ;
+               ; Now set the vectors we care about
+               ;
+               move.w #8,a0
+               move.l #bus_error,(a0)+
+               move.l #addr_error,(a0)+
+               move.l #illegal,(a0)+
+               move.l #divzero,(a0)+
+               move.l #chk,(a0)+
+               move.l #trapv,(a0)+
+               move.l #priv,(a0)+
+               move.l #trace,(a0)+
+               move.l #unimpa,(a0)+    ; A and F line traps
+               move.l #unimpf,(a0)+
+               move.w #$80,a0
+               move.l #trap0,(a0)+
+               move.l #trap1,(a0)+
+               move.l #trap2,(a0)+
+               move.l #trap3,(a0)+
+               move.l #trap4,(a0)+
+               move.l #trap5,(a0)+
+               move.l #trap6,(a0)+
+               move.l #trap7,(a0)+
+               move.l #trap8,(a0)+
+               move.l #trap9,(a0)+
+               move.l #trap10,(a0)+
+               move.l #trap11,(a0)+
+               move.l #trap12,(a0)+
+               move.l #trap13,(a0)+
+               move.l #trap14,(a0)+
+               move.l #trap15,(a0)
+               move.w #$0,a0
+               move.l #uninit,$3c(a0)
+               move.l #spurious,$60(a0)
+               rts
+
 
 bus_error:     move.w sr,-(sp)
                move.w #2,-(sp)

diff --git a/Kernel/platform-tiny68k/p68000.S b/Kernel/platform-tiny68k/p68000.S
index edcee32..3a08df1 100644 (file)
--- a/Kernel/platform-tiny68k/p68000.S
+++ b/Kernel/platform-tiny68k/p68000.S
@@ -10,7 +10,6 @@
                .globl udata_block0
                .globl devide_read_data
                .globl devide_write_data
-               .globl vdso
 
 #define CTUR $D
 #define CTLR $F
@@ -41,48 +40,10 @@ init_hardware:
            sub.w  #64,d0               ; Guess for kernel
            move.w d0,procmem           ; guesses for now
 
-           move.l #8,a0
-           move.w #253,d0
-           move.l #unexpected,d1
-init_trap_loop:
-           move.l d1,(a0)+
-           dbra d0,init_trap_loop
-           ;
-           ; Now set the vectors we care about
-           ;
-           move.w #8,a0
-           move.l #bus_error,(a0)+
-           move.l #addr_error,(a0)+
-           move.l #illegal,(a0)+
-           move.l #divzero,(a0)+
-           move.l #chk,(a0)+
-           move.l #trapv,(a0)+
-           move.l #priv,(a0)+
-           move.l #trace,(a0)+
-           move.l #unimpa,(a0)+        ; A and F line traps
-           move.l #unimpf,(a0)+
-           move.w #$80,a0
-           move.l #trap0,(a0)+
-           move.l #trap1,(a0)+
-           move.l #trap2,(a0)+
-           move.l #trap3,(a0)+
-           move.l #trap4,(a0)+
-           move.l #trap5,(a0)+
-           move.l #trap6,(a0)+
-           move.l #trap7,(a0)+
-           move.l #trap8,(a0)+
-           move.l #trap9,(a0)+
-           move.l #trap10,(a0)+
-           move.l #trap11,(a0)+
-           move.l #trap12,(a0)+
-           move.l #trap13,(a0)+
-           move.l #trap14,(a0)+
-           move.l #trap15,(a0)
-           move.w #$0,a0
-           move.l #uninit,$3c(a0)
-           move.l #spurious,$60(a0)
+           bsr install_vectors
+
            /* We use Vector 0x81 for the DUART */
-           move.l #timer_irq,$204(a0)
+           move.l #timer_irq,$204
 
            lea.l $FFF000,a0
            move.b #$80,CTLR(a0)
@@ -180,15 +141,3 @@ devide_write_l:
        dbra d0,devide_write_l
        rts
 
-;
-;      'VDSO'
-;
-vdso:  trap #12                ; syscall entry
-       rts
-       ; signal unwind
-       move.l 8(sp),sp         ; blow away stack frame
-       movem.l (sp)+,a0/a1/d0/d1
-       move.w (sp)+,ccr
-       rts
-       ; rest is spare for now
-