--- /dev/null
+#define RCSID3 "$Header$"
+
+/*
+ * Motorola 6809 keywords
+ */
+
+0, REG, A, "a",
+0, REG, B, "b",
+0, REG, CC, "cc",
+0, REG, DP, "dp",
+0, REG, D, "d",
+0, REG, X, "x",
+0, REG, Y, "y",
+0, REG, U, "u",
+0, REG, S, "s",
+0, REG, PC, "pc",
+0, ALL, 0xFF, "all",
+0, SETDP, 0, "setdp",
+0, NOARG, 0x3A, "abx",
+0, NOARG, 0x19, "daa",
+0, NOARG, 0x3D, "mul",
+0, NOARG, 0x12, "nop",
+0, NOARG, 0x10, "page2",
+0, NOARG, 0x11, "page3",
+0, NOARG, 0x3B, "rti",
+0, NOARG, 0x4F, "clra",
+0, NOARG, 0x5F, "clrb",
+0, NOARG, 0x4A, "deca",
+0, NOARG, 0x5A, "decb",
+0, NOARG, 0x43, "coma",
+0, NOARG, 0x53, "comb",
+0, NOARG, 0x44, "lsra",
+0, NOARG, 0x54, "lsrb",
+0, NOARG, 0x40, "nega",
+0, NOARG, 0x50, "negb",
+0, NOARG, 0x46, "rora",
+0, NOARG, 0x56, "rorb",
+0, NOARG, 0x47, "asra",
+0, NOARG, 0x57, "asrb",
+0, NOARG, 0x49, "rola",
+0, NOARG, 0x59, "rolb",
+0, NOARG, 0x48, "asla",
+0, NOARG, 0x58, "aslb",
+0, NOARG, 0x48, "lsla",
+0, NOARG, 0x58, "lslb",
+0, NOARG, 0x4C, "inca",
+0, NOARG, 0x5C, "incb",
+0, NOARG, 0x4D, "tsta",
+0, NOARG, 0x5D, "tstb",
+0, NOARG, 0x39, "rts",
+0, NOARG, 0x1D, "sex",
+0, NOARG, 0x3F, "swi",
+0, NOARG, 0x103F, "swi2",
+0, NOARG, 0x113F, "swi3",
+0, NOARG, 0x13, "sync",
+0, BRANCH, 0x20, "bra",
+0, BRANCH, 0x21, "brn",
+0, BRANCH, 0x22, "bhi",
+0, BRANCH, 0x23, "bls",
+0, BRANCH, 0x24, "bhs",
+0, BRANCH, 0x24, "bcc",
+0, BRANCH, 0x25, "blo",
+0, BRANCH, 0x25, "bcs",
+0, BRANCH, 0x26, "bne",
+0, BRANCH, 0x27, "beq",
+0, BRANCH, 0x28, "bvc",
+0, BRANCH, 0x29, "bvs",
+0, BRANCH, 0x2A, "bpl",
+0, BRANCH, 0x2B, "bmi",
+0, BRANCH, 0x2C, "bge",
+0, BRANCH, 0x2D, "blt",
+0, BRANCH, 0x2E, "bgt",
+0, BRANCH, 0x2F, "ble",
+0, BRANCH, 0x8D, "bsr",
+0, STACK, 0x34, "pshs",
+0, STACK, 0x35, "puls",
+0, STACK, 0x36, "pshu",
+0, STACK, 0x37, "pulu",
+0, IMMED, 0x1A, "orcc",
+0, IMMED, 0x1C, "andcc",
+0, IMMED, 0x3C, "cwai",
+0, TWOREG, 0x1E, "exg",
+0, TWOREG, 0x1F, "tfr",
+0, XOP, 0xA0, "suba",
+0, XOP, 0xA1, "cmpa",
+0, XOP, 0xA2, "sbca",
+0, XOP, 0xA4, "anda",
+0, XOP, 0xA5, "bita",
+0, XOP, 0xA6, "lda",
+0, XOP, 0xA8, "eora",
+0, XOP, 0xA9, "adca",
+0, XOP, 0xAA, "ora",
+0, XOP, 0xAB, "adda",
+0, XOP, 0xE0, "subb",
+0, XOP, 0xE1, "cmpb",
+0, XOP, 0xE2, "sbcb",
+0, XOP, 0xE4, "andb",
+0, XOP, 0xE5, "bitb",
+0, XOP, 0xE6, "ldb",
+0, XOP, 0xE8, "eorb",
+0, XOP, 0xE9, "adcb",
+0, XOP, 0xEA, "orb",
+0, XOP, 0xEB, "addb",
+0, XOP, 0x30, "leax",
+0, XOP, 0x31, "leay",
+0, XOP, 0x32, "leas",
+0, XOP, 0x33, "leau",
+0, XOP, 0x60, "neg",
+0, XOP, 0x63, "com",
+0, XOP, 0x64, "lsr",
+0, XOP, 0x66, "ror",
+0, XOP, 0x67, "asr",
+0, XOP, 0x68, "asl",
+0, XOP, 0x68, "lsl",
+0, XOP, 0x69, "rol",
+0, XOP, 0x6A, "dec",
+0, XOP, 0x6C, "inc",
+0, XOP, 0x6D, "tst",
+0, XOP, 0x6F, "clr",
+0, XOP, 0x6E, "jmp",
+0, XOP, 0xA3, "subd",
+0, XOP, 0x10A3, "cmpd",
+0, XOP, 0x11A3, "cmpu",
+0, XOP, 0xAC, "cmpx",
+0, XOP, 0x10AC, "cmpy",
+0, XOP, 0x11AC, "cmps",
+0, XOP, 0xAE, "ldx",
+0, XOP, 0x10AE, "ldy",
+0, XOP, 0xE3, "addd",
+0, XOP, 0xEC, "ldd",
+0, XOP, 0xEE, "ldu",
+0, XOP, 0x10EE, "lds",
+0, XOP, 0xA7, "sta",
+0, XOP, 0xAD, "jsr",
+0, XOP, 0xAF, "stx",
+0, XOP, 0x10AF, "sty",
+0, XOP, 0xE7, "stb",
+0, XOP, 0xED, "std",
+0, XOP, 0xEF, "stu",
+0, XOP, 0x10EF, "sts",
+0, LBRNCH, 0x21, "lbrn",
+0, LBRNCH, 0x22, "lbhi",
+0, LBRNCH, 0x23, "lbls",
+0, LBRNCH, 0x24, "lbhs",
+0, LBRNCH, 0x24, "lbcc",
+0, LBRNCH, 0x25, "lblo",
+0, LBRNCH, 0x25, "lbcs",
+0, LBRNCH, 0x26, "lbne",
+0, LBRNCH, 0x27, "lbeq",
+0, LBRNCH, 0x28, "lbvc",
+0, LBRNCH, 0x29, "lbvs",
+0, LBRNCH, 0x2A, "lbpl",
+0, LBRNCH, 0x2B, "lbmi",
+0, LBRNCH, 0x2C, "lbge",
+0, LBRNCH, 0x2D, "lblt",
+0, LBRNCH, 0x2E, "lbgt",
+0, LBRNCH, 0x2F, "lble",
+0, SBRNCH, 0x16, "lbra",
+0, SBRNCH, 0x17, "lbsr",
+0, NOARG, 0x1CFE, "clc",
+0, NOARG, 0x1A01, "sec",
+0, NOARG, 0x1CEF, "cli",
+0, NOARG, 0x1A10, "sei",
+0, NOARG, 0x1CFD, "clv",
+0, NOARG, 0x1A02, "sev",
+0, NOARG, 0x3CFF, "wai",
--- /dev/null
+#define RCSID4 "$Header$"
+
+/*
+ * (c) copyright 1983 by the Vrije Universiteit, Amsterdam, The Netherlands.
+ *
+ * This product is part of the Amsterdam Compiler Kit.
+ *
+ * Permission to use, sell, duplicate or disclose this software must be
+ * obtained in writing. Requests for such permissions may be sent to
+ *
+ * Dr. Andrew S. Tanenbaum
+ * Wiskundig Seminarium
+ * Vrije Universiteit
+ * Postbox 7161
+ * 1007 MC Amsterdam
+ * The Netherlands
+ *
+ */
+
+/*
+ * Motorola 6809 parsing rules
+ */
+
+operation
+ : SETDP expr
+ { dpvalue = $2.val;}
+ |
+ NOARG
+ { emit1or2($1);}
+ |
+ BRANCH expr
+ { branch($1,$2);}
+ |
+ LBRNCH expr
+ { emit1(0x10); emit1($1);
+ $2.val -= (DOTVAL+2);
+#ifdef RELOCATION
+ newrelo($2.typ, RELPC|RELO2|RELBR);
+#endif
+ emit2($2.val);
+ }
+ |
+ SBRNCH expr
+ { emit1($1);
+ $2.val -= (DOTVAL+2);
+#ifdef RELOCATION
+ newrelo($2.typ, RELPC|RELO2|RELBR);
+#endif
+ emit2($2.val);
+ }
+ |
+ IMMED '#' expr
+ { emit1($1);
+#ifdef RELOCATION
+ newrelo($3.typ, RELO1);
+#endif
+ emit1($3.val);
+ }
+ |
+ XOP '#' expr
+ { emit1or2($1 - 0x20);
+ switch ($1 & 0x0F) {
+ case 0x03:
+ case 0x0C:
+ case 0x0E:
+#ifdef RELOCATION
+ newrelo($3.typ, RELO2|RELBR);
+#endif
+ emit2($3.val);
+ break;
+ default:
+#ifdef RELOCATION
+ newrelo($3.typ, RELO1);
+#endif
+ emit1($3.val);
+ break;
+ }
+ }
+ |
+ XOP '<' expr
+ { if (0 <= $1 && $1 < 0x80)
+ emit1(($1-0x10) & 0x3F);
+ else
+ emit1or2($1 - 0x10);
+#ifdef RELOCATION
+ newrelo($3.typ, RELO1);
+#endif
+ emit1($3.val);
+ }
+ |
+ XOP '>' expr
+ { emit1or2($1 + 0x10);
+#ifdef RELOCATION
+ newrelo($3.typ, RELO2|RELBR);
+#endif
+ emit2($3.val);
+ }
+ |
+ STACK reglist
+ { emit1($1); emit1($2);}
+ |
+ TWOREG REG ',' REG
+ {
+ emit1($1);
+ emit1($2 << 4 | $4);
+ }
+ |
+ XOP REG
+ { switch ($2) {
+ case A: emit1($1 - 0x20);
+ break;
+ case B: emit1($1 - 0x10);
+ break;
+ default:serror("register error");
+ }
+ }
+ |
+ XOP expr ',' REG
+ { emit1or2($1);
+ offset($4,$2,0);
+ }
+ |
+ XOP '(' expr ',' REG ')'
+ { emit1or2($1);
+ offset($5,$3,0x10);
+ }
+ |
+ XOP '(' expr ')'
+ { emit1or2($1);
+ emit1(0x9F);
+#ifdef RELOCATION
+ newrelo($3.typ, RELO1);
+#endif
+ emit1($3.val);
+ }
+ |
+ XOP xmode
+ { emit1or2($1);
+ emit1($2);
+ }
+ |
+ XOP '(' xmode ')'
+ { if (($3 & 0x8D) == 0x80)
+ serror("invalid index mode");
+ emit1or2($1);
+ emit1($3 + 0x10);
+ }
+ |
+ XOP expr
+ { if (($2.typ & S_TYP) == S_ABS &&
+ ((unsigned)$2.val >> 8) == dpvalue
+ ) {
+ if (0 <= $1 && $1 < 0x80)
+ emit1(($1-0x20) & 0x3F);
+ else
+ emit1or2($1 - 0x10);
+ emit1($2.val);
+ } else {
+ emit1or2($1 + 0x10);
+#ifdef RELOCATION
+ newrelo($2.typ, RELO2|RELBR);
+#endif
+ emit2($2.val);
+ }
+ }
+ ;
+reglist : ALL
+ | REG
+ { if (($$ = regbit[$1]) < 0) serror("register error");}
+ |
+ reglist ',' REG
+ { register i;
+ if ((i = regbit[$3]) < 0 || ($1 & i) != 0)
+ serror("register error");
+ $$ = $1 | i;
+ }
+ ;
+xyus : REG
+ { if (($$ = regno($1)) < 0) serror("register error");}
+ ;
+xmode : ',' xyus '+' '+'
+ { $$ = 0x81 + $2;}
+ |
+ ',' xyus '+'
+ { $$ = 0x80 + $2;}
+ |
+ ',' xyus
+ { $$ = 0x84 + $2;}
+ |
+ ',' '-' '-' xyus
+ { $$ = 0x83 + $4;}
+ |
+ ',' '-' xyus
+ { $$ = 0x82 + $3;}
+ |
+ REG ',' xyus
+ { switch($1) {
+ case A: $$ = 0x86 + $3; break;
+ case B: $$ = 0x85 + $3; break;
+ case D: $$ = 0x8B + $3; break;
+ default: serror("register error");
+ }
+ }
+ ;
--- /dev/null
+#define RCSID5 "$Header$"
+
+/*
+ * Motorola 6809 special routines
+ */
+
+branch(opc, exp)
+register int opc;
+expr_t exp;
+{
+ register int sm, dist;
+ int saving;
+
+ dist = exp.val - (DOTVAL + 2);
+ if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
+ dist -= DOTGAIN;
+ sm = fitb(dist);
+ if ((exp.typ & ~S_DOT) != DOTTYP)
+ sm = 0;
+ if (opc == 0x8D || opc == 0x20)
+ saving = 1;
+ else
+ saving = 2;
+ if ((sm = small(sm,saving)) == 0) {
+ dist--;
+ if (opc == 0x8D) /* bsr */
+ opc = 0x17;
+ else if (opc == 0x20) /* bra */
+ opc = 0x16;
+ else {
+ emit1(0x10);
+ dist--;
+ }
+ }
+ emit1(opc);
+ if (sm == 0) {
+#ifdef RELOCATION
+ newrelo(exp.typ, RELPC|RELO2|RELBR);
+#endif
+ emit2(dist);
+ } else
+ emit1(lowb(dist));
+}
+
+regno(r) register r; {
+ switch (r) {
+ case X: return 0;
+ case Y: return 0x20;
+ case U: return 0x40;
+ case S: return 0x60;
+ }
+ return -1;
+}
+
+emit1or2(n) {
+ if (n & ~0xFF)
+ emit1(n >> 8);
+ emit1(n);
+}
+
+offset(reg, exp, ind)
+register int reg, ind;
+expr_t exp;
+{
+ if (reg == PC) {
+ int sm, dist;
+
+ dist = exp.val - (DOTVAL + 2);
+ if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT))
+ dist -= DOTGAIN;
+ sm = fitb(dist);
+ if ((exp.typ & S_TYP) != DOTTYP)
+ sm = 0;
+ if (small(sm,0)) {
+ emit1(0x8C + ind);
+ emit1(dist);
+ } else {
+ emit1(0x8D + ind);
+ emit1(dist - 1);
+ }
+ } else if ((reg = regno(reg)) < 0)
+ serror("register error");
+ else if ((exp.typ & S_TYP) == S_ABS && exp.val == 0)
+ emit1(0x84 + reg + ind); /* XOP 0, REG == XOP , REG */
+ else if (ind == 0 && (exp.typ & S_TYP) == S_ABS &&
+ -16 <= exp.val && exp.val <= 15
+ )
+ emit1(reg + ind + (exp.val & 037));
+ else if ((exp.typ&S_TYP)==S_ABS && -256<=exp.val && exp.val<=255) {
+ emit1(0x88 + reg + ind);
+ emit1(exp.val);
+ } else {
+ emit1(0x89 + reg + ind);
+#ifdef RELOCATION
+ newrelo(exp.typ, RELO2|RELBR);
+#endif
+ emit2(exp.val);
+ }
+}